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authorGreg Kroah-Hartman <gregkh@suse.de>2009-04-29 22:14:08 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-06-16 00:44:50 -0400
commit700e2052c6814b1b1d2714225d568c5c64bc49ae (patch)
tree67c62f3c3773d2b856e21662435c839a1aab9dd4 /drivers/usb/host/xhci-dbg.c
parentb7258a4aba2b24d5c27a0f6674795e83e7771969 (diff)
USB: xhci: fix lots of compiler warnings.
Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/xhci-dbg.c')
-rw-r--r--drivers/usb/host/xhci-dbg.c180
1 files changed, 87 insertions, 93 deletions
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c
index 16ef42a0fe85..264c38059d4a 100644
--- a/drivers/usb/host/xhci-dbg.c
+++ b/drivers/usb/host/xhci-dbg.c
@@ -30,12 +30,11 @@ void xhci_dbg_regs(struct xhci_hcd *xhci)
30{ 30{
31 u32 temp; 31 u32 temp;
32 32
33 xhci_dbg(xhci, "// xHCI capability registers at 0x%x:\n", 33 xhci_dbg(xhci, "// xHCI capability registers at %p:\n",
34 (unsigned int) xhci->cap_regs); 34 xhci->cap_regs);
35 temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); 35 temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
36 xhci_dbg(xhci, "// @%x = 0x%x (CAPLENGTH AND HCIVERSION)\n", 36 xhci_dbg(xhci, "// @%p = 0x%x (CAPLENGTH AND HCIVERSION)\n",
37 (unsigned int) &xhci->cap_regs->hc_capbase, 37 &xhci->cap_regs->hc_capbase, temp);
38 (unsigned int) temp);
39 xhci_dbg(xhci, "// CAPLENGTH: 0x%x\n", 38 xhci_dbg(xhci, "// CAPLENGTH: 0x%x\n",
40 (unsigned int) HC_LENGTH(temp)); 39 (unsigned int) HC_LENGTH(temp));
41#if 0 40#if 0
@@ -43,29 +42,24 @@ void xhci_dbg_regs(struct xhci_hcd *xhci)
43 (unsigned int) HC_VERSION(temp)); 42 (unsigned int) HC_VERSION(temp));
44#endif 43#endif
45 44
46 xhci_dbg(xhci, "// xHCI operational registers at 0x%x:\n", 45 xhci_dbg(xhci, "// xHCI operational registers at %p:\n", xhci->op_regs);
47 (unsigned int) xhci->op_regs);
48 46
49 temp = xhci_readl(xhci, &xhci->cap_regs->run_regs_off); 47 temp = xhci_readl(xhci, &xhci->cap_regs->run_regs_off);
50 xhci_dbg(xhci, "// @%x = 0x%x RTSOFF\n", 48 xhci_dbg(xhci, "// @%p = 0x%x RTSOFF\n",
51 (unsigned int) &xhci->cap_regs->run_regs_off, 49 &xhci->cap_regs->run_regs_off,
52 (unsigned int) temp & RTSOFF_MASK); 50 (unsigned int) temp & RTSOFF_MASK);
53 xhci_dbg(xhci, "// xHCI runtime registers at 0x%x:\n", 51 xhci_dbg(xhci, "// xHCI runtime registers at %p:\n", xhci->run_regs);
54 (unsigned int) xhci->run_regs);
55 52
56 temp = xhci_readl(xhci, &xhci->cap_regs->db_off); 53 temp = xhci_readl(xhci, &xhci->cap_regs->db_off);
57 xhci_dbg(xhci, "// @%x = 0x%x DBOFF\n", 54 xhci_dbg(xhci, "// @%p = 0x%x DBOFF\n", &xhci->cap_regs->db_off, temp);
58 (unsigned int) &xhci->cap_regs->db_off, temp); 55 xhci_dbg(xhci, "// Doorbell array at %p:\n", xhci->dba);
59 xhci_dbg(xhci, "// Doorbell array at 0x%x:\n",
60 (unsigned int) xhci->dba);
61} 56}
62 57
63void xhci_print_cap_regs(struct xhci_hcd *xhci) 58void xhci_print_cap_regs(struct xhci_hcd *xhci)
64{ 59{
65 u32 temp; 60 u32 temp;
66 61
67 xhci_dbg(xhci, "xHCI capability registers at 0x%x:\n", 62 xhci_dbg(xhci, "xHCI capability registers at %p:\n", xhci->cap_regs);
68 (unsigned int) xhci->cap_regs);
69 63
70 temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); 64 temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
71 xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:\n", 65 xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:\n",
@@ -146,8 +140,7 @@ void xhci_print_status(struct xhci_hcd *xhci)
146 140
147void xhci_print_op_regs(struct xhci_hcd *xhci) 141void xhci_print_op_regs(struct xhci_hcd *xhci)
148{ 142{
149 xhci_dbg(xhci, "xHCI operational registers at 0x%x:\n", 143 xhci_dbg(xhci, "xHCI operational registers at %p:\n", xhci->op_regs);
150 (unsigned int) xhci->op_regs);
151 xhci_print_command_reg(xhci); 144 xhci_print_command_reg(xhci);
152 xhci_print_status(xhci); 145 xhci_print_status(xhci);
153} 146}
@@ -168,9 +161,8 @@ void xhci_print_ports(struct xhci_hcd *xhci)
168 addr = &xhci->op_regs->port_status_base; 161 addr = &xhci->op_regs->port_status_base;
169 for (i = 0; i < ports; i++) { 162 for (i = 0; i < ports; i++) {
170 for (j = 0; j < NUM_PORT_REGS; ++j) { 163 for (j = 0; j < NUM_PORT_REGS; ++j) {
171 xhci_dbg(xhci, "0x%x port %s reg = 0x%x\n", 164 xhci_dbg(xhci, "%p port %s reg = 0x%x\n",
172 (unsigned int) addr, 165 addr, names[j],
173 names[j],
174 (unsigned int) xhci_readl(xhci, addr)); 166 (unsigned int) xhci_readl(xhci, addr));
175 addr++; 167 addr++;
176 } 168 }
@@ -187,46 +179,46 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, struct intr_reg *ir_set, int set_n
187 if (temp == XHCI_INIT_VALUE) 179 if (temp == XHCI_INIT_VALUE)
188 return; 180 return;
189 181
190 xhci_dbg(xhci, " 0x%x: ir_set[%i]\n", (unsigned int) ir_set, set_num); 182 xhci_dbg(xhci, " %p: ir_set[%i]\n", ir_set, set_num);
191 183
192 xhci_dbg(xhci, " 0x%x: ir_set.pending = 0x%x\n", 184 xhci_dbg(xhci, " %p: ir_set.pending = 0x%x\n", addr,
193 (unsigned int) addr, (unsigned int) temp); 185 (unsigned int)temp);
194 186
195 addr = &ir_set->irq_control; 187 addr = &ir_set->irq_control;
196 temp = xhci_readl(xhci, addr); 188 temp = xhci_readl(xhci, addr);
197 xhci_dbg(xhci, " 0x%x: ir_set.control = 0x%x\n", 189 xhci_dbg(xhci, " %p: ir_set.control = 0x%x\n", addr,
198 (unsigned int) addr, (unsigned int) temp); 190 (unsigned int)temp);
199 191
200 addr = &ir_set->erst_size; 192 addr = &ir_set->erst_size;
201 temp = xhci_readl(xhci, addr); 193 temp = xhci_readl(xhci, addr);
202 xhci_dbg(xhci, " 0x%x: ir_set.erst_size = 0x%x\n", 194 xhci_dbg(xhci, " %p: ir_set.erst_size = 0x%x\n", addr,
203 (unsigned int) addr, (unsigned int) temp); 195 (unsigned int)temp);
204 196
205 addr = &ir_set->rsvd; 197 addr = &ir_set->rsvd;
206 temp = xhci_readl(xhci, addr); 198 temp = xhci_readl(xhci, addr);
207 if (temp != XHCI_INIT_VALUE) 199 if (temp != XHCI_INIT_VALUE)
208 xhci_dbg(xhci, " WARN: 0x%x: ir_set.rsvd = 0x%x\n", 200 xhci_dbg(xhci, " WARN: %p: ir_set.rsvd = 0x%x\n",
209 (unsigned int) addr, (unsigned int) temp); 201 addr, (unsigned int)temp);
210 202
211 addr = &ir_set->erst_base[0]; 203 addr = &ir_set->erst_base[0];
212 temp = xhci_readl(xhci, addr); 204 temp = xhci_readl(xhci, addr);
213 xhci_dbg(xhci, " 0x%x: ir_set.erst_base[0] = 0x%x\n", 205 xhci_dbg(xhci, " %p: ir_set.erst_base[0] = 0x%x\n",
214 (unsigned int) addr, (unsigned int) temp); 206 addr, (unsigned int) temp);
215 207
216 addr = &ir_set->erst_base[1]; 208 addr = &ir_set->erst_base[1];
217 temp = xhci_readl(xhci, addr); 209 temp = xhci_readl(xhci, addr);
218 xhci_dbg(xhci, " 0x%x: ir_set.erst_base[1] = 0x%x\n", 210 xhci_dbg(xhci, " %p: ir_set.erst_base[1] = 0x%x\n",
219 (unsigned int) addr, (unsigned int) temp); 211 addr, (unsigned int) temp);
220 212
221 addr = &ir_set->erst_dequeue[0]; 213 addr = &ir_set->erst_dequeue[0];
222 temp = xhci_readl(xhci, addr); 214 temp = xhci_readl(xhci, addr);
223 xhci_dbg(xhci, " 0x%x: ir_set.erst_dequeue[0] = 0x%x\n", 215 xhci_dbg(xhci, " %p: ir_set.erst_dequeue[0] = 0x%x\n",
224 (unsigned int) addr, (unsigned int) temp); 216 addr, (unsigned int) temp);
225 217
226 addr = &ir_set->erst_dequeue[1]; 218 addr = &ir_set->erst_dequeue[1];
227 temp = xhci_readl(xhci, addr); 219 temp = xhci_readl(xhci, addr);
228 xhci_dbg(xhci, " 0x%x: ir_set.erst_dequeue[1] = 0x%x\n", 220 xhci_dbg(xhci, " %p: ir_set.erst_dequeue[1] = 0x%x\n",
229 (unsigned int) addr, (unsigned int) temp); 221 addr, (unsigned int) temp);
230} 222}
231 223
232void xhci_print_run_regs(struct xhci_hcd *xhci) 224void xhci_print_run_regs(struct xhci_hcd *xhci)
@@ -234,17 +226,16 @@ void xhci_print_run_regs(struct xhci_hcd *xhci)
234 u32 temp; 226 u32 temp;
235 int i; 227 int i;
236 228
237 xhci_dbg(xhci, "xHCI runtime registers at 0x%x:\n", 229 xhci_dbg(xhci, "xHCI runtime registers at %p:\n", xhci->run_regs);
238 (unsigned int) xhci->run_regs);
239 temp = xhci_readl(xhci, &xhci->run_regs->microframe_index); 230 temp = xhci_readl(xhci, &xhci->run_regs->microframe_index);
240 xhci_dbg(xhci, " 0x%x: Microframe index = 0x%x\n", 231 xhci_dbg(xhci, " %p: Microframe index = 0x%x\n",
241 (unsigned int) &xhci->run_regs->microframe_index, 232 &xhci->run_regs->microframe_index,
242 (unsigned int) temp); 233 (unsigned int) temp);
243 for (i = 0; i < 7; ++i) { 234 for (i = 0; i < 7; ++i) {
244 temp = xhci_readl(xhci, &xhci->run_regs->rsvd[i]); 235 temp = xhci_readl(xhci, &xhci->run_regs->rsvd[i]);
245 if (temp != XHCI_INIT_VALUE) 236 if (temp != XHCI_INIT_VALUE)
246 xhci_dbg(xhci, " WARN: 0x%x: Rsvd[%i] = 0x%x\n", 237 xhci_dbg(xhci, " WARN: %p: Rsvd[%i] = 0x%x\n",
247 (unsigned int) &xhci->run_regs->rsvd[i], 238 &xhci->run_regs->rsvd[i],
248 i, (unsigned int) temp); 239 i, (unsigned int) temp);
249 } 240 }
250} 241}
@@ -347,14 +338,16 @@ void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg)
347 338
348void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring) 339void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring)
349{ 340{
350 xhci_dbg(xhci, "Ring deq = 0x%x (virt), 0x%x (dma)\n", 341 xhci_dbg(xhci, "Ring deq = %p (virt), 0x%llx (dma)\n",
351 (unsigned int) ring->dequeue, 342 ring->dequeue,
352 trb_virt_to_dma(ring->deq_seg, ring->dequeue)); 343 (unsigned long long)trb_virt_to_dma(ring->deq_seg,
344 ring->dequeue));
353 xhci_dbg(xhci, "Ring deq updated %u times\n", 345 xhci_dbg(xhci, "Ring deq updated %u times\n",
354 ring->deq_updates); 346 ring->deq_updates);
355 xhci_dbg(xhci, "Ring enq = 0x%x (virt), 0x%x (dma)\n", 347 xhci_dbg(xhci, "Ring enq = %p (virt), 0x%llx (dma)\n",
356 (unsigned int) ring->enqueue, 348 ring->enqueue,
357 trb_virt_to_dma(ring->enq_seg, ring->enqueue)); 349 (unsigned long long)trb_virt_to_dma(ring->enq_seg,
350 ring->enqueue));
358 xhci_dbg(xhci, "Ring enq updated %u times\n", 351 xhci_dbg(xhci, "Ring enq updated %u times\n",
359 ring->enq_updates); 352 ring->enq_updates);
360} 353}
@@ -418,42 +411,42 @@ void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_ad
418 /* Fields are 32 bits wide, DMA addresses are in bytes */ 411 /* Fields are 32 bits wide, DMA addresses are in bytes */
419 int field_size = 32 / 8; 412 int field_size = 32 / 8;
420 413
421 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - drop flags\n", 414 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - drop flags\n",
422 (unsigned int) &ctx->drop_flags, 415 &ctx->drop_flags, (unsigned long long)dma,
423 dma, ctx->drop_flags); 416 ctx->drop_flags);
424 dma += field_size; 417 dma += field_size;
425 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - add flags\n", 418 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - add flags\n",
426 (unsigned int) &ctx->add_flags, 419 &ctx->add_flags, (unsigned long long)dma,
427 dma, ctx->add_flags); 420 ctx->add_flags);
428 dma += field_size; 421 dma += field_size;
429 for (i = 0; i > 6; ++i) { 422 for (i = 0; i > 6; ++i) {
430 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - rsvd[%d]\n", 423 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
431 (unsigned int) &ctx->rsvd[i], 424 &ctx->rsvd[i], (unsigned long long)dma,
432 dma, ctx->rsvd[i], i); 425 ctx->rsvd[i], i);
433 dma += field_size; 426 dma += field_size;
434 } 427 }
435 428
436 xhci_dbg(xhci, "Slot Context:\n"); 429 xhci_dbg(xhci, "Slot Context:\n");
437 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - dev_info\n", 430 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info\n",
438 (unsigned int) &ctx->slot.dev_info, 431 &ctx->slot.dev_info,
439 dma, ctx->slot.dev_info); 432 (unsigned long long)dma, ctx->slot.dev_info);
440 dma += field_size; 433 dma += field_size;
441 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - dev_info2\n", 434 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info2\n",
442 (unsigned int) &ctx->slot.dev_info2, 435 &ctx->slot.dev_info2,
443 dma, ctx->slot.dev_info2); 436 (unsigned long long)dma, ctx->slot.dev_info2);
444 dma += field_size; 437 dma += field_size;
445 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - tt_info\n", 438 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tt_info\n",
446 (unsigned int) &ctx->slot.tt_info, 439 &ctx->slot.tt_info,
447 dma, ctx->slot.tt_info); 440 (unsigned long long)dma, ctx->slot.tt_info);
448 dma += field_size; 441 dma += field_size;
449 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - dev_state\n", 442 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_state\n",
450 (unsigned int) &ctx->slot.dev_state, 443 &ctx->slot.dev_state,
451 dma, ctx->slot.dev_state); 444 (unsigned long long)dma, ctx->slot.dev_state);
452 dma += field_size; 445 dma += field_size;
453 for (i = 0; i > 4; ++i) { 446 for (i = 0; i > 4; ++i) {
454 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - rsvd[%d]\n", 447 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
455 (unsigned int) &ctx->slot.reserved[i], 448 &ctx->slot.reserved[i], (unsigned long long)dma,
456 dma, ctx->slot.reserved[i], i); 449 ctx->slot.reserved[i], i);
457 dma += field_size; 450 dma += field_size;
458 } 451 }
459 452
@@ -461,30 +454,31 @@ void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_ad
461 last_ep_ctx = last_ep + 1; 454 last_ep_ctx = last_ep + 1;
462 for (i = 0; i < last_ep_ctx; ++i) { 455 for (i = 0; i < last_ep_ctx; ++i) {
463 xhci_dbg(xhci, "Endpoint %02d Context:\n", i); 456 xhci_dbg(xhci, "Endpoint %02d Context:\n", i);
464 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - ep_info\n", 457 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info\n",
465 (unsigned int) &ctx->ep[i].ep_info, 458 &ctx->ep[i].ep_info,
466 dma, ctx->ep[i].ep_info); 459 (unsigned long long)dma, ctx->ep[i].ep_info);
467 dma += field_size; 460 dma += field_size;
468 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - ep_info2\n", 461 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info2\n",
469 (unsigned int) &ctx->ep[i].ep_info2, 462 &ctx->ep[i].ep_info2,
470 dma, ctx->ep[i].ep_info2); 463 (unsigned long long)dma, ctx->ep[i].ep_info2);
471 dma += field_size; 464 dma += field_size;
472 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - deq[0]\n", 465 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - deq[0]\n",
473 (unsigned int) &ctx->ep[i].deq[0], 466 &ctx->ep[i].deq[0],
474 dma, ctx->ep[i].deq[0]); 467 (unsigned long long)dma, ctx->ep[i].deq[0]);
475 dma += field_size; 468 dma += field_size;
476 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - deq[1]\n", 469 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - deq[1]\n",
477 (unsigned int) &ctx->ep[i].deq[1], 470 &ctx->ep[i].deq[1],
478 dma, ctx->ep[i].deq[1]); 471 (unsigned long long)dma, ctx->ep[i].deq[1]);
479 dma += field_size; 472 dma += field_size;
480 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - tx_info\n", 473 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tx_info\n",
481 (unsigned int) &ctx->ep[i].tx_info, 474 &ctx->ep[i].tx_info,
482 dma, ctx->ep[i].tx_info); 475 (unsigned long long)dma, ctx->ep[i].tx_info);
483 dma += field_size; 476 dma += field_size;
484 for (j = 0; j < 3; ++j) { 477 for (j = 0; j < 3; ++j) {
485 xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - rsvd[%d]\n", 478 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
486 (unsigned int) &ctx->ep[i].reserved[j], 479 &ctx->ep[i].reserved[j],
487 dma, ctx->ep[i].reserved[j], j); 480 (unsigned long long)dma,
481 ctx->ep[i].reserved[j], j);
488 dma += field_size; 482 dma += field_size;
489 } 483 }
490 } 484 }