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authorAlan Stern <stern@rowland.harvard.edu>2006-08-11 11:33:58 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-09-27 14:58:54 -0400
commitde06a3b842b31b31220637c869f112cfbc1a5ef6 (patch)
tree3b179338903b5ad7ca0c0676f14d2ef6437eb545 /drivers/usb/host/uhci-hub.c
parent64a21d025d3a979a8715f2ec7acabca7b5406c8a (diff)
UHCI: increase Resume-Detect-off delay
The UHCI controller in my laptop takes longer to turn off the Resume-Detect bit than the 4 us allowed by uhci-hcd. Presumably other computers will have the same problem. This patch (as752) increases the maximum delay to 10 us, which should be plenty, and uses polling to avoid penalizing systems which can turn the bit off more quickly. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/uhci-hub.c')
-rw-r--r--drivers/usb/host/uhci-hub.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/usb/host/uhci-hub.c b/drivers/usb/host/uhci-hub.c
index c545ef92fe29..16fb72eb6fc9 100644
--- a/drivers/usb/host/uhci-hub.c
+++ b/drivers/usb/host/uhci-hub.c
@@ -84,6 +84,7 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
84 unsigned long port_addr) 84 unsigned long port_addr)
85{ 85{
86 int status; 86 int status;
87 int i;
87 88
88 if (inw(port_addr) & (USBPORTSC_SUSP | USBPORTSC_RD)) { 89 if (inw(port_addr) & (USBPORTSC_SUSP | USBPORTSC_RD)) {
89 CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD); 90 CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD);
@@ -92,9 +93,14 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
92 93
93 /* The controller won't actually turn off the RD bit until 94 /* The controller won't actually turn off the RD bit until
94 * it has had a chance to send a low-speed EOP sequence, 95 * it has had a chance to send a low-speed EOP sequence,
95 * which takes 3 bit times (= 2 microseconds). We'll delay 96 * which is supposed to take 3 bit times (= 2 microseconds).
96 * slightly longer for good luck. */ 97 * Experiments show that some controllers take longer, so
97 udelay(4); 98 * we'll poll for completion. */
99 for (i = 0; i < 10; ++i) {
100 if (!(inw(port_addr) & USBPORTSC_RD))
101 break;
102 udelay(1);
103 }
98 } 104 }
99 clear_bit(port, &uhci->resuming_ports); 105 clear_bit(port, &uhci->resuming_ports);
100} 106}