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authorAlan Stern <stern@rowland.harvard.edu>2005-04-09 17:29:00 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-06-27 17:43:43 -0400
commita8bed8b6be75bc5a46aa599ab360d5f1db291c8f (patch)
treeef6375ec4109d670f95ee0f8481543d10d5c4a5e /drivers/usb/host/uhci-hcd.h
parentc8f4fe4358c5e0a79b4bd47b814d19f1d1d06f21 (diff)
[PATCH] USB UHCI: Add root-hub suspend/resume support
This patch implements (finally!) separate suspend and resume routines for the root hub and the controller in the UHCI driver. It also changes the sequence used to reset the controller during initial probing, so as to preserve the existing state during a Resume-From-Disk. (This new sequence is what should be used in the PCI Quirks code for early USB handoffs, incidentally.) Lastly it adds a notion of the controller being "inaccessible" while in a PCI low-power state, when normal I/O operations shouldn't be allowed. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/uhci-hcd.h')
-rw-r--r--drivers/usb/host/uhci-hcd.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/usb/host/uhci-hcd.h b/drivers/usb/host/uhci-hcd.h
index 4bac57c74ec2..827df5e06800 100644
--- a/drivers/usb/host/uhci-hcd.h
+++ b/drivers/usb/host/uhci-hcd.h
@@ -41,6 +41,7 @@
41#define USBFRNUM 6 41#define USBFRNUM 6
42#define USBFLBASEADD 8 42#define USBFLBASEADD 8
43#define USBSOF 12 43#define USBSOF 12
44#define USBSOF_DEFAULT 64 /* Frame length is exactly 1 ms */
44 45
45/* USB port status and control registers */ 46/* USB port status and control registers */
46#define USBPORTSC1 16 47#define USBPORTSC1 16
@@ -66,6 +67,8 @@
66/* Legacy support register */ 67/* Legacy support register */
67#define USBLEGSUP 0xc0 68#define USBLEGSUP 0xc0
68#define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */ 69#define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
70#define USBLEGSUP_RWC 0x8f00 /* the R/WC bits */
71#define USBLEGSUP_RO 0x5040 /* R/O and reserved bits */
69 72
70#define UHCI_NULL_DATA_SIZE 0x7FF /* for UHCI controller TD */ 73#define UHCI_NULL_DATA_SIZE 0x7FF /* for UHCI controller TD */
71 74
@@ -325,8 +328,9 @@ static inline int __interval_to_skel(int interval)
325 */ 328 */
326enum uhci_rh_state { 329enum uhci_rh_state {
327 /* In the next 4 states the HC must be halted */ 330 /* In the next 4 states the HC must be halted */
328 UHCI_RH_RESET, 331 UHCI_RH_RESET, /* These two must come first */
329 UHCI_RH_SUSPENDED, 332 UHCI_RH_SUSPENDED,
333
330 UHCI_RH_AUTO_STOPPED, 334 UHCI_RH_AUTO_STOPPED,
331 UHCI_RH_RESUMING, 335 UHCI_RH_RESUMING,
332 336
@@ -334,7 +338,8 @@ enum uhci_rh_state {
334 * can legally appear either way */ 338 * can legally appear either way */
335 UHCI_RH_SUSPENDING, 339 UHCI_RH_SUSPENDING,
336 340
337 /* In the next two states it's an error if the HC is halted */ 341 /* In the next two states it's an error if the HC is halted.
342 * These two must come last */
338 UHCI_RH_RUNNING, /* The normal state */ 343 UHCI_RH_RUNNING, /* The normal state */
339 UHCI_RH_RUNNING_NODEVS, /* Running with no devices attached */ 344 UHCI_RH_RUNNING_NODEVS, /* Running with no devices attached */
340}; 345};
@@ -376,6 +381,7 @@ struct uhci_hcd {
376 unsigned int scan_in_progress:1; /* Schedule scan is running */ 381 unsigned int scan_in_progress:1; /* Schedule scan is running */
377 unsigned int need_rescan:1; /* Redo the schedule scan */ 382 unsigned int need_rescan:1; /* Redo the schedule scan */
378 unsigned int resume_detect:1; /* Need a Global Resume */ 383 unsigned int resume_detect:1; /* Need a Global Resume */
384 unsigned int hc_inaccessible:1; /* HC is suspended or dead */
379 385
380 /* Support for port suspend/resume/reset */ 386 /* Support for port suspend/resume/reset */
381 unsigned long port_c_suspend; /* Bit-arrays of ports */ 387 unsigned long port_c_suspend; /* Bit-arrays of ports */