usb: r8a66597-hcd platform data on_chip support

Convert the r8a66597-hcd driver to use the on_chip flag
from platform data to enable on chip behaviour instead
of relying on CONFIG_SUPERH_ON_CHIP_R8A66597 ugliness.

This makes the code cleaner and also allows us to support
both external and internal r8a66597 with the same kernel.

It also makes the Kconfig part more future proof since
we with this patch can add support for new processors
with on-chip r8a66597 without modifying the Kconfig.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 35 insertions, 41 deletions

diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index d72680b433f9..eecbd917bc81 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -26,7 +26,7 @@
 #ifndef __R8A66597_H__
 #define __R8A66597_H__
 
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK)
+#ifdef CONFIG_HAVE_CLK
 #include <linux/clk.h>
 #endif
 
@@ -193,13 +193,9 @@
 #define REW             0x4000  /* b14: Buffer rewind */
 #define DCLRM           0x2000  /* b13: DMA buffer clear mode */
 #define DREQE           0x1000  /* b12: DREQ output enable */
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
-#define MBW             0x0800
-#else
-#define MBW             0x0400  /* b10: Maximum bit width for FIFO access */
-#endif
 #define   MBW_8          0x0000   /*  8bit */
 #define   MBW_16         0x0400   /* 16bit */
+#define   MBW_32         0x0800   /* 32bit */
 #define BIGEND          0x0100  /* b8: Big endian mode */
 #define   BYTE_LITTLE    0x0000         /* little dendian */
 #define   BYTE_BIG       0x0100         /* big endifan */
@@ -405,11 +401,7 @@
 #define R8A66597_MAX_NUM_PIPE           10
 #define R8A66597_BUF_BSIZE              8
 #define R8A66597_MAX_DEVICE             10
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
-#define R8A66597_MAX_ROOT_HUB           1
-#else
 #define R8A66597_MAX_ROOT_HUB           2
-#endif
 #define R8A66597_MAX_SAMPLING           5
 #define R8A66597_RH_POLL_TIME           10
 #define R8A66597_MAX_DMA_CHANNEL        2
@@ -487,7 +479,7 @@ struct r8a66597_root_hub {
 struct r8a66597 {
         spinlock_t lock;
         unsigned long reg;
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK)
+#ifdef CONFIG_HAVE_CLK
         struct clk *clk;
 #endif
         struct r8a66597_platdata        *pdata;
@@ -504,6 +496,7 @@ struct r8a66597 {
         unsigned short interval_map;
         unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE];
         unsigned char dma_map;
+        unsigned int max_root_hub;
 
         struct list_head child_device;
         unsigned long child_connect_map[4];
@@ -550,21 +543,22 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
                                       unsigned long offset, u16 *buf,
                                       int len)
 {
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
         unsigned long fifoaddr = r8a66597->reg + offset;
         unsigned long count;
 
-        count = len / 4;
-        insl(fifoaddr, buf, count);
+        if (r8a66597->pdata->on_chip) {
+                count = len / 4;
+                insl(fifoaddr, buf, count);
 
-        if (len & 0x00000003) {
-                unsigned long tmp = inl(fifoaddr);
-                memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03);
+                if (len & 0x00000003) {
+                        unsigned long tmp = inl(fifoaddr);
+                        memcpy((unsigned char *)buf + count * 4, &tmp,
+                               len & 0x03);
+                }
+        } else {
+                len = (len + 1) / 2;
+                insw(fifoaddr, buf, len);
         }
-#else
-        len = (len + 1) / 2;
-        insw(r8a66597->reg + offset, buf, len);
-#endif
 }
 
 static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
@@ -578,33 +572,33 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
                                        int len)
 {
         unsigned long fifoaddr = r8a66597->reg + offset;
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
         unsigned long count;
         unsigned char *pb;
         int i;
 
-        count = len / 4;
-        outsl(fifoaddr, buf, count);
+        if (r8a66597->pdata->on_chip) {
+                count = len / 4;
+                outsl(fifoaddr, buf, count);
+
+                if (len & 0x00000003) {
+                        pb = (unsigned char *)buf + count * 4;
+                        for (i = 0; i < (len & 0x00000003); i++) {
+                                if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
+                                        outb(pb[i], fifoaddr + i);
+                                else
+                                        outb(pb[i], fifoaddr + 3 - i);
+                        }
+                }
+        } else {
+                int odd = len & 0x0001;
 
-        if (len & 0x00000003) {
-                pb = (unsigned char *)buf + count * 4;
-                for (i = 0; i < (len & 0x00000003); i++) {
-                        if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
-                                outb(pb[i], fifoaddr + i);
-                        else
-                                outb(pb[i], fifoaddr + 3 - i);
+                len = len / 2;
+                outsw(fifoaddr, buf, len);
+                if (unlikely(odd)) {
+                        buf = &buf[len];
+                        outb((unsigned char)*buf, fifoaddr);
                 }
         }
-#else
-        int odd = len & 0x0001;
-
-        len = len / 2;
-        outsw(fifoaddr, buf, len);
-        if (unlikely(odd)) {
-                buf = &buf[len];
-                outb((unsigned char)*buf, fifoaddr);
-        }
-#endif
 }
 
 static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,