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authorDavid Brownell <david-b@pacbell.net>2006-12-05 06:18:31 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2006-12-20 13:14:26 -0500
commitdd9048af41d017f5f9ea18fb451a3b5dc89d6b83 (patch)
treef205763d802ec27d06937bdd79dd598914ad7182 /drivers/usb/host/ohci-q.c
parent23d8c90e5691992a09ab113be2c1a81271b6d0d8 (diff)
USB: ohci whitespace/comment fixups
This is an OHCI cleanup patch ... it removes a lot of erroneous whitespace (space before tab, at end of line) as well as the obsolete inline changelog. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ohci-q.c')
-rw-r--r--drivers/usb/host/ohci-q.c103
1 files changed, 51 insertions, 52 deletions
diff --git a/drivers/usb/host/ohci-q.c b/drivers/usb/host/ohci-q.c
index fe1fe2f97cb5..830a3fe8615e 100644
--- a/drivers/usb/host/ohci-q.c
+++ b/drivers/usb/host/ohci-q.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * OHCI HCD (Host Controller Driver) for USB. 2 * OHCI HCD (Host Controller Driver) for USB.
3 * 3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6 * 6 *
7 * This file is licenced under the GPL. 7 * This file is licenced under the GPL.
8 */ 8 */
9 9
@@ -89,7 +89,7 @@ __acquires(ohci->lock)
89 89
90/*-------------------------------------------------------------------------* 90/*-------------------------------------------------------------------------*
91 * ED handling functions 91 * ED handling functions
92 *-------------------------------------------------------------------------*/ 92 *-------------------------------------------------------------------------*/
93 93
94/* search for the right schedule branch to use for a periodic ed. 94/* search for the right schedule branch to use for a periodic ed.
95 * does some load balancing; returns the branch, or negative errno. 95 * does some load balancing; returns the branch, or negative errno.
@@ -107,7 +107,6 @@ static int balance (struct ohci_hcd *ohci, int interval, int load)
107 */ 107 */
108 for (i = 0; i < interval ; i++) { 108 for (i = 0; i < interval ; i++) {
109 if (branch < 0 || ohci->load [branch] > ohci->load [i]) { 109 if (branch < 0 || ohci->load [branch] > ohci->load [i]) {
110#if 1 /* CONFIG_USB_BANDWIDTH */
111 int j; 110 int j;
112 111
113 /* usb 1.1 says 90% of one frame */ 112 /* usb 1.1 says 90% of one frame */
@@ -117,8 +116,7 @@ static int balance (struct ohci_hcd *ohci, int interval, int load)
117 } 116 }
118 if (j < NUM_INTS) 117 if (j < NUM_INTS)
119 continue; 118 continue;
120#endif 119 branch = i;
121 branch = i;
122 } 120 }
123 } 121 }
124 return branch; 122 return branch;
@@ -171,7 +169,7 @@ static void periodic_link (struct ohci_hcd *ohci, struct ed *ed)
171/* link an ed into one of the HC chains */ 169/* link an ed into one of the HC chains */
172 170
173static int ed_schedule (struct ohci_hcd *ohci, struct ed *ed) 171static int ed_schedule (struct ohci_hcd *ohci, struct ed *ed)
174{ 172{
175 int branch; 173 int branch;
176 174
177 if (ohci_to_hcd(ohci)->state == HC_STATE_QUIESCING) 175 if (ohci_to_hcd(ohci)->state == HC_STATE_QUIESCING)
@@ -248,7 +246,7 @@ static int ed_schedule (struct ohci_hcd *ohci, struct ed *ed)
248 } 246 }
249 ed->branch = branch; 247 ed->branch = branch;
250 periodic_link (ohci, ed); 248 periodic_link (ohci, ed);
251 } 249 }
252 250
253 /* the HC may not see the schedule updates yet, but if it does 251 /* the HC may not see the schedule updates yet, but if it does
254 * then they'll be properly ordered. 252 * then they'll be properly ordered.
@@ -277,7 +275,7 @@ static void periodic_unlink (struct ohci_hcd *ohci, struct ed *ed)
277 *prev = ed->ed_next; 275 *prev = ed->ed_next;
278 } 276 }
279 ohci->load [i] -= ed->load; 277 ohci->load [i] -= ed->load;
280 } 278 }
281 ohci_to_hcd(ohci)->self.bandwidth_allocated -= ed->load / ed->interval; 279 ohci_to_hcd(ohci)->self.bandwidth_allocated -= ed->load / ed->interval;
282 280
283 ohci_vdbg (ohci, "unlink %sed %p branch %d [%dus.], interval %d\n", 281 ohci_vdbg (ohci, "unlink %sed %p branch %d [%dus.], interval %d\n",
@@ -285,7 +283,7 @@ static void periodic_unlink (struct ohci_hcd *ohci, struct ed *ed)
285 ed, ed->branch, ed->load, ed->interval); 283 ed, ed->branch, ed->load, ed->interval);
286} 284}
287 285
288/* unlink an ed from one of the HC chains. 286/* unlink an ed from one of the HC chains.
289 * just the link to the ed is unlinked. 287 * just the link to the ed is unlinked.
290 * the link from the ed still points to another operational ed or 0 288 * the link from the ed still points to another operational ed or 0
291 * so the HC can eventually finish the processing of the unlinked ed 289 * so the HC can eventually finish the processing of the unlinked ed
@@ -307,7 +305,7 @@ static void periodic_unlink (struct ohci_hcd *ohci, struct ed *ed)
307 * When finish_unlinks() runs later, after SOF interrupt, it will often 305 * When finish_unlinks() runs later, after SOF interrupt, it will often
308 * complete one or more URB unlinks before making that state change. 306 * complete one or more URB unlinks before making that state change.
309 */ 307 */
310static void ed_deschedule (struct ohci_hcd *ohci, struct ed *ed) 308static void ed_deschedule (struct ohci_hcd *ohci, struct ed *ed)
311{ 309{
312 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP); 310 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP);
313 wmb (); 311 wmb ();
@@ -397,7 +395,7 @@ static struct ed *ed_get (
397 unsigned int pipe, 395 unsigned int pipe,
398 int interval 396 int interval
399) { 397) {
400 struct ed *ed; 398 struct ed *ed;
401 unsigned long flags; 399 unsigned long flags;
402 400
403 spin_lock_irqsave (&ohci->lock, flags); 401 spin_lock_irqsave (&ohci->lock, flags);
@@ -413,9 +411,9 @@ static struct ed *ed_get (
413 goto done; 411 goto done;
414 } 412 }
415 413
416 /* dummy td; end of td list for ed */ 414 /* dummy td; end of td list for ed */
417 td = td_alloc (ohci, GFP_ATOMIC); 415 td = td_alloc (ohci, GFP_ATOMIC);
418 if (!td) { 416 if (!td) {
419 /* out of memory */ 417 /* out of memory */
420 ed_free (ohci, ed); 418 ed_free (ohci, ed);
421 ed = NULL; 419 ed = NULL;
@@ -462,7 +460,7 @@ static struct ed *ed_get (
462 460
463done: 461done:
464 spin_unlock_irqrestore (&ohci->lock, flags); 462 spin_unlock_irqrestore (&ohci->lock, flags);
465 return ed; 463 return ed;
466} 464}
467 465
468/*-------------------------------------------------------------------------*/ 466/*-------------------------------------------------------------------------*/
@@ -474,7 +472,7 @@ done:
474 * and that ed->state is ED_OPER 472 * and that ed->state is ED_OPER
475 */ 473 */
476static void start_ed_unlink (struct ohci_hcd *ohci, struct ed *ed) 474static void start_ed_unlink (struct ohci_hcd *ohci, struct ed *ed)
477{ 475{
478 ed->hwINFO |= cpu_to_hc32 (ohci, ED_DEQUEUE); 476 ed->hwINFO |= cpu_to_hc32 (ohci, ED_DEQUEUE);
479 ed_deschedule (ohci, ed); 477 ed_deschedule (ohci, ed);
480 478
@@ -541,7 +539,7 @@ td_fill (struct ohci_hcd *ohci, u32 info,
541 td->ed = urb_priv->ed; 539 td->ed = urb_priv->ed;
542 td->next_dl_td = NULL; 540 td->next_dl_td = NULL;
543 td->index = index; 541 td->index = index;
544 td->urb = urb; 542 td->urb = urb;
545 td->data_dma = data; 543 td->data_dma = data;
546 if (!len) 544 if (!len)
547 data = 0; 545 data = 0;
@@ -553,8 +551,8 @@ td_fill (struct ohci_hcd *ohci, u32 info,
553 (data & 0x0FFF) | 0xE000); 551 (data & 0x0FFF) | 0xE000);
554 td->ed->last_iso = info & 0xffff; 552 td->ed->last_iso = info & 0xffff;
555 } else { 553 } else {
556 td->hwCBP = cpu_to_hc32 (ohci, data); 554 td->hwCBP = cpu_to_hc32 (ohci, data);
557 } 555 }
558 if (data) 556 if (data)
559 td->hwBE = cpu_to_hc32 (ohci, data + len - 1); 557 td->hwBE = cpu_to_hc32 (ohci, data + len - 1);
560 else 558 else
@@ -597,7 +595,7 @@ static void td_submit_urb (
597 * use the device toggle bits for resetting, and rely on the fact 595 * use the device toggle bits for resetting, and rely on the fact
598 * that resetting toggle is meaningless if the endpoint is active. 596 * that resetting toggle is meaningless if the endpoint is active.
599 */ 597 */
600 if (!usb_gettoggle (urb->dev, usb_pipeendpoint (urb->pipe), is_out)) { 598 if (!usb_gettoggle (urb->dev, usb_pipeendpoint (urb->pipe), is_out)) {
601 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), 599 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe),
602 is_out, 1); 600 is_out, 1);
603 urb_priv->ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_C); 601 urb_priv->ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_C);
@@ -721,16 +719,16 @@ static void td_done (struct ohci_hcd *ohci, struct urb *urb, struct td *td)
721 list_del (&td->td_list); 719 list_del (&td->td_list);
722 720
723 /* ISO ... drivers see per-TD length/status */ 721 /* ISO ... drivers see per-TD length/status */
724 if (tdINFO & TD_ISO) { 722 if (tdINFO & TD_ISO) {
725 u16 tdPSW = ohci_hwPSW (ohci, td, 0); 723 u16 tdPSW = ohci_hwPSW (ohci, td, 0);
726 int dlen = 0; 724 int dlen = 0;
727 725
728 /* NOTE: assumes FC in tdINFO == 0, and that 726 /* NOTE: assumes FC in tdINFO == 0, and that
729 * only the first of 0..MAXPSW psws is used. 727 * only the first of 0..MAXPSW psws is used.
730 */ 728 */
731 729
732 cc = (tdPSW >> 12) & 0xF; 730 cc = (tdPSW >> 12) & 0xF;
733 if (tdINFO & TD_CC) /* hc didn't touch? */ 731 if (tdINFO & TD_CC) /* hc didn't touch? */
734 return; 732 return;
735 733
736 if (usb_pipeout (urb->pipe)) 734 if (usb_pipeout (urb->pipe))
@@ -758,7 +756,7 @@ static void td_done (struct ohci_hcd *ohci, struct urb *urb, struct td *td)
758 int type = usb_pipetype (urb->pipe); 756 int type = usb_pipetype (urb->pipe);
759 u32 tdBE = hc32_to_cpup (ohci, &td->hwBE); 757 u32 tdBE = hc32_to_cpup (ohci, &td->hwBE);
760 758
761 cc = TD_CC_GET (tdINFO); 759 cc = TD_CC_GET (tdINFO);
762 760
763 /* update packet status if needed (short is normally ok) */ 761 /* update packet status if needed (short is normally ok) */
764 if (cc == TD_DATAUNDERRUN 762 if (cc == TD_DATAUNDERRUN
@@ -787,7 +785,7 @@ static void td_done (struct ohci_hcd *ohci, struct urb *urb, struct td *td)
787 urb, td, 1 + td->index, cc, 785 urb, td, 1 + td->index, cc,
788 urb->actual_length, 786 urb->actual_length,
789 urb->transfer_buffer_length); 787 urb->transfer_buffer_length);
790 } 788 }
791} 789}
792 790
793/*-------------------------------------------------------------------------*/ 791/*-------------------------------------------------------------------------*/
@@ -795,7 +793,7 @@ static void td_done (struct ohci_hcd *ohci, struct urb *urb, struct td *td)
795static inline struct td * 793static inline struct td *
796ed_halted (struct ohci_hcd *ohci, struct td *td, int cc, struct td *rev) 794ed_halted (struct ohci_hcd *ohci, struct td *td, int cc, struct td *rev)
797{ 795{
798 struct urb *urb = td->urb; 796 struct urb *urb = td->urb;
799 struct ed *ed = td->ed; 797 struct ed *ed = td->ed;
800 struct list_head *tmp = td->td_list.next; 798 struct list_head *tmp = td->td_list.next;
801 __hc32 toggle = ed->hwHeadP & cpu_to_hc32 (ohci, ED_C); 799 __hc32 toggle = ed->hwHeadP & cpu_to_hc32 (ohci, ED_C);
@@ -805,7 +803,7 @@ ed_halted (struct ohci_hcd *ohci, struct td *td, int cc, struct td *rev)
805 */ 803 */
806 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP); 804 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP);
807 wmb (); 805 wmb ();
808 ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_H); 806 ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_H);
809 807
810 /* put any later tds from this urb onto the donelist, after 'td', 808 /* put any later tds from this urb onto the donelist, after 'td',
811 * order won't matter here: no errors, and nothing was transferred. 809 * order won't matter here: no errors, and nothing was transferred.
@@ -833,7 +831,7 @@ ed_halted (struct ohci_hcd *ohci, struct td *td, int cc, struct td *rev)
833 info &= ~cpu_to_hc32 (ohci, TD_CC); 831 info &= ~cpu_to_hc32 (ohci, TD_CC);
834 next->hwINFO = info; 832 next->hwINFO = info;
835 833
836 next->next_dl_td = rev; 834 next->next_dl_td = rev;
837 rev = next; 835 rev = next;
838 836
839 ed->hwHeadP = next->hwNextTD | toggle; 837 ed->hwHeadP = next->hwNextTD | toggle;
@@ -881,8 +879,8 @@ static struct td *dl_reverse_done_list (struct ohci_hcd *ohci)
881 /* get TD from hc's singly linked list, and 879 /* get TD from hc's singly linked list, and
882 * prepend to ours. ed->td_list changes later. 880 * prepend to ours. ed->td_list changes later.
883 */ 881 */
884 while (td_dma) { 882 while (td_dma) {
885 int cc; 883 int cc;
886 884
887 td = dma_to_td (ohci, td_dma); 885 td = dma_to_td (ohci, td_dma);
888 if (!td) { 886 if (!td) {
@@ -901,10 +899,10 @@ static struct td *dl_reverse_done_list (struct ohci_hcd *ohci)
901 && (td->ed->hwHeadP & cpu_to_hc32 (ohci, ED_H))) 899 && (td->ed->hwHeadP & cpu_to_hc32 (ohci, ED_H)))
902 td_rev = ed_halted (ohci, td, cc, td_rev); 900 td_rev = ed_halted (ohci, td, cc, td_rev);
903 901
904 td->next_dl_td = td_rev; 902 td->next_dl_td = td_rev;
905 td_rev = td; 903 td_rev = td;
906 td_dma = hc32_to_cpup (ohci, &td->hwNextTD); 904 td_dma = hc32_to_cpup (ohci, &td->hwNextTD);
907 } 905 }
908 return td_rev; 906 return td_rev;
909} 907}
910 908
@@ -1013,9 +1011,9 @@ rescan_this:
1013 1011
1014 if (modified) 1012 if (modified)
1015 goto rescan_all; 1013 goto rescan_all;
1016 } 1014 }
1017 1015
1018 /* maybe reenable control and bulk lists */ 1016 /* maybe reenable control and bulk lists */
1019 if (HC_IS_RUNNING(ohci_to_hcd(ohci)->state) 1017 if (HC_IS_RUNNING(ohci_to_hcd(ohci)->state)
1020 && ohci_to_hcd(ohci)->state != HC_STATE_QUIESCING 1018 && ohci_to_hcd(ohci)->state != HC_STATE_QUIESCING
1021 && !ohci->ed_rm_list) { 1019 && !ohci->ed_rm_list) {
@@ -1041,20 +1039,20 @@ rescan_this:
1041 &ohci->regs->ed_bulkcurrent); 1039 &ohci->regs->ed_bulkcurrent);
1042 } 1040 }
1043 } 1041 }
1044 1042
1045 /* CLE/BLE to enable, CLF/BLF to (maybe) kickstart */ 1043 /* CLE/BLE to enable, CLF/BLF to (maybe) kickstart */
1046 if (control) { 1044 if (control) {
1047 ohci->hc_control |= control; 1045 ohci->hc_control |= control;
1048 if (ohci->flags & OHCI_QUIRK_ZFMICRO) 1046 if (ohci->flags & OHCI_QUIRK_ZFMICRO)
1049 mdelay(1); 1047 mdelay(1);
1050 ohci_writel (ohci, ohci->hc_control, 1048 ohci_writel (ohci, ohci->hc_control,
1051 &ohci->regs->control); 1049 &ohci->regs->control);
1052 } 1050 }
1053 if (command) { 1051 if (command) {
1054 if (ohci->flags & OHCI_QUIRK_ZFMICRO) 1052 if (ohci->flags & OHCI_QUIRK_ZFMICRO)
1055 mdelay(1); 1053 mdelay(1);
1056 ohci_writel (ohci, command, &ohci->regs->cmdstatus); 1054 ohci_writel (ohci, command, &ohci->regs->cmdstatus);
1057 } 1055 }
1058 } 1056 }
1059} 1057}
1060 1058
@@ -1074,19 +1072,19 @@ dl_done_list (struct ohci_hcd *ohci)
1074{ 1072{
1075 struct td *td = dl_reverse_done_list (ohci); 1073 struct td *td = dl_reverse_done_list (ohci);
1076 1074
1077 while (td) { 1075 while (td) {
1078 struct td *td_next = td->next_dl_td; 1076 struct td *td_next = td->next_dl_td;
1079 struct urb *urb = td->urb; 1077 struct urb *urb = td->urb;
1080 urb_priv_t *urb_priv = urb->hcpriv; 1078 urb_priv_t *urb_priv = urb->hcpriv;
1081 struct ed *ed = td->ed; 1079 struct ed *ed = td->ed;
1082 1080
1083 /* update URB's length and status from TD */ 1081 /* update URB's length and status from TD */
1084 td_done (ohci, urb, td); 1082 td_done (ohci, urb, td);
1085 urb_priv->td_cnt++; 1083 urb_priv->td_cnt++;
1086 1084
1087 /* If all this urb's TDs are done, call complete() */ 1085 /* If all this urb's TDs are done, call complete() */
1088 if (urb_priv->td_cnt == urb_priv->length) 1086 if (urb_priv->td_cnt == urb_priv->length)
1089 finish_urb (ohci, urb); 1087 finish_urb (ohci, urb);
1090 1088
1091 /* clean schedule: unlink EDs that are no longer busy */ 1089 /* clean schedule: unlink EDs that are no longer busy */
1092 if (list_empty (&ed->td_list)) { 1090 if (list_empty (&ed->td_list)) {
@@ -1094,25 +1092,26 @@ dl_done_list (struct ohci_hcd *ohci)
1094 start_ed_unlink (ohci, ed); 1092 start_ed_unlink (ohci, ed);
1095 1093
1096 /* ... reenabling halted EDs only after fault cleanup */ 1094 /* ... reenabling halted EDs only after fault cleanup */
1097 } else if ((ed->hwINFO & cpu_to_hc32 (ohci, ED_SKIP | ED_DEQUEUE)) 1095 } else if ((ed->hwINFO & cpu_to_hc32 (ohci,
1096 ED_SKIP | ED_DEQUEUE))
1098 == cpu_to_hc32 (ohci, ED_SKIP)) { 1097 == cpu_to_hc32 (ohci, ED_SKIP)) {
1099 td = list_entry (ed->td_list.next, struct td, td_list); 1098 td = list_entry (ed->td_list.next, struct td, td_list);
1100 if (!(td->hwINFO & cpu_to_hc32 (ohci, TD_DONE))) { 1099 if (!(td->hwINFO & cpu_to_hc32 (ohci, TD_DONE))) {
1101 ed->hwINFO &= ~cpu_to_hc32 (ohci, ED_SKIP); 1100 ed->hwINFO &= ~cpu_to_hc32 (ohci, ED_SKIP);
1102 /* ... hc may need waking-up */ 1101 /* ... hc may need waking-up */
1103 switch (ed->type) { 1102 switch (ed->type) {
1104 case PIPE_CONTROL: 1103 case PIPE_CONTROL:
1105 ohci_writel (ohci, OHCI_CLF, 1104 ohci_writel (ohci, OHCI_CLF,
1106 &ohci->regs->cmdstatus); 1105 &ohci->regs->cmdstatus);
1107 break; 1106 break;
1108 case PIPE_BULK: 1107 case PIPE_BULK:
1109 ohci_writel (ohci, OHCI_BLF, 1108 ohci_writel (ohci, OHCI_BLF,
1110 &ohci->regs->cmdstatus); 1109 &ohci->regs->cmdstatus);
1111 break; 1110 break;
1112 } 1111 }
1113 } 1112 }
1114 } 1113 }
1115 1114
1116 td = td_next; 1115 td = td_next;
1117 } 1116 }
1118} 1117}