diff options
author | Arvid Brodin <arvid.brodin@enea.com> | 2011-04-26 15:48:02 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-05-02 20:02:55 -0400 |
commit | eb1a796868effbf33ec2cfa3d15567d7e31f2ee2 (patch) | |
tree | 48cdc9ec84c6aee5f0fe43c148949abc0ba35287 /drivers/usb/host/isp1760-hcd.h | |
parent | 34537731d7f64d20116fbef4a665ec6a37195573 (diff) |
usb/isp1760: Remove unneeded OR map and HcBufferStatus code
Since we always set the OR flag for each transfer, we can just as well set all
these bits to 1 at init and be done with it. Also, HcBufferStatus can be set
at init as per the ISP1761 datasheet page 47 with no loss of performance.
Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/isp1760-hcd.h')
-rw-r--r-- | drivers/usb/host/isp1760-hcd.h | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/drivers/usb/host/isp1760-hcd.h b/drivers/usb/host/isp1760-hcd.h index 870507690607..056e046b0d42 100644 --- a/drivers/usb/host/isp1760-hcd.h +++ b/drivers/usb/host/isp1760-hcd.h | |||
@@ -49,10 +49,9 @@ void deinit_kmem_cache(void); | |||
49 | #define SW_RESET_RESET_ALL (1 << 0) | 49 | #define SW_RESET_RESET_ALL (1 << 0) |
50 | 50 | ||
51 | #define HC_BUFFER_STATUS_REG 0x334 | 51 | #define HC_BUFFER_STATUS_REG 0x334 |
52 | #define ATL_BUFFER 0x1 | 52 | #define ISO_BUF_FILL (1 << 2) |
53 | #define INT_BUFFER 0x2 | 53 | #define INT_BUF_FILL (1 << 1) |
54 | #define ISO_BUFFER 0x4 | 54 | #define ATL_BUF_FILL (1 << 0) |
55 | #define BUFFER_MAP 0x7 | ||
56 | 55 | ||
57 | #define HC_MEMORY_REG 0x33c | 56 | #define HC_MEMORY_REG 0x33c |
58 | #define ISP_BANK(x) ((x) << 16) | 57 | #define ISP_BANK(x) ((x) << 16) |
@@ -68,14 +67,13 @@ void deinit_kmem_cache(void); | |||
68 | #define HC_INTERRUPT_REG 0x310 | 67 | #define HC_INTERRUPT_REG 0x310 |
69 | 68 | ||
70 | #define HC_INTERRUPT_ENABLE 0x314 | 69 | #define HC_INTERRUPT_ENABLE 0x314 |
71 | #define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT | HC_EOT_INT) | ||
72 | #define INTERRUPT_ENABLE_SOT_MASK (HC_INTL_INT | HC_SOT_INT | HC_EOT_INT) | ||
73 | |||
74 | #define HC_ISO_INT (1 << 9) | 70 | #define HC_ISO_INT (1 << 9) |
75 | #define HC_ATL_INT (1 << 8) | 71 | #define HC_ATL_INT (1 << 8) |
76 | #define HC_INTL_INT (1 << 7) | 72 | #define HC_INTL_INT (1 << 7) |
77 | #define HC_EOT_INT (1 << 3) | 73 | #define HC_EOT_INT (1 << 3) |
78 | #define HC_SOT_INT (1 << 1) | 74 | #define HC_SOT_INT (1 << 1) |
75 | #define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT) | ||
76 | #define INTERRUPT_ENABLE_SOT_MASK (HC_SOT_INT) | ||
79 | 77 | ||
80 | #define HC_ISO_IRQ_MASK_OR_REG 0x318 | 78 | #define HC_ISO_IRQ_MASK_OR_REG 0x318 |
81 | #define HC_INT_IRQ_MASK_OR_REG 0x31C | 79 | #define HC_INT_IRQ_MASK_OR_REG 0x31C |