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authorStefan Roese <ml@stefan-roese.de>2007-05-01 12:29:37 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2007-07-12 19:29:45 -0400
commit6dbd682b7c6d58916096616cdf94852641bc09d9 (patch)
tree74bc2fa9038a426ac5f81969ad85cae5e4262501 /drivers/usb/host/ehci-sched.c
parent196705c9bbc03540429b0f7cf9ee35c2f928a534 (diff)
USB: EHCI support for big-endian descriptors
This patch implements supports for EHCI controllers whose in-memory data structures are represented in big-endian format. This is needed (unfortunately) for the AMCC PPC440EPx SoC EHCI controller; the EHCI spec doesn't specify little-endian format, although that's what most other implementations use. The guts of the patch are to introduce the hc32 type and change all references from le32 to hc32. All access routines are converted from cpu_to_le32(...) to cpu_to_hc32(ehci, ...) and similar for the other "direction". (This is the same approach used with OHCI.) David fixed: Whitespace fixes; refresh against ehci cpufreq patch; move glue for that PPC driver to the patch adding it; fix free symbol capture bugs in modified "constant" macros; and make "hc32" etc be "le32" unless we really need the BE options, so "sparse" can do some real good. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ehci-sched.c')
-rw-r--r--drivers/usb/host/ehci-sched.c248
1 files changed, 130 insertions, 118 deletions
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
index 500aebbaa741..d4a8ace49676 100644
--- a/drivers/usb/host/ehci-sched.c
+++ b/drivers/usb/host/ehci-sched.c
@@ -44,9 +44,10 @@ static int ehci_get_frame (struct usb_hcd *hcd);
44 * @tag: hardware tag for type of this record 44 * @tag: hardware tag for type of this record
45 */ 45 */
46static union ehci_shadow * 46static union ehci_shadow *
47periodic_next_shadow (union ehci_shadow *periodic, __le32 tag) 47periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
48 __hc32 tag)
48{ 49{
49 switch (tag) { 50 switch (hc32_to_cpu(ehci, tag)) {
50 case Q_TYPE_QH: 51 case Q_TYPE_QH:
51 return &periodic->qh->qh_next; 52 return &periodic->qh->qh_next;
52 case Q_TYPE_FSTN: 53 case Q_TYPE_FSTN:
@@ -62,13 +63,14 @@ periodic_next_shadow (union ehci_shadow *periodic, __le32 tag)
62/* caller must hold ehci->lock */ 63/* caller must hold ehci->lock */
63static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr) 64static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
64{ 65{
65 union ehci_shadow *prev_p = &ehci->pshadow [frame]; 66 union ehci_shadow *prev_p = &ehci->pshadow[frame];
66 __le32 *hw_p = &ehci->periodic [frame]; 67 __hc32 *hw_p = &ehci->periodic[frame];
67 union ehci_shadow here = *prev_p; 68 union ehci_shadow here = *prev_p;
68 69
69 /* find predecessor of "ptr"; hw and shadow lists are in sync */ 70 /* find predecessor of "ptr"; hw and shadow lists are in sync */
70 while (here.ptr && here.ptr != ptr) { 71 while (here.ptr && here.ptr != ptr) {
71 prev_p = periodic_next_shadow (prev_p, Q_NEXT_TYPE (*hw_p)); 72 prev_p = periodic_next_shadow(ehci, prev_p,
73 Q_NEXT_TYPE(ehci, *hw_p));
72 hw_p = here.hw_next; 74 hw_p = here.hw_next;
73 here = *prev_p; 75 here = *prev_p;
74 } 76 }
@@ -79,7 +81,8 @@ static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
79 /* update shadow and hardware lists ... the old "next" pointers 81 /* update shadow and hardware lists ... the old "next" pointers
80 * from ptr may still be in use, the caller updates them. 82 * from ptr may still be in use, the caller updates them.
81 */ 83 */
82 *prev_p = *periodic_next_shadow (&here, Q_NEXT_TYPE (*hw_p)); 84 *prev_p = *periodic_next_shadow(ehci, &here,
85 Q_NEXT_TYPE(ehci, *hw_p));
83 *hw_p = *here.hw_next; 86 *hw_p = *here.hw_next;
84} 87}
85 88
@@ -87,18 +90,19 @@ static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
87static unsigned short 90static unsigned short
88periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) 91periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
89{ 92{
90 __le32 *hw_p = &ehci->periodic [frame]; 93 __hc32 *hw_p = &ehci->periodic [frame];
91 union ehci_shadow *q = &ehci->pshadow [frame]; 94 union ehci_shadow *q = &ehci->pshadow [frame];
92 unsigned usecs = 0; 95 unsigned usecs = 0;
93 96
94 while (q->ptr) { 97 while (q->ptr) {
95 switch (Q_NEXT_TYPE (*hw_p)) { 98 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
96 case Q_TYPE_QH: 99 case Q_TYPE_QH:
97 /* is it in the S-mask? */ 100 /* is it in the S-mask? */
98 if (q->qh->hw_info2 & cpu_to_le32 (1 << uframe)) 101 if (q->qh->hw_info2 & cpu_to_hc32(ehci, 1 << uframe))
99 usecs += q->qh->usecs; 102 usecs += q->qh->usecs;
100 /* ... or C-mask? */ 103 /* ... or C-mask? */
101 if (q->qh->hw_info2 & cpu_to_le32 (1 << (8 + uframe))) 104 if (q->qh->hw_info2 & cpu_to_hc32(ehci,
105 1 << (8 + uframe)))
102 usecs += q->qh->c_usecs; 106 usecs += q->qh->c_usecs;
103 hw_p = &q->qh->hw_next; 107 hw_p = &q->qh->hw_next;
104 q = &q->qh->qh_next; 108 q = &q->qh->qh_next;
@@ -108,7 +112,7 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
108 /* for "save place" FSTNs, count the relevant INTR 112 /* for "save place" FSTNs, count the relevant INTR
109 * bandwidth from the previous frame 113 * bandwidth from the previous frame
110 */ 114 */
111 if (q->fstn->hw_prev != EHCI_LIST_END) { 115 if (q->fstn->hw_prev != EHCI_LIST_END(ehci)) {
112 ehci_dbg (ehci, "ignoring FSTN cost ...\n"); 116 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
113 } 117 }
114 hw_p = &q->fstn->hw_next; 118 hw_p = &q->fstn->hw_next;
@@ -121,9 +125,10 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
121 break; 125 break;
122 case Q_TYPE_SITD: 126 case Q_TYPE_SITD:
123 /* is it in the S-mask? (count SPLIT, DATA) */ 127 /* is it in the S-mask? (count SPLIT, DATA) */
124 if (q->sitd->hw_uframe & cpu_to_le32 (1 << uframe)) { 128 if (q->sitd->hw_uframe & cpu_to_hc32(ehci,
129 1 << uframe)) {
125 if (q->sitd->hw_fullspeed_ep & 130 if (q->sitd->hw_fullspeed_ep &
126 __constant_cpu_to_le32 (1<<31)) 131 cpu_to_hc32(ehci, 1<<31))
127 usecs += q->sitd->stream->usecs; 132 usecs += q->sitd->stream->usecs;
128 else /* worst case for OUT start-split */ 133 else /* worst case for OUT start-split */
129 usecs += HS_USECS_ISO (188); 134 usecs += HS_USECS_ISO (188);
@@ -131,7 +136,7 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
131 136
132 /* ... C-mask? (count CSPLIT, DATA) */ 137 /* ... C-mask? (count CSPLIT, DATA) */
133 if (q->sitd->hw_uframe & 138 if (q->sitd->hw_uframe &
134 cpu_to_le32 (1 << (8 + uframe))) { 139 cpu_to_hc32(ehci, 1 << (8 + uframe))) {
135 /* worst case for IN complete-split */ 140 /* worst case for IN complete-split */
136 usecs += q->sitd->stream->c_usecs; 141 usecs += q->sitd->stream->c_usecs;
137 } 142 }
@@ -173,9 +178,9 @@ static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
173 * will cause a transfer in "B-frame" uframe 0. "B-frames" lag 178 * will cause a transfer in "B-frame" uframe 0. "B-frames" lag
174 * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7. 179 * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7.
175 */ 180 */
176static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __le32 mask) 181static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask)
177{ 182{
178 unsigned char smask = QH_SMASK & le32_to_cpu(mask); 183 unsigned char smask = QH_SMASK & hc32_to_cpu(ehci, mask);
179 if (!smask) { 184 if (!smask) {
180 ehci_err(ehci, "invalid empty smask!\n"); 185 ehci_err(ehci, "invalid empty smask!\n");
181 /* uframe 7 can't have bw so this will indicate failure */ 186 /* uframe 7 can't have bw so this will indicate failure */
@@ -217,14 +222,14 @@ periodic_tt_usecs (
217 unsigned short tt_usecs[8] 222 unsigned short tt_usecs[8]
218) 223)
219{ 224{
220 __le32 *hw_p = &ehci->periodic [frame]; 225 __hc32 *hw_p = &ehci->periodic [frame];
221 union ehci_shadow *q = &ehci->pshadow [frame]; 226 union ehci_shadow *q = &ehci->pshadow [frame];
222 unsigned char uf; 227 unsigned char uf;
223 228
224 memset(tt_usecs, 0, 16); 229 memset(tt_usecs, 0, 16);
225 230
226 while (q->ptr) { 231 while (q->ptr) {
227 switch (Q_NEXT_TYPE(*hw_p)) { 232 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
228 case Q_TYPE_ITD: 233 case Q_TYPE_ITD:
229 hw_p = &q->itd->hw_next; 234 hw_p = &q->itd->hw_next;
230 q = &q->itd->itd_next; 235 q = &q->itd->itd_next;
@@ -247,8 +252,8 @@ periodic_tt_usecs (
247 continue; 252 continue;
248 // case Q_TYPE_FSTN: 253 // case Q_TYPE_FSTN:
249 default: 254 default:
250 ehci_dbg(ehci, 255 ehci_dbg(ehci, "ignoring periodic frame %d FSTN\n",
251 "ignoring periodic frame %d FSTN\n", frame); 256 frame);
252 hw_p = &q->fstn->hw_next; 257 hw_p = &q->fstn->hw_next;
253 q = &q->fstn->fstn_next; 258 q = &q->fstn->fstn_next;
254 } 259 }
@@ -368,41 +373,42 @@ static int tt_no_collision (
368 */ 373 */
369 for (; frame < ehci->periodic_size; frame += period) { 374 for (; frame < ehci->periodic_size; frame += period) {
370 union ehci_shadow here; 375 union ehci_shadow here;
371 __le32 type; 376 __hc32 type;
372 377
373 here = ehci->pshadow [frame]; 378 here = ehci->pshadow [frame];
374 type = Q_NEXT_TYPE (ehci->periodic [frame]); 379 type = Q_NEXT_TYPE(ehci, ehci->periodic [frame]);
375 while (here.ptr) { 380 while (here.ptr) {
376 switch (type) { 381 switch (hc32_to_cpu(ehci, type)) {
377 case Q_TYPE_ITD: 382 case Q_TYPE_ITD:
378 type = Q_NEXT_TYPE (here.itd->hw_next); 383 type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
379 here = here.itd->itd_next; 384 here = here.itd->itd_next;
380 continue; 385 continue;
381 case Q_TYPE_QH: 386 case Q_TYPE_QH:
382 if (same_tt (dev, here.qh->dev)) { 387 if (same_tt (dev, here.qh->dev)) {
383 u32 mask; 388 u32 mask;
384 389
385 mask = le32_to_cpu (here.qh->hw_info2); 390 mask = hc32_to_cpu(ehci,
391 here.qh->hw_info2);
386 /* "knows" no gap is needed */ 392 /* "knows" no gap is needed */
387 mask |= mask >> 8; 393 mask |= mask >> 8;
388 if (mask & uf_mask) 394 if (mask & uf_mask)
389 break; 395 break;
390 } 396 }
391 type = Q_NEXT_TYPE (here.qh->hw_next); 397 type = Q_NEXT_TYPE(ehci, here.qh->hw_next);
392 here = here.qh->qh_next; 398 here = here.qh->qh_next;
393 continue; 399 continue;
394 case Q_TYPE_SITD: 400 case Q_TYPE_SITD:
395 if (same_tt (dev, here.sitd->urb->dev)) { 401 if (same_tt (dev, here.sitd->urb->dev)) {
396 u16 mask; 402 u16 mask;
397 403
398 mask = le32_to_cpu (here.sitd 404 mask = hc32_to_cpu(ehci, here.sitd
399 ->hw_uframe); 405 ->hw_uframe);
400 /* FIXME assumes no gap for IN! */ 406 /* FIXME assumes no gap for IN! */
401 mask |= mask >> 8; 407 mask |= mask >> 8;
402 if (mask & uf_mask) 408 if (mask & uf_mask)
403 break; 409 break;
404 } 410 }
405 type = Q_NEXT_TYPE (here.sitd->hw_next); 411 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
406 here = here.sitd->sitd_next; 412 here = here.sitd->sitd_next;
407 continue; 413 continue;
408 // case Q_TYPE_FSTN: 414 // case Q_TYPE_FSTN:
@@ -475,13 +481,6 @@ static int disable_periodic (struct ehci_hcd *ehci)
475/*-------------------------------------------------------------------------*/ 481/*-------------------------------------------------------------------------*/
476#ifdef CONFIG_CPU_FREQ 482#ifdef CONFIG_CPU_FREQ
477 483
478/* ignore/inactivate bit in QH hw_info1 */
479#define INACTIVATE_BIT __constant_cpu_to_le32(QH_INACTIVATE)
480
481#define HALT_BIT __constant_cpu_to_le32(QTD_STS_HALT)
482#define ACTIVE_BIT __constant_cpu_to_le32(QTD_STS_ACTIVE)
483#define STATUS_BIT __constant_cpu_to_le32(QTD_STS_STS)
484
485static int safe_to_modify_i (struct ehci_hcd *ehci, struct ehci_qh *qh) 484static int safe_to_modify_i (struct ehci_hcd *ehci, struct ehci_qh *qh)
486{ 485{
487 int now; /* current (frame * 8) + uframe */ 486 int now; /* current (frame * 8) + uframe */
@@ -492,8 +491,8 @@ static int safe_to_modify_i (struct ehci_hcd *ehci, struct ehci_qh *qh)
492 491
493 now = readl(&ehci->regs->frame_index) % (ehci->periodic_size << 3); 492 now = readl(&ehci->regs->frame_index) % (ehci->periodic_size << 3);
494 493
495 next_start = ((1024 << 3) + (qh->start << 3) + start_uframe - now) % 494 next_start = ((1024 << 3) + (qh->start << 3) + start_uframe - now)
496 (qh->period << 3); 495 % (qh->period << 3);
497 prev_start = (qh->period << 3) - next_start; 496 prev_start = (qh->period << 3) - next_start;
498 497
499 /* 498 /*
@@ -510,7 +509,7 @@ static int safe_to_modify_i (struct ehci_hcd *ehci, struct ehci_qh *qh)
510 */ 509 */
511 if ((next_start > ehci->i_thresh) && (prev_start > 1)) 510 if ((next_start > ehci->i_thresh) && (prev_start > 1))
512 /* safe to set "i" bit if split isn't in progress */ 511 /* safe to set "i" bit if split isn't in progress */
513 return (qh->hw_token & STATUS_BIT) ? 0 : 1; 512 return (qh->hw_token & STATUS_BIT(ehci)) ? 0 : 1;
514 else 513 else
515 return 0; 514 return 0;
516} 515}
@@ -520,12 +519,14 @@ static void qh_inactivate_split_intr_qhs (struct ehci_hcd *ehci)
520{ 519{
521 struct ehci_qh *qh; 520 struct ehci_qh *qh;
522 int not_done, safe; 521 int not_done, safe;
522 u32 inactivate = INACTIVATE_BIT(ehci);
523 u32 active = ACTIVE_BIT(ehci);
523 524
524 do { 525 do {
525 not_done = 0; 526 not_done = 0;
526 list_for_each_entry(qh, &ehci->split_intr_qhs, 527 list_for_each_entry(qh, &ehci->split_intr_qhs,
527 split_intr_qhs) { 528 split_intr_qhs) {
528 if (qh->hw_info1 & INACTIVATE_BIT) 529 if (qh->hw_info1 & inactivate)
529 /* already off */ 530 /* already off */
530 continue; 531 continue;
531 /* 532 /*
@@ -539,8 +540,8 @@ static void qh_inactivate_split_intr_qhs (struct ehci_hcd *ehci)
539 if (safe == 0) { 540 if (safe == 0) {
540 not_done = 1; 541 not_done = 1;
541 } else if (safe > 0) { 542 } else if (safe > 0) {
542 qh->was_active = qh->hw_token & ACTIVE_BIT; 543 qh->was_active = qh->hw_token & active;
543 qh->hw_info1 |= INACTIVATE_BIT; 544 qh->hw_info1 |= inactivate;
544 } 545 }
545 } 546 }
546 } while (not_done); 547 } while (not_done);
@@ -552,11 +553,14 @@ static void qh_reactivate_split_intr_qhs (struct ehci_hcd *ehci)
552 struct ehci_qh *qh; 553 struct ehci_qh *qh;
553 u32 token; 554 u32 token;
554 int not_done, safe; 555 int not_done, safe;
556 u32 inactivate = INACTIVATE_BIT(ehci);
557 u32 active = ACTIVE_BIT(ehci);
558 u32 halt = HALT_BIT(ehci);
555 559
556 do { 560 do {
557 not_done = 0; 561 not_done = 0;
558 list_for_each_entry(qh, &ehci->split_intr_qhs, split_intr_qhs) { 562 list_for_each_entry(qh, &ehci->split_intr_qhs, split_intr_qhs) {
559 if (!(qh->hw_info1 & INACTIVATE_BIT)) /* already on */ 563 if (!(qh->hw_info1 & inactivate)) /* already on */
560 continue; 564 continue;
561 /* 565 /*
562 * Don't reactivate if cached, or controller might 566 * Don't reactivate if cached, or controller might
@@ -568,11 +572,11 @@ static void qh_reactivate_split_intr_qhs (struct ehci_hcd *ehci)
568 } else if (safe > 0) { 572 } else if (safe > 0) {
569 /* See EHCI 1.0 section 4.15.2.4. */ 573 /* See EHCI 1.0 section 4.15.2.4. */
570 token = qh->hw_token; 574 token = qh->hw_token;
571 qh->hw_token = (token | HALT_BIT) & ~ACTIVE_BIT; 575 qh->hw_token = (token | halt) & ~active;
572 wmb(); 576 wmb();
573 qh->hw_info1 &= ~INACTIVATE_BIT; 577 qh->hw_info1 &= ~inactivate;
574 wmb(); 578 wmb();
575 qh->hw_token = (token & ~HALT_BIT) | qh->was_active; 579 qh->hw_token = (token & ~halt) | qh->was_active;
576 } 580 }
577 } 581 }
578 } while (not_done); 582 } while (not_done);
@@ -592,7 +596,7 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
592 596
593 dev_dbg (&qh->dev->dev, 597 dev_dbg (&qh->dev->dev,
594 "link qh%d-%04x/%p start %d [%d/%d us]\n", 598 "link qh%d-%04x/%p start %d [%d/%d us]\n",
595 period, le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), 599 period, hc32_to_cpup(ehci, &qh->hw_info2) & (QH_CMASK | QH_SMASK),
596 qh, qh->start, qh->usecs, qh->c_usecs); 600 qh, qh->start, qh->usecs, qh->c_usecs);
597 601
598#ifdef CONFIG_CPU_FREQ 602#ifdef CONFIG_CPU_FREQ
@@ -603,7 +607,7 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
603 */ 607 */
604 if (ehci->cpufreq_changing) 608 if (ehci->cpufreq_changing)
605 if (!(qh->hw_info1 & (cpu_to_le32(1 << 13)))) 609 if (!(qh->hw_info1 & (cpu_to_le32(1 << 13))))
606 qh->hw_info1 |= INACTIVATE_BIT; 610 qh->hw_info1 |= INACTIVATE_BIT(ehci);
607#endif 611#endif
608 612
609 /* high bandwidth, or otherwise every microframe */ 613 /* high bandwidth, or otherwise every microframe */
@@ -611,17 +615,17 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
611 period = 1; 615 period = 1;
612 616
613 for (i = qh->start; i < ehci->periodic_size; i += period) { 617 for (i = qh->start; i < ehci->periodic_size; i += period) {
614 union ehci_shadow *prev = &ehci->pshadow [i]; 618 union ehci_shadow *prev = &ehci->pshadow[i];
615 __le32 *hw_p = &ehci->periodic [i]; 619 __hc32 *hw_p = &ehci->periodic[i];
616 union ehci_shadow here = *prev; 620 union ehci_shadow here = *prev;
617 __le32 type = 0; 621 __hc32 type = 0;
618 622
619 /* skip the iso nodes at list head */ 623 /* skip the iso nodes at list head */
620 while (here.ptr) { 624 while (here.ptr) {
621 type = Q_NEXT_TYPE (*hw_p); 625 type = Q_NEXT_TYPE(ehci, *hw_p);
622 if (type == Q_TYPE_QH) 626 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
623 break; 627 break;
624 prev = periodic_next_shadow (prev, type); 628 prev = periodic_next_shadow(ehci, prev, type);
625 hw_p = &here.qh->hw_next; 629 hw_p = &here.qh->hw_next;
626 here = *prev; 630 here = *prev;
627 } 631 }
@@ -643,7 +647,7 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
643 qh->hw_next = *hw_p; 647 qh->hw_next = *hw_p;
644 wmb (); 648 wmb ();
645 prev->qh = qh; 649 prev->qh = qh;
646 *hw_p = QH_NEXT (qh->qh_dma); 650 *hw_p = QH_NEXT (ehci, qh->qh_dma);
647 } 651 }
648 } 652 }
649 qh->qh_state = QH_STATE_LINKED; 653 qh->qh_state = QH_STATE_LINKED;
@@ -677,7 +681,7 @@ static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
677 // and this qh is active in the current uframe 681 // and this qh is active in the current uframe
678 // (and overlay token SplitXstate is false?) 682 // (and overlay token SplitXstate is false?)
679 // THEN 683 // THEN
680 // qh->hw_info1 |= __constant_cpu_to_le32 (1 << 7 /* "ignore" */); 684 // qh->hw_info1 |= __constant_cpu_to_hc32(1 << 7 /* "ignore" */);
681 685
682#ifdef CONFIG_CPU_FREQ 686#ifdef CONFIG_CPU_FREQ
683 /* remove qh from list of low/full speed interrupt QHs */ 687 /* remove qh from list of low/full speed interrupt QHs */
@@ -701,7 +705,7 @@ static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
701 dev_dbg (&qh->dev->dev, 705 dev_dbg (&qh->dev->dev,
702 "unlink qh%d-%04x/%p start %d [%d/%d us]\n", 706 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
703 qh->period, 707 qh->period,
704 le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), 708 hc32_to_cpup(ehci, &qh->hw_info2) & (QH_CMASK | QH_SMASK),
705 qh, qh->start, qh->usecs, qh->c_usecs); 709 qh, qh->start, qh->usecs, qh->c_usecs);
706 710
707 /* qh->qh_next still "live" to HC */ 711 /* qh->qh_next still "live" to HC */
@@ -727,7 +731,7 @@ static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
727 * active high speed queues may need bigger delays... 731 * active high speed queues may need bigger delays...
728 */ 732 */
729 if (list_empty (&qh->qtd_list) 733 if (list_empty (&qh->qtd_list)
730 || (__constant_cpu_to_le32 (QH_CMASK) 734 || (cpu_to_hc32(ehci, QH_CMASK)
731 & qh->hw_info2) != 0) 735 & qh->hw_info2) != 0)
732 wait = 2; 736 wait = 2;
733 else 737 else
@@ -735,7 +739,7 @@ static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
735 739
736 udelay (wait); 740 udelay (wait);
737 qh->qh_state = QH_STATE_IDLE; 741 qh->qh_state = QH_STATE_IDLE;
738 qh->hw_next = EHCI_LIST_END; 742 qh->hw_next = EHCI_LIST_END(ehci);
739 wmb (); 743 wmb ();
740} 744}
741 745
@@ -792,7 +796,7 @@ static int check_intr_schedule (
792 unsigned frame, 796 unsigned frame,
793 unsigned uframe, 797 unsigned uframe,
794 const struct ehci_qh *qh, 798 const struct ehci_qh *qh,
795 __le32 *c_maskp 799 __hc32 *c_maskp
796) 800)
797{ 801{
798 int retval = -ENOSPC; 802 int retval = -ENOSPC;
@@ -824,7 +828,7 @@ static int check_intr_schedule (
824 828
825 retval = 0; 829 retval = 0;
826 830
827 *c_maskp = cpu_to_le32 (mask << 8); 831 *c_maskp = cpu_to_hc32(ehci, mask << 8);
828 } 832 }
829#else 833#else
830 /* Make sure this tt's buffer is also available for CSPLITs. 834 /* Make sure this tt's buffer is also available for CSPLITs.
@@ -835,7 +839,7 @@ static int check_intr_schedule (
835 * one smart pass... 839 * one smart pass...
836 */ 840 */
837 mask = 0x03 << (uframe + qh->gap_uf); 841 mask = 0x03 << (uframe + qh->gap_uf);
838 *c_maskp = cpu_to_le32 (mask << 8); 842 *c_maskp = cpu_to_hc32(ehci, mask << 8);
839 843
840 mask |= 1 << uframe; 844 mask |= 1 << uframe;
841 if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) { 845 if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
@@ -855,20 +859,20 @@ done:
855/* "first fit" scheduling policy used the first time through, 859/* "first fit" scheduling policy used the first time through,
856 * or when the previous schedule slot can't be re-used. 860 * or when the previous schedule slot can't be re-used.
857 */ 861 */
858static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh) 862static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
859{ 863{
860 int status; 864 int status;
861 unsigned uframe; 865 unsigned uframe;
862 __le32 c_mask; 866 __hc32 c_mask;
863 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */ 867 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
864 868
865 qh_refresh(ehci, qh); 869 qh_refresh(ehci, qh);
866 qh->hw_next = EHCI_LIST_END; 870 qh->hw_next = EHCI_LIST_END(ehci);
867 frame = qh->start; 871 frame = qh->start;
868 872
869 /* reuse the previous schedule slots, if we can */ 873 /* reuse the previous schedule slots, if we can */
870 if (frame < qh->period) { 874 if (frame < qh->period) {
871 uframe = ffs (le32_to_cpup (&qh->hw_info2) & QH_SMASK); 875 uframe = ffs(hc32_to_cpup(ehci, &qh->hw_info2) & QH_SMASK);
872 status = check_intr_schedule (ehci, frame, --uframe, 876 status = check_intr_schedule (ehci, frame, --uframe,
873 qh, &c_mask); 877 qh, &c_mask);
874 } else { 878 } else {
@@ -904,10 +908,10 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
904 qh->start = frame; 908 qh->start = frame;
905 909
906 /* reset S-frame and (maybe) C-frame masks */ 910 /* reset S-frame and (maybe) C-frame masks */
907 qh->hw_info2 &= __constant_cpu_to_le32(~(QH_CMASK | QH_SMASK)); 911 qh->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
908 qh->hw_info2 |= qh->period 912 qh->hw_info2 |= qh->period
909 ? cpu_to_le32 (1 << uframe) 913 ? cpu_to_hc32(ehci, 1 << uframe)
910 : __constant_cpu_to_le32 (QH_SMASK); 914 : cpu_to_hc32(ehci, QH_SMASK);
911 qh->hw_info2 |= c_mask; 915 qh->hw_info2 |= c_mask;
912 } else 916 } else
913 ehci_dbg (ehci, "reused qh %p schedule\n", qh); 917 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
@@ -937,7 +941,7 @@ static int intr_submit (
937 spin_lock_irqsave (&ehci->lock, flags); 941 spin_lock_irqsave (&ehci->lock, flags);
938 942
939 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, 943 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
940 &ehci_to_hcd(ehci)->flags))) { 944 &ehci_to_hcd(ehci)->flags))) {
941 status = -ESHUTDOWN; 945 status = -ESHUTDOWN;
942 goto done; 946 goto done;
943 } 947 }
@@ -1027,9 +1031,9 @@ iso_stream_init (
1027 buf1 |= maxp; 1031 buf1 |= maxp;
1028 maxp *= multi; 1032 maxp *= multi;
1029 1033
1030 stream->buf0 = cpu_to_le32 ((epnum << 8) | dev->devnum); 1034 stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
1031 stream->buf1 = cpu_to_le32 (buf1); 1035 stream->buf1 = cpu_to_hc32(ehci, buf1);
1032 stream->buf2 = cpu_to_le32 (multi); 1036 stream->buf2 = cpu_to_hc32(ehci, multi);
1033 1037
1034 /* usbfs wants to report the average usecs per frame tied up 1038 /* usbfs wants to report the average usecs per frame tied up
1035 * when transfers on this endpoint are scheduled ... 1039 * when transfers on this endpoint are scheduled ...
@@ -1072,7 +1076,7 @@ iso_stream_init (
1072 bandwidth /= 1 << (interval + 2); 1076 bandwidth /= 1 << (interval + 2);
1073 1077
1074 /* stream->splits gets created from raw_mask later */ 1078 /* stream->splits gets created from raw_mask later */
1075 stream->address = cpu_to_le32 (addr); 1079 stream->address = cpu_to_hc32(ehci, addr);
1076 } 1080 }
1077 stream->bandwidth = bandwidth; 1081 stream->bandwidth = bandwidth;
1078 1082
@@ -1206,7 +1210,8 @@ iso_sched_alloc (unsigned packets, gfp_t mem_flags)
1206} 1210}
1207 1211
1208static inline void 1212static inline void
1209itd_sched_init ( 1213itd_sched_init(
1214 struct ehci_hcd *ehci,
1210 struct ehci_iso_sched *iso_sched, 1215 struct ehci_iso_sched *iso_sched,
1211 struct ehci_iso_stream *stream, 1216 struct ehci_iso_stream *stream,
1212 struct urb *urb 1217 struct urb *urb
@@ -1236,7 +1241,7 @@ itd_sched_init (
1236 && !(urb->transfer_flags & URB_NO_INTERRUPT)) 1241 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1237 trans |= EHCI_ITD_IOC; 1242 trans |= EHCI_ITD_IOC;
1238 trans |= length << 16; 1243 trans |= length << 16;
1239 uframe->transaction = cpu_to_le32 (trans); 1244 uframe->transaction = cpu_to_hc32(ehci, trans);
1240 1245
1241 /* might need to cross a buffer page within a uframe */ 1246 /* might need to cross a buffer page within a uframe */
1242 uframe->bufp = (buf & ~(u64)0x0fff); 1247 uframe->bufp = (buf & ~(u64)0x0fff);
@@ -1278,7 +1283,7 @@ itd_urb_transaction (
1278 if (unlikely (sched == NULL)) 1283 if (unlikely (sched == NULL))
1279 return -ENOMEM; 1284 return -ENOMEM;
1280 1285
1281 itd_sched_init (sched, stream, urb); 1286 itd_sched_init(ehci, sched, stream, urb);
1282 1287
1283 if (urb->interval < 8) 1288 if (urb->interval < 8)
1284 num_itds = 1 + (sched->span + 7) / 8; 1289 num_itds = 1 + (sched->span + 7) / 8;
@@ -1296,7 +1301,7 @@ itd_urb_transaction (
1296 /* prefer previously-allocated itds */ 1301 /* prefer previously-allocated itds */
1297 if (likely (!list_empty(&stream->free_list))) { 1302 if (likely (!list_empty(&stream->free_list))) {
1298 itd = list_entry (stream->free_list.prev, 1303 itd = list_entry (stream->free_list.prev,
1299 struct ehci_itd, itd_list); 1304 struct ehci_itd, itd_list);
1300 list_del (&itd->itd_list); 1305 list_del (&itd->itd_list);
1301 itd_dma = itd->itd_dma; 1306 itd_dma = itd->itd_dma;
1302 } else 1307 } else
@@ -1423,7 +1428,7 @@ sitd_slot_ok (
1423 uframe += period_uframes; 1428 uframe += period_uframes;
1424 } while (uframe < mod); 1429 } while (uframe < mod);
1425 1430
1426 stream->splits = cpu_to_le32(stream->raw_mask << (uframe & 7)); 1431 stream->splits = cpu_to_hc32(ehci, stream->raw_mask << (uframe & 7));
1427 return 1; 1432 return 1;
1428} 1433}
1429 1434
@@ -1544,12 +1549,13 @@ ready:
1544/*-------------------------------------------------------------------------*/ 1549/*-------------------------------------------------------------------------*/
1545 1550
1546static inline void 1551static inline void
1547itd_init (struct ehci_iso_stream *stream, struct ehci_itd *itd) 1552itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1553 struct ehci_itd *itd)
1548{ 1554{
1549 int i; 1555 int i;
1550 1556
1551 /* it's been recently zeroed */ 1557 /* it's been recently zeroed */
1552 itd->hw_next = EHCI_LIST_END; 1558 itd->hw_next = EHCI_LIST_END(ehci);
1553 itd->hw_bufp [0] = stream->buf0; 1559 itd->hw_bufp [0] = stream->buf0;
1554 itd->hw_bufp [1] = stream->buf1; 1560 itd->hw_bufp [1] = stream->buf1;
1555 itd->hw_bufp [2] = stream->buf2; 1561 itd->hw_bufp [2] = stream->buf2;
@@ -1561,7 +1567,8 @@ itd_init (struct ehci_iso_stream *stream, struct ehci_itd *itd)
1561} 1567}
1562 1568
1563static inline void 1569static inline void
1564itd_patch ( 1570itd_patch(
1571 struct ehci_hcd *ehci,
1565 struct ehci_itd *itd, 1572 struct ehci_itd *itd,
1566 struct ehci_iso_sched *iso_sched, 1573 struct ehci_iso_sched *iso_sched,
1567 unsigned index, 1574 unsigned index,
@@ -1576,17 +1583,18 @@ itd_patch (
1576 uframe &= 0x07; 1583 uframe &= 0x07;
1577 itd->index [uframe] = index; 1584 itd->index [uframe] = index;
1578 1585
1579 itd->hw_transaction [uframe] = uf->transaction; 1586 itd->hw_transaction[uframe] = uf->transaction;
1580 itd->hw_transaction [uframe] |= cpu_to_le32 (pg << 12); 1587 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1581 itd->hw_bufp [pg] |= cpu_to_le32 (uf->bufp & ~(u32)0); 1588 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1582 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(uf->bufp >> 32)); 1589 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1583 1590
1584 /* iso_frame_desc[].offset must be strictly increasing */ 1591 /* iso_frame_desc[].offset must be strictly increasing */
1585 if (unlikely (uf->cross)) { 1592 if (unlikely (uf->cross)) {
1586 u64 bufp = uf->bufp + 4096; 1593 u64 bufp = uf->bufp + 4096;
1594
1587 itd->pg = ++pg; 1595 itd->pg = ++pg;
1588 itd->hw_bufp [pg] |= cpu_to_le32 (bufp & ~(u32)0); 1596 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1589 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(bufp >> 32)); 1597 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1590 } 1598 }
1591} 1599}
1592 1600
@@ -1599,7 +1607,7 @@ itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1599 ehci->pshadow [frame].itd = itd; 1607 ehci->pshadow [frame].itd = itd;
1600 itd->frame = frame; 1608 itd->frame = frame;
1601 wmb (); 1609 wmb ();
1602 ehci->periodic [frame] = cpu_to_le32 (itd->itd_dma) | Q_TYPE_ITD; 1610 ehci->periodic[frame] = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1603} 1611}
1604 1612
1605/* fit urb's itds into the selected schedule slot; activate as needed */ 1613/* fit urb's itds into the selected schedule slot; activate as needed */
@@ -1644,14 +1652,14 @@ itd_link_urb (
1644 list_move_tail (&itd->itd_list, &stream->td_list); 1652 list_move_tail (&itd->itd_list, &stream->td_list);
1645 itd->stream = iso_stream_get (stream); 1653 itd->stream = iso_stream_get (stream);
1646 itd->urb = usb_get_urb (urb); 1654 itd->urb = usb_get_urb (urb);
1647 itd_init (stream, itd); 1655 itd_init (ehci, stream, itd);
1648 } 1656 }
1649 1657
1650 uframe = next_uframe & 0x07; 1658 uframe = next_uframe & 0x07;
1651 frame = next_uframe >> 3; 1659 frame = next_uframe >> 3;
1652 1660
1653 itd->usecs [uframe] = stream->usecs; 1661 itd->usecs [uframe] = stream->usecs;
1654 itd_patch (itd, iso_sched, packet, uframe); 1662 itd_patch(ehci, itd, iso_sched, packet, uframe);
1655 1663
1656 next_uframe += stream->interval; 1664 next_uframe += stream->interval;
1657 stream->depth += stream->interval; 1665 stream->depth += stream->interval;
@@ -1699,7 +1707,7 @@ itd_complete (
1699 urb_index = itd->index[uframe]; 1707 urb_index = itd->index[uframe];
1700 desc = &urb->iso_frame_desc [urb_index]; 1708 desc = &urb->iso_frame_desc [urb_index];
1701 1709
1702 t = le32_to_cpup (&itd->hw_transaction [uframe]); 1710 t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]);
1703 itd->hw_transaction [uframe] = 0; 1711 itd->hw_transaction [uframe] = 0;
1704 stream->depth -= stream->interval; 1712 stream->depth -= stream->interval;
1705 1713
@@ -1829,7 +1837,8 @@ done:
1829 */ 1837 */
1830 1838
1831static inline void 1839static inline void
1832sitd_sched_init ( 1840sitd_sched_init(
1841 struct ehci_hcd *ehci,
1833 struct ehci_iso_sched *iso_sched, 1842 struct ehci_iso_sched *iso_sched,
1834 struct ehci_iso_stream *stream, 1843 struct ehci_iso_stream *stream,
1835 struct urb *urb 1844 struct urb *urb
@@ -1858,7 +1867,7 @@ sitd_sched_init (
1858 && !(urb->transfer_flags & URB_NO_INTERRUPT)) 1867 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1859 trans |= SITD_IOC; 1868 trans |= SITD_IOC;
1860 trans |= length << 16; 1869 trans |= length << 16;
1861 packet->transaction = cpu_to_le32 (trans); 1870 packet->transaction = cpu_to_hc32(ehci, trans);
1862 1871
1863 /* might need to cross a buffer page within a td */ 1872 /* might need to cross a buffer page within a td */
1864 packet->bufp = buf; 1873 packet->bufp = buf;
@@ -1894,7 +1903,7 @@ sitd_urb_transaction (
1894 if (iso_sched == NULL) 1903 if (iso_sched == NULL)
1895 return -ENOMEM; 1904 return -ENOMEM;
1896 1905
1897 sitd_sched_init (iso_sched, stream, urb); 1906 sitd_sched_init(ehci, iso_sched, stream, urb);
1898 1907
1899 /* allocate/init sITDs */ 1908 /* allocate/init sITDs */
1900 spin_lock_irqsave (&ehci->lock, flags); 1909 spin_lock_irqsave (&ehci->lock, flags);
@@ -1946,7 +1955,8 @@ sitd_urb_transaction (
1946/*-------------------------------------------------------------------------*/ 1955/*-------------------------------------------------------------------------*/
1947 1956
1948static inline void 1957static inline void
1949sitd_patch ( 1958sitd_patch(
1959 struct ehci_hcd *ehci,
1950 struct ehci_iso_stream *stream, 1960 struct ehci_iso_stream *stream,
1951 struct ehci_sitd *sitd, 1961 struct ehci_sitd *sitd,
1952 struct ehci_iso_sched *iso_sched, 1962 struct ehci_iso_sched *iso_sched,
@@ -1956,20 +1966,20 @@ sitd_patch (
1956 struct ehci_iso_packet *uf = &iso_sched->packet [index]; 1966 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1957 u64 bufp = uf->bufp; 1967 u64 bufp = uf->bufp;
1958 1968
1959 sitd->hw_next = EHCI_LIST_END; 1969 sitd->hw_next = EHCI_LIST_END(ehci);
1960 sitd->hw_fullspeed_ep = stream->address; 1970 sitd->hw_fullspeed_ep = stream->address;
1961 sitd->hw_uframe = stream->splits; 1971 sitd->hw_uframe = stream->splits;
1962 sitd->hw_results = uf->transaction; 1972 sitd->hw_results = uf->transaction;
1963 sitd->hw_backpointer = EHCI_LIST_END; 1973 sitd->hw_backpointer = EHCI_LIST_END(ehci);
1964 1974
1965 bufp = uf->bufp; 1975 bufp = uf->bufp;
1966 sitd->hw_buf [0] = cpu_to_le32 (bufp); 1976 sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
1967 sitd->hw_buf_hi [0] = cpu_to_le32 (bufp >> 32); 1977 sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
1968 1978
1969 sitd->hw_buf [1] = cpu_to_le32 (uf->buf1); 1979 sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
1970 if (uf->cross) 1980 if (uf->cross)
1971 bufp += 4096; 1981 bufp += 4096;
1972 sitd->hw_buf_hi [1] = cpu_to_le32 (bufp >> 32); 1982 sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
1973 sitd->index = index; 1983 sitd->index = index;
1974} 1984}
1975 1985
@@ -1982,7 +1992,7 @@ sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1982 ehci->pshadow [frame].sitd = sitd; 1992 ehci->pshadow [frame].sitd = sitd;
1983 sitd->frame = frame; 1993 sitd->frame = frame;
1984 wmb (); 1994 wmb ();
1985 ehci->periodic [frame] = cpu_to_le32 (sitd->sitd_dma) | Q_TYPE_SITD; 1995 ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
1986} 1996}
1987 1997
1988/* fit urb's sitds into the selected schedule slot; activate as needed */ 1998/* fit urb's sitds into the selected schedule slot; activate as needed */
@@ -2010,7 +2020,7 @@ sitd_link_urb (
2010 urb->dev->devpath, stream->bEndpointAddress & 0x0f, 2020 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
2011 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out", 2021 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
2012 (next_uframe >> 3) % ehci->periodic_size, 2022 (next_uframe >> 3) % ehci->periodic_size,
2013 stream->interval, le32_to_cpu (stream->splits)); 2023 stream->interval, hc32_to_cpu(ehci, stream->splits));
2014 stream->start = jiffies; 2024 stream->start = jiffies;
2015 } 2025 }
2016 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++; 2026 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
@@ -2031,7 +2041,7 @@ sitd_link_urb (
2031 sitd->stream = iso_stream_get (stream); 2041 sitd->stream = iso_stream_get (stream);
2032 sitd->urb = usb_get_urb (urb); 2042 sitd->urb = usb_get_urb (urb);
2033 2043
2034 sitd_patch (stream, sitd, sched, packet); 2044 sitd_patch(ehci, stream, sitd, sched, packet);
2035 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size, 2045 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
2036 sitd); 2046 sitd);
2037 2047
@@ -2069,7 +2079,7 @@ sitd_complete (
2069 2079
2070 urb_index = sitd->index; 2080 urb_index = sitd->index;
2071 desc = &urb->iso_frame_desc [urb_index]; 2081 desc = &urb->iso_frame_desc [urb_index];
2072 t = le32_to_cpup (&sitd->hw_results); 2082 t = hc32_to_cpup(ehci, &sitd->hw_results);
2073 2083
2074 /* report transfer status */ 2084 /* report transfer status */
2075 if (t & SITD_ERRS) { 2085 if (t & SITD_ERRS) {
@@ -2224,7 +2234,7 @@ scan_periodic (struct ehci_hcd *ehci)
2224 2234
2225 for (;;) { 2235 for (;;) {
2226 union ehci_shadow q, *q_p; 2236 union ehci_shadow q, *q_p;
2227 __le32 type, *hw_p; 2237 __hc32 type, *hw_p;
2228 unsigned uframes; 2238 unsigned uframes;
2229 2239
2230 /* don't scan past the live uframe */ 2240 /* don't scan past the live uframe */
@@ -2242,7 +2252,7 @@ restart:
2242 q_p = &ehci->pshadow [frame]; 2252 q_p = &ehci->pshadow [frame];
2243 hw_p = &ehci->periodic [frame]; 2253 hw_p = &ehci->periodic [frame];
2244 q.ptr = q_p->ptr; 2254 q.ptr = q_p->ptr;
2245 type = Q_NEXT_TYPE (*hw_p); 2255 type = Q_NEXT_TYPE(ehci, *hw_p);
2246 modified = 0; 2256 modified = 0;
2247 2257
2248 while (q.ptr != NULL) { 2258 while (q.ptr != NULL) {
@@ -2251,11 +2261,11 @@ restart:
2251 int live; 2261 int live;
2252 2262
2253 live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state); 2263 live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state);
2254 switch (type) { 2264 switch (hc32_to_cpu(ehci, type)) {
2255 case Q_TYPE_QH: 2265 case Q_TYPE_QH:
2256 /* handle any completions */ 2266 /* handle any completions */
2257 temp.qh = qh_get (q.qh); 2267 temp.qh = qh_get (q.qh);
2258 type = Q_NEXT_TYPE (q.qh->hw_next); 2268 type = Q_NEXT_TYPE(ehci, q.qh->hw_next);
2259 q = q.qh->qh_next; 2269 q = q.qh->qh_next;
2260 modified = qh_completions (ehci, temp.qh); 2270 modified = qh_completions (ehci, temp.qh);
2261 if (unlikely (list_empty (&temp.qh->qtd_list))) 2271 if (unlikely (list_empty (&temp.qh->qtd_list)))
@@ -2266,10 +2276,10 @@ restart:
2266 /* for "save place" FSTNs, look at QH entries 2276 /* for "save place" FSTNs, look at QH entries
2267 * in the previous frame for completions. 2277 * in the previous frame for completions.
2268 */ 2278 */
2269 if (q.fstn->hw_prev != EHCI_LIST_END) { 2279 if (q.fstn->hw_prev != EHCI_LIST_END(ehci)) {
2270 dbg ("ignoring completions from FSTNs"); 2280 dbg ("ignoring completions from FSTNs");
2271 } 2281 }
2272 type = Q_NEXT_TYPE (q.fstn->hw_next); 2282 type = Q_NEXT_TYPE(ehci, q.fstn->hw_next);
2273 q = q.fstn->fstn_next; 2283 q = q.fstn->fstn_next;
2274 break; 2284 break;
2275 case Q_TYPE_ITD: 2285 case Q_TYPE_ITD:
@@ -2277,11 +2287,12 @@ restart:
2277 rmb (); 2287 rmb ();
2278 for (uf = live ? uframes : 8; uf < 8; uf++) { 2288 for (uf = live ? uframes : 8; uf < 8; uf++) {
2279 if (0 == (q.itd->hw_transaction [uf] 2289 if (0 == (q.itd->hw_transaction [uf]
2280 & ITD_ACTIVE)) 2290 & ITD_ACTIVE(ehci)))
2281 continue; 2291 continue;
2282 q_p = &q.itd->itd_next; 2292 q_p = &q.itd->itd_next;
2283 hw_p = &q.itd->hw_next; 2293 hw_p = &q.itd->hw_next;
2284 type = Q_NEXT_TYPE (q.itd->hw_next); 2294 type = Q_NEXT_TYPE(ehci,
2295 q.itd->hw_next);
2285 q = *q_p; 2296 q = *q_p;
2286 break; 2297 break;
2287 } 2298 }
@@ -2293,23 +2304,24 @@ restart:
2293 */ 2304 */
2294 *q_p = q.itd->itd_next; 2305 *q_p = q.itd->itd_next;
2295 *hw_p = q.itd->hw_next; 2306 *hw_p = q.itd->hw_next;
2296 type = Q_NEXT_TYPE (q.itd->hw_next); 2307 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2297 wmb(); 2308 wmb();
2298 modified = itd_complete (ehci, q.itd); 2309 modified = itd_complete (ehci, q.itd);
2299 q = *q_p; 2310 q = *q_p;
2300 break; 2311 break;
2301 case Q_TYPE_SITD: 2312 case Q_TYPE_SITD:
2302 if ((q.sitd->hw_results & SITD_ACTIVE) 2313 if ((q.sitd->hw_results & SITD_ACTIVE(ehci))
2303 && live) { 2314 && live) {
2304 q_p = &q.sitd->sitd_next; 2315 q_p = &q.sitd->sitd_next;
2305 hw_p = &q.sitd->hw_next; 2316 hw_p = &q.sitd->hw_next;
2306 type = Q_NEXT_TYPE (q.sitd->hw_next); 2317 type = Q_NEXT_TYPE(ehci,
2318 q.sitd->hw_next);
2307 q = *q_p; 2319 q = *q_p;
2308 break; 2320 break;
2309 } 2321 }
2310 *q_p = q.sitd->sitd_next; 2322 *q_p = q.sitd->sitd_next;
2311 *hw_p = q.sitd->hw_next; 2323 *hw_p = q.sitd->hw_next;
2312 type = Q_NEXT_TYPE (q.sitd->hw_next); 2324 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2313 wmb(); 2325 wmb();
2314 modified = sitd_complete (ehci, q.sitd); 2326 modified = sitd_complete (ehci, q.sitd);
2315 q = *q_p; 2327 q = *q_p;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 12:36:51 -0500