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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-12-14 14:54:08 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2007-02-07 18:44:32 -0500
commit083522d76662cda71328df1f3d75e5a9057c7c9f (patch)
treeeafbb962ec90431d0c1b490b4caea7cf9b54672c /drivers/usb/host/ehci-q.c
parent11d1a4aa8d657478cb2e5d33f203ba8f01b9ac24 (diff)
USB: Implement support for EHCI with big endian MMIO
This patch implements supports for EHCI controllers whose MMIO registers are big endian and enables that functionality for the Toshiba SCC chip. It does _not_ add support for big endian in-memory data structures as this is not needed for that chip and I hope it will never be. The guts of the patch are to convert readl(...) to ehci_readl(ehci, ...) and similarly for register writes. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ehci-q.c')
-rw-r--r--drivers/usb/host/ehci-q.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index 62e46dc60e86..e7fbbd00e7cd 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -789,13 +789,14 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
789 head = ehci->async; 789 head = ehci->async;
790 timer_action_done (ehci, TIMER_ASYNC_OFF); 790 timer_action_done (ehci, TIMER_ASYNC_OFF);
791 if (!head->qh_next.qh) { 791 if (!head->qh_next.qh) {
792 u32 cmd = readl (&ehci->regs->command); 792 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
793 793
794 if (!(cmd & CMD_ASE)) { 794 if (!(cmd & CMD_ASE)) {
795 /* in case a clear of CMD_ASE didn't take yet */ 795 /* in case a clear of CMD_ASE didn't take yet */
796 (void) handshake (&ehci->regs->status, STS_ASS, 0, 150); 796 (void)handshake(ehci, &ehci->regs->status,
797 STS_ASS, 0, 150);
797 cmd |= CMD_ASE | CMD_RUN; 798 cmd |= CMD_ASE | CMD_RUN;
798 writel (cmd, &ehci->regs->command); 799 ehci_writel(ehci, cmd, &ehci->regs->command);
799 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING; 800 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
800 /* posted write need not be known to HC yet ... */ 801 /* posted write need not be known to HC yet ... */
801 } 802 }
@@ -1007,7 +1008,7 @@ static void end_unlink_async (struct ehci_hcd *ehci)
1007 1008
1008static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh) 1009static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1009{ 1010{
1010 int cmd = readl (&ehci->regs->command); 1011 int cmd = ehci_readl(ehci, &ehci->regs->command);
1011 struct ehci_qh *prev; 1012 struct ehci_qh *prev;
1012 1013
1013#ifdef DEBUG 1014#ifdef DEBUG
@@ -1025,7 +1026,8 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1025 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT 1026 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1026 && !ehci->reclaim) { 1027 && !ehci->reclaim) {
1027 /* ... and CMD_IAAD clear */ 1028 /* ... and CMD_IAAD clear */
1028 writel (cmd & ~CMD_ASE, &ehci->regs->command); 1029 ehci_writel(ehci, cmd & ~CMD_ASE,
1030 &ehci->regs->command);
1029 wmb (); 1031 wmb ();
1030 // handshake later, if we need to 1032 // handshake later, if we need to
1031 timer_action_done (ehci, TIMER_ASYNC_OFF); 1033 timer_action_done (ehci, TIMER_ASYNC_OFF);
@@ -1054,8 +1056,8 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1054 1056
1055 ehci->reclaim_ready = 0; 1057 ehci->reclaim_ready = 0;
1056 cmd |= CMD_IAAD; 1058 cmd |= CMD_IAAD;
1057 writel (cmd, &ehci->regs->command); 1059 ehci_writel(ehci, cmd, &ehci->regs->command);
1058 (void) readl (&ehci->regs->command); 1060 (void)ehci_readl(ehci, &ehci->regs->command);
1059 timer_action (ehci, TIMER_IAA_WATCHDOG); 1061 timer_action (ehci, TIMER_IAA_WATCHDOG);
1060} 1062}
1061 1063