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authorDavid Brown <davidb@codeaurora.org>2011-03-17 01:13:16 -0400
committerDavid Brown <davidb@codeaurora.org>2011-03-17 01:13:16 -0400
commit92c260f755c42337c550d8ac1f8ccd1b32bffb20 (patch)
tree6d04fefc1adeecabfb2b00c201e0db78fa2b5529 /drivers/usb/host/ehci-pci.c
parent8e76a80960bf06c245160a484d5a363ca6b520bb (diff)
parent05e34754518b6a90d5c392790c032575fab12d66 (diff)
Merge remote branch 'rmk/for-linus' into for-linus
* rmk/for-linus: (1557 commits) ARM: 6806/1: irq: introduce entry and exit functions for chained handlers ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas ARM: 6747/1: P2V: Thumb2 support ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9 ARM: 6772/1: errata: possible fault MMU translations following an ASID switch ARM: 6776/1: mach-ux500: activate fix for errata 753970 ARM: 6794/1: SPEAr: Append UL to device address macros. ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files. ARM: 6681/1: SPEAr: add debugfs support to clk API ARM: 6703/1: SPEAr: update clk API support ARM: 6679/1: SPEAr: make clk API functions more generic ARM: 6737/1: SPEAr: formalized timer support ... Conflicts: arch/arm/mach-msm/board-msm7x27.c arch/arm/mach-msm/board-msm7x30.c arch/arm/mach-msm/board-qsd8x50.c arch/arm/mach-msm/board-sapphire.c arch/arm/mach-msm/include/mach/memory.h
Diffstat (limited to 'drivers/usb/host/ehci-pci.c')
-rw-r--r--drivers/usb/host/ehci-pci.c35
1 files changed, 21 insertions, 14 deletions
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 76179c39c0e3..07bb982e59f6 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -44,28 +44,35 @@ static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev)
44 return 0; 44 return 0;
45} 45}
46 46
47static int ehci_quirk_amd_SB800(struct ehci_hcd *ehci) 47static int ehci_quirk_amd_hudson(struct ehci_hcd *ehci)
48{ 48{
49 struct pci_dev *amd_smbus_dev; 49 struct pci_dev *amd_smbus_dev;
50 u8 rev = 0; 50 u8 rev = 0;
51 51
52 amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI, 0x4385, NULL); 52 amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI, 0x4385, NULL);
53 if (!amd_smbus_dev) 53 if (amd_smbus_dev) {
54 return 0; 54 pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
55 55 if (rev < 0x40) {
56 pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev); 56 pci_dev_put(amd_smbus_dev);
57 if (rev < 0x40) { 57 amd_smbus_dev = NULL;
58 pci_dev_put(amd_smbus_dev); 58 return 0;
59 amd_smbus_dev = NULL; 59 }
60 return 0; 60 } else {
61 amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x780b, NULL);
62 if (!amd_smbus_dev)
63 return 0;
64 pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
65 if (rev < 0x11 || rev > 0x18) {
66 pci_dev_put(amd_smbus_dev);
67 amd_smbus_dev = NULL;
68 return 0;
69 }
61 } 70 }
62 71
63 if (!amd_nb_dev) 72 if (!amd_nb_dev)
64 amd_nb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x1510, NULL); 73 amd_nb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x1510, NULL);
65 if (!amd_nb_dev)
66 ehci_err(ehci, "QUIRK: unable to get AMD NB device\n");
67 74
68 ehci_info(ehci, "QUIRK: Enable AMD SB800 L1 fix\n"); 75 ehci_info(ehci, "QUIRK: Enable exception for AMD Hudson ASPM\n");
69 76
70 pci_dev_put(amd_smbus_dev); 77 pci_dev_put(amd_smbus_dev);
71 amd_smbus_dev = NULL; 78 amd_smbus_dev = NULL;
@@ -131,7 +138,7 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
131 /* cache this readonly data; minimize chip reads */ 138 /* cache this readonly data; minimize chip reads */
132 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 139 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
133 140
134 if (ehci_quirk_amd_SB800(ehci)) 141 if (ehci_quirk_amd_hudson(ehci))
135 ehci->amd_l1_fix = 1; 142 ehci->amd_l1_fix = 1;
136 143
137 retval = ehci_halt(ehci); 144 retval = ehci_halt(ehci);
@@ -360,8 +367,8 @@ static int ehci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
360 * mark HW unaccessible. The PM and USB cores make sure that 367 * mark HW unaccessible. The PM and USB cores make sure that
361 * the root hub is either suspended or stopped. 368 * the root hub is either suspended or stopped.
362 */ 369 */
363 spin_lock_irqsave (&ehci->lock, flags);
364 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup); 370 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
371 spin_lock_irqsave (&ehci->lock, flags);
365 ehci_writel(ehci, 0, &ehci->regs->intr_enable); 372 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
366 (void)ehci_readl(ehci, &ehci->regs->intr_enable); 373 (void)ehci_readl(ehci, &ehci->regs->intr_enable);
367 374