[PATCH] USB: EHCI and Freescale 83xx quirk

On the MPC834x processors the multiport host (MPH) EHCI controller has an
erratum in which the port number in the queue head expects to be 0..N-1
instead of 1..N.  If we are on one of these chips we subtract one from
the port number before putting it into the queue head.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

1 files changed, 10 insertions, 0 deletions

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index c6012d6cd527..59f90f76ee31 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -198,6 +198,16 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
                 mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
 
         if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
+                unsigned int chip, rev, svr;
+
+                svr = mfspr(SPRN_SVR);
+                chip = svr >> 16;
+                rev = (svr >> 4) & 0xf;
+
+                /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
+                if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
+                        ehci->has_fsl_port_bug = 1;
+
                 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
                         mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
                 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)