MIPS: Alchemy: abstract USB block control register access

Alchemy chips have one or more registers which control access
to the usb blocks as well as PHY configuration.  I don't want
the OHCI/EHCI glues to know about the different registers and bits;
new code hides the gory details of USB configuration from them.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: linux-usb@vger.kernel.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2709/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 create mode 100644 drivers/usb/host/alchemy-common.c

1 files changed, 10 insertions, 67 deletions

diff --git a/drivers/usb/host/ehci-au1xxx.c b/drivers/usb/host/ehci-au1xxx.c
index 42ae57409908..e480dc17394d 100644
--- a/drivers/usb/host/ehci-au1xxx.c
+++ b/drivers/usb/host/ehci-au1xxx.c
@@ -14,61 +14,9 @@
 #include <linux/platform_device.h>
 #include <asm/mach-au1x00/au1000.h>
 
-#define USB_HOST_CONFIG   (USB_MSR_BASE + USB_MSR_MCFG)
-#define USB_MCFG_PFEN     (1<<31)
-#define USB_MCFG_RDCOMB   (1<<30)
-#define USB_MCFG_SSDEN    (1<<23)
-#define USB_MCFG_PHYPLLEN (1<<19)
-#define USB_MCFG_UCECLKEN (1<<18)
-#define USB_MCFG_EHCCLKEN (1<<17)
-#ifdef CONFIG_DMA_COHERENT
-#define USB_MCFG_UCAM     (1<<7)
-#else
-#define USB_MCFG_UCAM     (0)
-#endif
-#define USB_MCFG_EBMEN    (1<<3)
-#define USB_MCFG_EMEMEN   (1<<2)
-
-#define USBH_ENABLE_CE  (USB_MCFG_PHYPLLEN | USB_MCFG_EHCCLKEN)
-#define USBH_ENABLE_INIT (USB_MCFG_PFEN  | USB_MCFG_RDCOMB |    \
-                          USBH_ENABLE_CE | USB_MCFG_SSDEN  |    \
-                          USB_MCFG_UCAM  | USB_MCFG_EBMEN  |    \
-                          USB_MCFG_EMEMEN)
-
-#define USBH_DISABLE      (USB_MCFG_EBMEN | USB_MCFG_EMEMEN)
 
 extern int usb_disabled(void);
 
-static void au1xxx_start_ehc(void)
-{
-        /* enable clock to EHCI block and HS PHY PLL*/
-        au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_CE, USB_HOST_CONFIG);
-        au_sync();
-        udelay(1000);
-
-        /* enable EHCI mmio */
-        au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_INIT, USB_HOST_CONFIG);
-        au_sync();
-        udelay(1000);
-}
-
-static void au1xxx_stop_ehc(void)
-{
-        unsigned long c;
-
-        /* Disable mem */
-        au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_DISABLE, USB_HOST_CONFIG);
-        au_sync();
-        udelay(1000);
-
-        /* Disable EHC clock. If the HS PHY is unused disable it too. */
-        c = au_readl(USB_HOST_CONFIG) & ~USB_MCFG_EHCCLKEN;
-        if (!(c & USB_MCFG_UCECLKEN))           /* UDC disabled? */
-                c &= ~USB_MCFG_PHYPLLEN;        /* yes: disable HS PHY PLL */
-        au_writel(c, USB_HOST_CONFIG);
-        au_sync();
-}
-
 static int au1xxx_ehci_setup(struct usb_hcd *hcd)
 {
         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
@@ -136,16 +84,6 @@ static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
         if (usb_disabled())
                 return -ENODEV;
 
-#if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT)
-        /* Au1200 AB USB does not support coherent memory */
-        if (!(read_c0_prid() & 0xff)) {
-                printk(KERN_INFO "%s: this is chip revision AB!\n", pdev->name);
-                printk(KERN_INFO "%s: update your board or re-configure"
-                                 " the kernel\n", pdev->name);
-                return -ENODEV;
-        }
-#endif
-
         if (pdev->resource[1].flags != IORESOURCE_IRQ) {
                 pr_debug("resource[1] is not IORESOURCE_IRQ");
                 return -ENOMEM;
@@ -171,7 +109,11 @@ static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
                 goto err2;
         }
 
-        au1xxx_start_ehc();
+        if (alchemy_usb_control(ALCHEMY_USB_EHCI0, 1)) {
+                printk(KERN_INFO "%s: controller init failed!\n", pdev->name);
+                ret = -ENODEV;
+                goto err3;
+        }
 
         ehci = hcd_to_ehci(hcd);
         ehci->caps = hcd->regs;
@@ -187,7 +129,8 @@ static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
                 return ret;
         }
 
-        au1xxx_stop_ehc();
+        alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
+err3:
         iounmap(hcd->regs);
 err2:
         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
@@ -201,10 +144,10 @@ static int ehci_hcd_au1xxx_drv_remove(struct platform_device *pdev)
         struct usb_hcd *hcd = platform_get_drvdata(pdev);
 
         usb_remove_hcd(hcd);
+        alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
         iounmap(hcd->regs);
         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
         usb_put_hcd(hcd);
-        au1xxx_stop_ehc();
         platform_set_drvdata(pdev, NULL);
 
         return 0;
@@ -236,7 +179,7 @@ static int ehci_hcd_au1xxx_drv_suspend(struct device *dev)
         // could save FLADJ in case of Vaux power loss
         // ... we'd only use it to handle clock skew
 
-        au1xxx_stop_ehc();
+        alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
 
         return rc;
 }
@@ -246,7 +189,7 @@ static int ehci_hcd_au1xxx_drv_resume(struct device *dev)
         struct usb_hcd *hcd = dev_get_drvdata(dev);
         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 
-        au1xxx_start_ehc();
+        alchemy_usb_control(ALCHEMY_USB_EHCI0, 1);
 
         // maybe restore FLADJ