USB: Add EHCI and OHCH glue for OCTEON II SOCs.

The OCTEON II SOC has USB EHCI and OHCI controllers connected directly
to the internal I/O bus.  This patch adds the necessary 'glue' logic
to allow ehci-hcd and ohci-hcd drivers to work on OCTEON II.

The OCTEON normally runs big-endian, and the ehci/ohci internal
registers have host endianness, so we need to select
USB_EHCI_BIG_ENDIAN_MMIO.

The ehci and ohci blocks share a common clocking and PHY
infrastructure.  Initialization of the host controller and PHY clocks
is common between the two and is factored out into the
octeon2-common.c file.

Setting of USB_ARCH_HAS_OHCI and USB_ARCH_HAS_EHCI is done in
arch/mips/Kconfig in a following patch.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-usb@vger.kernel.org
To: dbrownell@users.sourceforge.net
Patchwork: http://patchwork.linux-mips.org/patch/1675/
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 28 insertions, 2 deletions

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index bf2e7d234533..2391c396ca32 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -93,8 +93,9 @@ config USB_EHCI_TT_NEWSCHED
 
 config USB_EHCI_BIG_ENDIAN_MMIO
         bool
-        depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || ARCH_IXP4XX || \
-                                    XPS_USB_HCD_XILINX || PPC_MPC512x)
+        depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || \
+                                    ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
+                                    PPC_MPC512x || CPU_CAVIUM_OCTEON)
         default y
 
 config USB_EHCI_BIG_ENDIAN_DESC
@@ -434,3 +435,28 @@ config USB_IMX21_HCD
          To compile this driver as a module, choose M here: the
          module will be called "imx21-hcd".
 
+config USB_OCTEON_EHCI
+        bool "Octeon on-chip EHCI support"
+        depends on USB && USB_EHCI_HCD && CPU_CAVIUM_OCTEON
+        default n
+        select USB_EHCI_BIG_ENDIAN_MMIO
+        help
+          Enable support for the Octeon II SOC's on-chip EHCI
+          controller.  It is needed for high-speed (480Mbit/sec)
+          USB 2.0 device support.  All CN6XXX based chips with USB are
+          supported.
+
+config USB_OCTEON_OHCI
+        bool "Octeon on-chip OHCI support"
+        depends on USB && USB_OHCI_HCD && CPU_CAVIUM_OCTEON
+        default USB_OCTEON_EHCI
+        select USB_OHCI_BIG_ENDIAN_MMIO
+        select USB_OHCI_LITTLE_ENDIAN
+        help
+          Enable support for the Octeon II SOC's on-chip OHCI
+          controller.  It is needed for low-speed USB 1.0 device
+          support.  All CN6XXX based chips with USB are supported.
+
+config USB_OCTEON2_COMMON
+        bool
+        default y if USB_OCTEON_EHCI || USB_OCTEON_OHCI