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authorBen Dooks <ben-linux@fluff.org>2010-05-25 00:36:52 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2010-06-04 16:16:19 -0400
commit1703a6d3c38944731ba23594843a704d828266f3 (patch)
treeac9907c3100e98e1626e1d3b2675913c27b69c76 /drivers/usb/gadget/s3c-hsotg.c
parent2e0e0777ec2ea1cb5461bded2c09573a9d778622 (diff)
USB: s3c-hsotg: Ensure FIFOs are fully flushed after layout
According to the design guide, if the FIFO layout is changed, then the FIFOs must be flushed to ensure all FIFO pointers are correct. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/gadget/s3c-hsotg.c')
-rw-r--r--drivers/usb/gadget/s3c-hsotg.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 31d19e1f261d..26193eceb323 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -300,6 +300,7 @@ static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
300 unsigned int ep; 300 unsigned int ep;
301 unsigned int addr; 301 unsigned int addr;
302 unsigned int size; 302 unsigned int size;
303 int timeout;
303 u32 val; 304 u32 val;
304 305
305 /* the ryu 2.6.24 release ahs 306 /* the ryu 2.6.24 release ahs
@@ -335,6 +336,31 @@ static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
335 336
336 writel(val, hsotg->regs + S3C_DPTXFSIZn(ep)); 337 writel(val, hsotg->regs + S3C_DPTXFSIZn(ep));
337 } 338 }
339
340 /* according to p428 of the design guide, we need to ensure that
341 * all fifos are flushed before continuing */
342
343 writel(S3C_GRSTCTL_TxFNum(0x10) | S3C_GRSTCTL_TxFFlsh |
344 S3C_GRSTCTL_RxFFlsh, hsotg->regs + S3C_GRSTCTL);
345
346 /* wait until the fifos are both flushed */
347 timeout = 100;
348 while (1) {
349 val = readl(hsotg->regs + S3C_GRSTCTL);
350
351 if ((val & (S3C_GRSTCTL_TxFFlsh | S3C_GRSTCTL_RxFFlsh)) == 0)
352 break;
353
354 if (--timeout == 0) {
355 dev_err(hsotg->dev,
356 "%s: timeout flushing fifos (GRSTCTL=%08x)\n",
357 __func__, val);
358 }
359
360 udelay(1);
361 }
362
363 dev_dbg(hsotg->dev, "FIFOs reset, timeout at %d\n", timeout);
338} 364}
339 365
340/** 366/**