diff options
author | Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | 2007-05-10 00:18:23 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2007-07-12 19:29:45 -0400 |
commit | 4cf2503c6801a69fee25030475eceeefb36d1b56 (patch) | |
tree | d18f2d67a0fc83411458ff581bad53e0fd972ce9 /drivers/usb/gadget/m66592-udc.c | |
parent | 0ca1268e109acf6d71507398cb95cab2e670b654 (diff) |
USB: m66592-udc: peripheral controller driver for M66592
I would like to submit Renesas M66592 udc driver.
The M66592 is Renesas USB 2.0 peripheral controller.
This controller supports USB high-speed.
The driver has been tested Gadget Zero, Ethernet Gadget,
File-backed Storage Gadget, and passed usbtest script.
Signed-off-by : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/gadget/m66592-udc.c')
-rw-r--r-- | drivers/usb/gadget/m66592-udc.c | 1653 |
1 files changed, 1653 insertions, 0 deletions
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c new file mode 100644 index 000000000000..611130c8983b --- /dev/null +++ b/drivers/usb/gadget/m66592-udc.c | |||
@@ -0,0 +1,1653 @@ | |||
1 | /* | ||
2 | * M66592 UDC (USB gadget) | ||
3 | * | ||
4 | * Copyright (C) 2006-2007 Renesas Solutions Corp. | ||
5 | * | ||
6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; version 2 of the License. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | #include <linux/module.h> | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/sched.h> | ||
26 | #include <linux/smp_lock.h> | ||
27 | #include <linux/errno.h> | ||
28 | #include <linux/init.h> | ||
29 | #include <linux/timer.h> | ||
30 | #include <linux/delay.h> | ||
31 | #include <linux/list.h> | ||
32 | #include <linux/interrupt.h> | ||
33 | #include <linux/platform_device.h> | ||
34 | #include <linux/usb/ch9.h> | ||
35 | #include <linux/usb_gadget.h> | ||
36 | |||
37 | #include <asm/io.h> | ||
38 | #include <asm/irq.h> | ||
39 | #include <asm/system.h> | ||
40 | |||
41 | #include "m66592-udc.h" | ||
42 | |||
43 | MODULE_DESCRIPTION("M66592 USB gadget driiver"); | ||
44 | MODULE_LICENSE("GPL"); | ||
45 | MODULE_AUTHOR("Yoshihiro Shimoda"); | ||
46 | |||
47 | #define DRIVER_VERSION "9 May 2007" | ||
48 | |||
49 | /* module parameters */ | ||
50 | static unsigned short clock = M66592_XTAL24; | ||
51 | module_param(clock, ushort, 0644); | ||
52 | MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0(default=16384)"); | ||
53 | static unsigned short vif = M66592_LDRV; | ||
54 | module_param(vif, ushort, 0644); | ||
55 | MODULE_PARM_DESC(vif, "input VIF: 3.3V=32768, 1.5V=0(default=32768)"); | ||
56 | static unsigned short endian = 0; | ||
57 | module_param(endian, ushort, 0644); | ||
58 | MODULE_PARM_DESC(endian, "data endian: big=256, little=0(default=0)"); | ||
59 | static unsigned short irq_sense = M66592_INTL; | ||
60 | module_param(irq_sense, ushort, 0644); | ||
61 | MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0(default=2)"); | ||
62 | |||
63 | static const char udc_name[] = "m66592_udc"; | ||
64 | static const char *m66592_ep_name[] = { | ||
65 | "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7" | ||
66 | }; | ||
67 | |||
68 | static void disable_controller(struct m66592 *m66592); | ||
69 | static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req); | ||
70 | static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req); | ||
71 | static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req, | ||
72 | gfp_t gfp_flags); | ||
73 | |||
74 | static void transfer_complete(struct m66592_ep *ep, | ||
75 | struct m66592_request *req, | ||
76 | int status); | ||
77 | /*-------------------------------------------------------------------------*/ | ||
78 | static inline u16 get_usb_speed(struct m66592 *m66592) | ||
79 | { | ||
80 | return (m66592_read(m66592, M66592_DVSTCTR) & M66592_RHST); | ||
81 | } | ||
82 | |||
83 | static void enable_pipe_irq(struct m66592 *m66592, u16 pipenum, | ||
84 | unsigned long reg) | ||
85 | { | ||
86 | u16 tmp; | ||
87 | |||
88 | tmp = m66592_read(m66592, M66592_INTENB0); | ||
89 | m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE, | ||
90 | M66592_INTENB0); | ||
91 | m66592_bset(m66592, (1 << pipenum), reg); | ||
92 | m66592_write(m66592, tmp, M66592_INTENB0); | ||
93 | } | ||
94 | |||
95 | static void disable_pipe_irq(struct m66592 *m66592, u16 pipenum, | ||
96 | unsigned long reg) | ||
97 | { | ||
98 | u16 tmp; | ||
99 | |||
100 | tmp = m66592_read(m66592, M66592_INTENB0); | ||
101 | m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE, | ||
102 | M66592_INTENB0); | ||
103 | m66592_bclr(m66592, (1 << pipenum), reg); | ||
104 | m66592_write(m66592, tmp, M66592_INTENB0); | ||
105 | } | ||
106 | |||
107 | static void m66592_usb_connect(struct m66592 *m66592) | ||
108 | { | ||
109 | m66592_bset(m66592, M66592_CTRE, M66592_INTENB0); | ||
110 | m66592_bset(m66592, M66592_WDST | M66592_RDST | M66592_CMPL, | ||
111 | M66592_INTENB0); | ||
112 | m66592_bset(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0); | ||
113 | |||
114 | m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG); | ||
115 | } | ||
116 | |||
117 | static void m66592_usb_disconnect(struct m66592 *m66592) | ||
118 | { | ||
119 | m66592_bclr(m66592, M66592_CTRE, M66592_INTENB0); | ||
120 | m66592_bclr(m66592, M66592_WDST | M66592_RDST | M66592_CMPL, | ||
121 | M66592_INTENB0); | ||
122 | m66592_bclr(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0); | ||
123 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | ||
124 | |||
125 | m66592->gadget.speed = USB_SPEED_UNKNOWN; | ||
126 | spin_unlock(&m66592->lock); | ||
127 | m66592->driver->disconnect(&m66592->gadget); | ||
128 | spin_lock(&m66592->lock); | ||
129 | |||
130 | disable_controller(m66592); | ||
131 | INIT_LIST_HEAD(&m66592->ep[0].queue); | ||
132 | } | ||
133 | |||
134 | static inline u16 control_reg_get_pid(struct m66592 *m66592, u16 pipenum) | ||
135 | { | ||
136 | u16 pid = 0; | ||
137 | unsigned long offset; | ||
138 | |||
139 | if (pipenum == 0) | ||
140 | pid = m66592_read(m66592, M66592_DCPCTR) & M66592_PID; | ||
141 | else if (pipenum < M66592_MAX_NUM_PIPE) { | ||
142 | offset = get_pipectr_addr(pipenum); | ||
143 | pid = m66592_read(m66592, offset) & M66592_PID; | ||
144 | } else | ||
145 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
146 | |||
147 | return pid; | ||
148 | } | ||
149 | |||
150 | static inline void control_reg_set_pid(struct m66592 *m66592, u16 pipenum, | ||
151 | u16 pid) | ||
152 | { | ||
153 | unsigned long offset; | ||
154 | |||
155 | if (pipenum == 0) | ||
156 | m66592_mdfy(m66592, pid, M66592_PID, M66592_DCPCTR); | ||
157 | else if (pipenum < M66592_MAX_NUM_PIPE) { | ||
158 | offset = get_pipectr_addr(pipenum); | ||
159 | m66592_mdfy(m66592, pid, M66592_PID, offset); | ||
160 | } else | ||
161 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
162 | } | ||
163 | |||
164 | static inline void pipe_start(struct m66592 *m66592, u16 pipenum) | ||
165 | { | ||
166 | control_reg_set_pid(m66592, pipenum, M66592_PID_BUF); | ||
167 | } | ||
168 | |||
169 | static inline void pipe_stop(struct m66592 *m66592, u16 pipenum) | ||
170 | { | ||
171 | control_reg_set_pid(m66592, pipenum, M66592_PID_NAK); | ||
172 | } | ||
173 | |||
174 | static inline void pipe_stall(struct m66592 *m66592, u16 pipenum) | ||
175 | { | ||
176 | control_reg_set_pid(m66592, pipenum, M66592_PID_STALL); | ||
177 | } | ||
178 | |||
179 | static inline u16 control_reg_get(struct m66592 *m66592, u16 pipenum) | ||
180 | { | ||
181 | u16 ret = 0; | ||
182 | unsigned long offset; | ||
183 | |||
184 | if (pipenum == 0) | ||
185 | ret = m66592_read(m66592, M66592_DCPCTR); | ||
186 | else if (pipenum < M66592_MAX_NUM_PIPE) { | ||
187 | offset = get_pipectr_addr(pipenum); | ||
188 | ret = m66592_read(m66592, offset); | ||
189 | } else | ||
190 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
191 | |||
192 | return ret; | ||
193 | } | ||
194 | |||
195 | static inline void control_reg_sqclr(struct m66592 *m66592, u16 pipenum) | ||
196 | { | ||
197 | unsigned long offset; | ||
198 | |||
199 | pipe_stop(m66592, pipenum); | ||
200 | |||
201 | if (pipenum == 0) | ||
202 | m66592_bset(m66592, M66592_SQCLR, M66592_DCPCTR); | ||
203 | else if (pipenum < M66592_MAX_NUM_PIPE) { | ||
204 | offset = get_pipectr_addr(pipenum); | ||
205 | m66592_bset(m66592, M66592_SQCLR, offset); | ||
206 | } else | ||
207 | printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); | ||
208 | } | ||
209 | |||
210 | static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum) | ||
211 | { | ||
212 | u16 tmp; | ||
213 | int size; | ||
214 | |||
215 | if (pipenum == 0) { | ||
216 | tmp = m66592_read(m66592, M66592_DCPCFG); | ||
217 | if ((tmp & M66592_CNTMD) != 0) | ||
218 | size = 256; | ||
219 | else { | ||
220 | tmp = m66592_read(m66592, M66592_DCPMAXP); | ||
221 | size = tmp & M66592_MAXP; | ||
222 | } | ||
223 | } else { | ||
224 | m66592_write(m66592, pipenum, M66592_PIPESEL); | ||
225 | tmp = m66592_read(m66592, M66592_PIPECFG); | ||
226 | if ((tmp & M66592_CNTMD) != 0) { | ||
227 | tmp = m66592_read(m66592, M66592_PIPEBUF); | ||
228 | size = ((tmp >> 10) + 1) * 64; | ||
229 | } else { | ||
230 | tmp = m66592_read(m66592, M66592_PIPEMAXP); | ||
231 | size = tmp & M66592_MXPS; | ||
232 | } | ||
233 | } | ||
234 | |||
235 | return size; | ||
236 | } | ||
237 | |||
238 | static inline void pipe_change(struct m66592 *m66592, u16 pipenum) | ||
239 | { | ||
240 | struct m66592_ep *ep = m66592->pipenum2ep[pipenum]; | ||
241 | |||
242 | if (ep->use_dma) | ||
243 | return; | ||
244 | |||
245 | m66592_mdfy(m66592, pipenum, M66592_CURPIPE, ep->fifosel); | ||
246 | |||
247 | ndelay(450); | ||
248 | |||
249 | m66592_bset(m66592, M66592_MBW, ep->fifosel); | ||
250 | } | ||
251 | |||
252 | static int pipe_buffer_setting(struct m66592 *m66592, | ||
253 | struct m66592_pipe_info *info) | ||
254 | { | ||
255 | u16 bufnum = 0, buf_bsize = 0; | ||
256 | u16 pipecfg = 0; | ||
257 | |||
258 | if (info->pipe == 0) | ||
259 | return -EINVAL; | ||
260 | |||
261 | m66592_write(m66592, info->pipe, M66592_PIPESEL); | ||
262 | |||
263 | if (info->dir_in) | ||
264 | pipecfg |= M66592_DIR; | ||
265 | pipecfg |= info->type; | ||
266 | pipecfg |= info->epnum; | ||
267 | switch (info->type) { | ||
268 | case M66592_INT: | ||
269 | bufnum = 4 + (info->pipe - M66592_BASE_PIPENUM_INT); | ||
270 | buf_bsize = 0; | ||
271 | break; | ||
272 | case M66592_BULK: | ||
273 | bufnum = m66592->bi_bufnum + | ||
274 | (info->pipe - M66592_BASE_PIPENUM_BULK) * 16; | ||
275 | m66592->bi_bufnum += 16; | ||
276 | buf_bsize = 7; | ||
277 | pipecfg |= M66592_DBLB; | ||
278 | if (!info->dir_in) | ||
279 | pipecfg |= M66592_SHTNAK; | ||
280 | break; | ||
281 | case M66592_ISO: | ||
282 | bufnum = m66592->bi_bufnum + | ||
283 | (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16; | ||
284 | m66592->bi_bufnum += 16; | ||
285 | buf_bsize = 7; | ||
286 | break; | ||
287 | } | ||
288 | if (m66592->bi_bufnum > M66592_MAX_BUFNUM) { | ||
289 | printk(KERN_ERR "m66592 pipe memory is insufficient(%d)\n", | ||
290 | m66592->bi_bufnum); | ||
291 | return -ENOMEM; | ||
292 | } | ||
293 | |||
294 | m66592_write(m66592, pipecfg, M66592_PIPECFG); | ||
295 | m66592_write(m66592, (buf_bsize << 10) | (bufnum), M66592_PIPEBUF); | ||
296 | m66592_write(m66592, info->maxpacket, M66592_PIPEMAXP); | ||
297 | if (info->interval) | ||
298 | info->interval--; | ||
299 | m66592_write(m66592, info->interval, M66592_PIPEPERI); | ||
300 | |||
301 | return 0; | ||
302 | } | ||
303 | |||
304 | static void pipe_buffer_release(struct m66592 *m66592, | ||
305 | struct m66592_pipe_info *info) | ||
306 | { | ||
307 | if (info->pipe == 0) | ||
308 | return; | ||
309 | |||
310 | switch (info->type) { | ||
311 | case M66592_BULK: | ||
312 | if (is_bulk_pipe(info->pipe)) | ||
313 | m66592->bi_bufnum -= 16; | ||
314 | break; | ||
315 | case M66592_ISO: | ||
316 | if (is_isoc_pipe(info->pipe)) | ||
317 | m66592->bi_bufnum -= 16; | ||
318 | break; | ||
319 | } | ||
320 | |||
321 | if (is_bulk_pipe(info->pipe)) { | ||
322 | m66592->bulk--; | ||
323 | } else if (is_interrupt_pipe(info->pipe)) | ||
324 | m66592->interrupt--; | ||
325 | else if (is_isoc_pipe(info->pipe)) { | ||
326 | m66592->isochronous--; | ||
327 | if (info->type == M66592_BULK) | ||
328 | m66592->bulk--; | ||
329 | } else | ||
330 | printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", | ||
331 | info->pipe); | ||
332 | } | ||
333 | |||
334 | static void pipe_initialize(struct m66592_ep *ep) | ||
335 | { | ||
336 | struct m66592 *m66592 = ep->m66592; | ||
337 | |||
338 | m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel); | ||
339 | |||
340 | m66592_write(m66592, M66592_ACLRM, ep->pipectr); | ||
341 | m66592_write(m66592, 0, ep->pipectr); | ||
342 | m66592_write(m66592, M66592_SQCLR, ep->pipectr); | ||
343 | if (ep->use_dma) { | ||
344 | m66592_mdfy(m66592, ep->pipenum, M66592_CURPIPE, ep->fifosel); | ||
345 | |||
346 | ndelay(450); | ||
347 | |||
348 | m66592_bset(m66592, M66592_MBW, ep->fifosel); | ||
349 | } | ||
350 | } | ||
351 | |||
352 | static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep, | ||
353 | const struct usb_endpoint_descriptor *desc, | ||
354 | u16 pipenum, int dma) | ||
355 | { | ||
356 | if ((pipenum != 0) && dma) { | ||
357 | if (m66592->num_dma == 0) { | ||
358 | m66592->num_dma++; | ||
359 | ep->use_dma = 1; | ||
360 | ep->fifoaddr = M66592_D0FIFO; | ||
361 | ep->fifosel = M66592_D0FIFOSEL; | ||
362 | ep->fifoctr = M66592_D0FIFOCTR; | ||
363 | ep->fifotrn = M66592_D0FIFOTRN; | ||
364 | } else if (m66592->num_dma == 1) { | ||
365 | m66592->num_dma++; | ||
366 | ep->use_dma = 1; | ||
367 | ep->fifoaddr = M66592_D1FIFO; | ||
368 | ep->fifosel = M66592_D1FIFOSEL; | ||
369 | ep->fifoctr = M66592_D1FIFOCTR; | ||
370 | ep->fifotrn = M66592_D1FIFOTRN; | ||
371 | } else { | ||
372 | ep->use_dma = 0; | ||
373 | ep->fifoaddr = M66592_CFIFO; | ||
374 | ep->fifosel = M66592_CFIFOSEL; | ||
375 | ep->fifoctr = M66592_CFIFOCTR; | ||
376 | ep->fifotrn = 0; | ||
377 | } | ||
378 | } else { | ||
379 | ep->use_dma = 0; | ||
380 | ep->fifoaddr = M66592_CFIFO; | ||
381 | ep->fifosel = M66592_CFIFOSEL; | ||
382 | ep->fifoctr = M66592_CFIFOCTR; | ||
383 | ep->fifotrn = 0; | ||
384 | } | ||
385 | |||
386 | ep->pipectr = get_pipectr_addr(pipenum); | ||
387 | ep->pipenum = pipenum; | ||
388 | ep->ep.maxpacket = desc->wMaxPacketSize; | ||
389 | m66592->pipenum2ep[pipenum] = ep; | ||
390 | m66592->epaddr2ep[desc->bEndpointAddress&USB_ENDPOINT_NUMBER_MASK] = ep; | ||
391 | INIT_LIST_HEAD(&ep->queue); | ||
392 | } | ||
393 | |||
394 | static void m66592_ep_release(struct m66592_ep *ep) | ||
395 | { | ||
396 | struct m66592 *m66592 = ep->m66592; | ||
397 | u16 pipenum = ep->pipenum; | ||
398 | |||
399 | if (pipenum == 0) | ||
400 | return; | ||
401 | |||
402 | if (ep->use_dma) | ||
403 | m66592->num_dma--; | ||
404 | ep->pipenum = 0; | ||
405 | ep->busy = 0; | ||
406 | ep->use_dma = 0; | ||
407 | } | ||
408 | |||
409 | static int alloc_pipe_config(struct m66592_ep *ep, | ||
410 | const struct usb_endpoint_descriptor *desc) | ||
411 | { | ||
412 | struct m66592 *m66592 = ep->m66592; | ||
413 | struct m66592_pipe_info info; | ||
414 | int dma = 0; | ||
415 | int *counter; | ||
416 | int ret; | ||
417 | |||
418 | ep->desc = desc; | ||
419 | |||
420 | BUG_ON(ep->pipenum); | ||
421 | |||
422 | switch(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | ||
423 | case USB_ENDPOINT_XFER_BULK: | ||
424 | if (m66592->bulk >= M66592_MAX_NUM_BULK) { | ||
425 | if (m66592->isochronous >= M66592_MAX_NUM_ISOC) { | ||
426 | printk(KERN_ERR "bulk pipe is insufficient\n"); | ||
427 | return -ENODEV; | ||
428 | } else { | ||
429 | info.pipe = M66592_BASE_PIPENUM_ISOC + | ||
430 | m66592->isochronous; | ||
431 | counter = &m66592->isochronous; | ||
432 | } | ||
433 | } else { | ||
434 | info.pipe = M66592_BASE_PIPENUM_BULK + m66592->bulk; | ||
435 | counter = &m66592->bulk; | ||
436 | } | ||
437 | info.type = M66592_BULK; | ||
438 | dma = 1; | ||
439 | break; | ||
440 | case USB_ENDPOINT_XFER_INT: | ||
441 | if (m66592->interrupt >= M66592_MAX_NUM_INT) { | ||
442 | printk(KERN_ERR "interrupt pipe is insufficient\n"); | ||
443 | return -ENODEV; | ||
444 | } | ||
445 | info.pipe = M66592_BASE_PIPENUM_INT + m66592->interrupt; | ||
446 | info.type = M66592_INT; | ||
447 | counter = &m66592->interrupt; | ||
448 | break; | ||
449 | case USB_ENDPOINT_XFER_ISOC: | ||
450 | if (m66592->isochronous >= M66592_MAX_NUM_ISOC) { | ||
451 | printk(KERN_ERR "isochronous pipe is insufficient\n"); | ||
452 | return -ENODEV; | ||
453 | } | ||
454 | info.pipe = M66592_BASE_PIPENUM_ISOC + m66592->isochronous; | ||
455 | info.type = M66592_ISO; | ||
456 | counter = &m66592->isochronous; | ||
457 | break; | ||
458 | default: | ||
459 | printk(KERN_ERR "unexpect xfer type\n"); | ||
460 | return -EINVAL; | ||
461 | } | ||
462 | ep->type = info.type; | ||
463 | |||
464 | info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; | ||
465 | info.maxpacket = desc->wMaxPacketSize; | ||
466 | info.interval = desc->bInterval; | ||
467 | if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) | ||
468 | info.dir_in = 1; | ||
469 | else | ||
470 | info.dir_in = 0; | ||
471 | |||
472 | ret = pipe_buffer_setting(m66592, &info); | ||
473 | if (ret < 0) { | ||
474 | printk(KERN_ERR "pipe_buffer_setting fail\n"); | ||
475 | return ret; | ||
476 | } | ||
477 | |||
478 | (*counter)++; | ||
479 | if ((counter == &m66592->isochronous) && info.type == M66592_BULK) | ||
480 | m66592->bulk++; | ||
481 | |||
482 | m66592_ep_setting(m66592, ep, desc, info.pipe, dma); | ||
483 | pipe_initialize(ep); | ||
484 | |||
485 | return 0; | ||
486 | } | ||
487 | |||
488 | static int free_pipe_config(struct m66592_ep *ep) | ||
489 | { | ||
490 | struct m66592 *m66592 = ep->m66592; | ||
491 | struct m66592_pipe_info info; | ||
492 | |||
493 | info.pipe = ep->pipenum; | ||
494 | info.type = ep->type; | ||
495 | pipe_buffer_release(m66592, &info); | ||
496 | m66592_ep_release(ep); | ||
497 | |||
498 | return 0; | ||
499 | } | ||
500 | |||
501 | /*-------------------------------------------------------------------------*/ | ||
502 | static void pipe_irq_enable(struct m66592 *m66592, u16 pipenum) | ||
503 | { | ||
504 | enable_irq_ready(m66592, pipenum); | ||
505 | enable_irq_nrdy(m66592, pipenum); | ||
506 | } | ||
507 | |||
508 | static void pipe_irq_disable(struct m66592 *m66592, u16 pipenum) | ||
509 | { | ||
510 | disable_irq_ready(m66592, pipenum); | ||
511 | disable_irq_nrdy(m66592, pipenum); | ||
512 | } | ||
513 | |||
514 | /* if complete is true, gadget driver complete function is not call */ | ||
515 | static void control_end(struct m66592 *m66592, unsigned ccpl) | ||
516 | { | ||
517 | m66592->ep[0].internal_ccpl = ccpl; | ||
518 | pipe_start(m66592, 0); | ||
519 | m66592_bset(m66592, M66592_CCPL, M66592_DCPCTR); | ||
520 | } | ||
521 | |||
522 | static void start_ep0_write(struct m66592_ep *ep, struct m66592_request *req) | ||
523 | { | ||
524 | struct m66592 *m66592 = ep->m66592; | ||
525 | |||
526 | pipe_change(m66592, ep->pipenum); | ||
527 | m66592_mdfy(m66592, M66592_ISEL | M66592_PIPE0, | ||
528 | (M66592_ISEL | M66592_CURPIPE), | ||
529 | M66592_CFIFOSEL); | ||
530 | m66592_write(m66592, M66592_BCLR, ep->fifoctr); | ||
531 | if (req->req.length == 0) { | ||
532 | m66592_bset(m66592, M66592_BVAL, ep->fifoctr); | ||
533 | pipe_start(m66592, 0); | ||
534 | transfer_complete(ep, req, 0); | ||
535 | } else { | ||
536 | m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS); | ||
537 | irq_ep0_write(ep, req); | ||
538 | } | ||
539 | } | ||
540 | |||
541 | static void start_packet_write(struct m66592_ep *ep, struct m66592_request *req) | ||
542 | { | ||
543 | struct m66592 *m66592 = ep->m66592; | ||
544 | u16 tmp; | ||
545 | |||
546 | pipe_change(m66592, ep->pipenum); | ||
547 | disable_irq_empty(m66592, ep->pipenum); | ||
548 | pipe_start(m66592, ep->pipenum); | ||
549 | |||
550 | tmp = m66592_read(m66592, ep->fifoctr); | ||
551 | if (unlikely((tmp & M66592_FRDY) == 0)) | ||
552 | pipe_irq_enable(m66592, ep->pipenum); | ||
553 | else | ||
554 | irq_packet_write(ep, req); | ||
555 | } | ||
556 | |||
557 | static void start_packet_read(struct m66592_ep *ep, struct m66592_request *req) | ||
558 | { | ||
559 | struct m66592 *m66592 = ep->m66592; | ||
560 | u16 pipenum = ep->pipenum; | ||
561 | |||
562 | if (ep->pipenum == 0) { | ||
563 | m66592_mdfy(m66592, M66592_PIPE0, | ||
564 | (M66592_ISEL | M66592_CURPIPE), | ||
565 | M66592_CFIFOSEL); | ||
566 | m66592_write(m66592, M66592_BCLR, ep->fifoctr); | ||
567 | pipe_start(m66592, pipenum); | ||
568 | pipe_irq_enable(m66592, pipenum); | ||
569 | } else { | ||
570 | if (ep->use_dma) { | ||
571 | m66592_bset(m66592, M66592_TRCLR, ep->fifosel); | ||
572 | pipe_change(m66592, pipenum); | ||
573 | m66592_bset(m66592, M66592_TRENB, ep->fifosel); | ||
574 | m66592_write(m66592, | ||
575 | (req->req.length + ep->ep.maxpacket - 1) / | ||
576 | ep->ep.maxpacket, ep->fifotrn); | ||
577 | } | ||
578 | pipe_start(m66592, pipenum); /* trigger once */ | ||
579 | pipe_irq_enable(m66592, pipenum); | ||
580 | } | ||
581 | } | ||
582 | |||
583 | static void start_packet(struct m66592_ep *ep, struct m66592_request *req) | ||
584 | { | ||
585 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | ||
586 | start_packet_write(ep, req); | ||
587 | else | ||
588 | start_packet_read(ep, req); | ||
589 | } | ||
590 | |||
591 | static void start_ep0(struct m66592_ep *ep, struct m66592_request *req) | ||
592 | { | ||
593 | u16 ctsq; | ||
594 | |||
595 | ctsq = m66592_read(ep->m66592, M66592_INTSTS0) & M66592_CTSQ; | ||
596 | |||
597 | switch (ctsq) { | ||
598 | case M66592_CS_RDDS: | ||
599 | start_ep0_write(ep, req); | ||
600 | break; | ||
601 | case M66592_CS_WRDS: | ||
602 | start_packet_read(ep, req); | ||
603 | break; | ||
604 | |||
605 | case M66592_CS_WRND: | ||
606 | control_end(ep->m66592, 0); | ||
607 | break; | ||
608 | default: | ||
609 | printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); | ||
610 | break; | ||
611 | } | ||
612 | } | ||
613 | |||
614 | static void init_controller(struct m66592 *m66592) | ||
615 | { | ||
616 | m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND), | ||
617 | M66592_PINCFG); | ||
618 | m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ | ||
619 | m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, M66592_SYSCFG); | ||
620 | |||
621 | m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); | ||
622 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | ||
623 | m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); | ||
624 | |||
625 | m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); | ||
626 | |||
627 | msleep(3); | ||
628 | |||
629 | m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); | ||
630 | |||
631 | msleep(1); | ||
632 | |||
633 | m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); | ||
634 | |||
635 | m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1); | ||
636 | m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR, | ||
637 | M66592_DMA0CFG); | ||
638 | } | ||
639 | |||
640 | static void disable_controller(struct m66592 *m66592) | ||
641 | { | ||
642 | m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); | ||
643 | udelay(1); | ||
644 | m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); | ||
645 | udelay(1); | ||
646 | m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG); | ||
647 | udelay(1); | ||
648 | m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG); | ||
649 | } | ||
650 | |||
651 | static void m66592_start_xclock(struct m66592 *m66592) | ||
652 | { | ||
653 | u16 tmp; | ||
654 | |||
655 | tmp = m66592_read(m66592, M66592_SYSCFG); | ||
656 | if (!(tmp & M66592_XCKE)) | ||
657 | m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); | ||
658 | } | ||
659 | |||
660 | /*-------------------------------------------------------------------------*/ | ||
661 | static void transfer_complete(struct m66592_ep *ep, | ||
662 | struct m66592_request *req, | ||
663 | int status) | ||
664 | { | ||
665 | int restart = 0; | ||
666 | |||
667 | if (unlikely(ep->pipenum == 0)) { | ||
668 | if (ep->internal_ccpl) { | ||
669 | ep->internal_ccpl = 0; | ||
670 | return; | ||
671 | } | ||
672 | } | ||
673 | |||
674 | list_del_init(&req->queue); | ||
675 | if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN) | ||
676 | req->req.status = -ESHUTDOWN; | ||
677 | else | ||
678 | req->req.status = status; | ||
679 | |||
680 | if (!list_empty(&ep->queue)) | ||
681 | restart = 1; | ||
682 | |||
683 | if (likely(req->req.complete)) | ||
684 | req->req.complete(&ep->ep, &req->req); | ||
685 | |||
686 | if (restart) { | ||
687 | req = list_entry(ep->queue.next, struct m66592_request, queue); | ||
688 | if (ep->desc) | ||
689 | start_packet(ep, req); | ||
690 | } | ||
691 | } | ||
692 | |||
693 | static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req) | ||
694 | { | ||
695 | int i; | ||
696 | volatile u16 tmp; | ||
697 | unsigned bufsize; | ||
698 | size_t size; | ||
699 | void *buf; | ||
700 | u16 pipenum = ep->pipenum; | ||
701 | struct m66592 *m66592 = ep->m66592; | ||
702 | |||
703 | pipe_change(m66592, pipenum); | ||
704 | m66592_bset(m66592, M66592_ISEL, ep->fifosel); | ||
705 | |||
706 | i = 0; | ||
707 | do { | ||
708 | tmp = m66592_read(m66592, ep->fifoctr); | ||
709 | if (i++ > 100000) { | ||
710 | printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" | ||
711 | "conflict. please power off this controller."); | ||
712 | return; | ||
713 | } | ||
714 | ndelay(1); | ||
715 | } while ((tmp & M66592_FRDY) == 0); | ||
716 | |||
717 | /* prepare parameters */ | ||
718 | bufsize = get_buffer_size(m66592, pipenum); | ||
719 | buf = req->req.buf + req->req.actual; | ||
720 | size = min(bufsize, req->req.length - req->req.actual); | ||
721 | |||
722 | /* write fifo */ | ||
723 | if (req->req.buf) { | ||
724 | if (size > 0) | ||
725 | m66592_write_fifo(m66592, ep->fifoaddr, buf, size); | ||
726 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) | ||
727 | m66592_bset(m66592, M66592_BVAL, ep->fifoctr); | ||
728 | } | ||
729 | |||
730 | /* update parameters */ | ||
731 | req->req.actual += size; | ||
732 | |||
733 | /* check transfer finish */ | ||
734 | if ((!req->req.zero && (req->req.actual == req->req.length)) || | ||
735 | (size % ep->ep.maxpacket) || (size == 0)) { | ||
736 | disable_irq_ready(m66592, pipenum); | ||
737 | disable_irq_empty(m66592, pipenum); | ||
738 | } else { | ||
739 | disable_irq_ready(m66592, pipenum); | ||
740 | enable_irq_empty(m66592, pipenum); | ||
741 | } | ||
742 | pipe_start(m66592, pipenum); | ||
743 | } | ||
744 | |||
745 | static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req) | ||
746 | { | ||
747 | u16 tmp; | ||
748 | unsigned bufsize; | ||
749 | size_t size; | ||
750 | void *buf; | ||
751 | u16 pipenum = ep->pipenum; | ||
752 | struct m66592 *m66592 = ep->m66592; | ||
753 | |||
754 | pipe_change(m66592, pipenum); | ||
755 | tmp = m66592_read(m66592, ep->fifoctr); | ||
756 | if (unlikely((tmp & M66592_FRDY) == 0)) { | ||
757 | pipe_stop(m66592, pipenum); | ||
758 | pipe_irq_disable(m66592, pipenum); | ||
759 | printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); | ||
760 | return; | ||
761 | } | ||
762 | |||
763 | /* prepare parameters */ | ||
764 | bufsize = get_buffer_size(m66592, pipenum); | ||
765 | buf = req->req.buf + req->req.actual; | ||
766 | size = min(bufsize, req->req.length - req->req.actual); | ||
767 | |||
768 | /* write fifo */ | ||
769 | if (req->req.buf) { | ||
770 | m66592_write_fifo(m66592, ep->fifoaddr, buf, size); | ||
771 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0) || | ||
772 | ((bufsize != ep->ep.maxpacket) && (bufsize > size))) | ||
773 | m66592_bset(m66592, M66592_BVAL, ep->fifoctr); | ||
774 | } | ||
775 | |||
776 | /* update parameters */ | ||
777 | req->req.actual += size; | ||
778 | /* check transfer finish */ | ||
779 | if ((!req->req.zero && (req->req.actual == req->req.length)) || | ||
780 | (size % ep->ep.maxpacket) || (size == 0)) { | ||
781 | disable_irq_ready(m66592, pipenum); | ||
782 | enable_irq_empty(m66592, pipenum); | ||
783 | } else { | ||
784 | disable_irq_empty(m66592, pipenum); | ||
785 | pipe_irq_enable(m66592, pipenum); | ||
786 | } | ||
787 | } | ||
788 | |||
789 | static void irq_packet_read(struct m66592_ep *ep, struct m66592_request *req) | ||
790 | { | ||
791 | u16 tmp; | ||
792 | int rcv_len, bufsize, req_len; | ||
793 | int size; | ||
794 | void *buf; | ||
795 | u16 pipenum = ep->pipenum; | ||
796 | struct m66592 *m66592 = ep->m66592; | ||
797 | int finish = 0; | ||
798 | |||
799 | pipe_change(m66592, pipenum); | ||
800 | tmp = m66592_read(m66592, ep->fifoctr); | ||
801 | if (unlikely((tmp & M66592_FRDY) == 0)) { | ||
802 | req->req.status = -EPIPE; | ||
803 | pipe_stop(m66592, pipenum); | ||
804 | pipe_irq_disable(m66592, pipenum); | ||
805 | printk(KERN_ERR "read fifo not ready"); | ||
806 | return; | ||
807 | } | ||
808 | |||
809 | /* prepare parameters */ | ||
810 | rcv_len = tmp & M66592_DTLN; | ||
811 | bufsize = get_buffer_size(m66592, pipenum); | ||
812 | |||
813 | buf = req->req.buf + req->req.actual; | ||
814 | req_len = req->req.length - req->req.actual; | ||
815 | if (rcv_len < bufsize) | ||
816 | size = min(rcv_len, req_len); | ||
817 | else | ||
818 | size = min(bufsize, req_len); | ||
819 | |||
820 | /* update parameters */ | ||
821 | req->req.actual += size; | ||
822 | |||
823 | /* check transfer finish */ | ||
824 | if ((!req->req.zero && (req->req.actual == req->req.length)) || | ||
825 | (size % ep->ep.maxpacket) || (size == 0)) { | ||
826 | pipe_stop(m66592, pipenum); | ||
827 | pipe_irq_disable(m66592, pipenum); | ||
828 | finish = 1; | ||
829 | } | ||
830 | |||
831 | /* read fifo */ | ||
832 | if (req->req.buf) { | ||
833 | if (size == 0) | ||
834 | m66592_write(m66592, M66592_BCLR, ep->fifoctr); | ||
835 | else | ||
836 | m66592_read_fifo(m66592, ep->fifoaddr, buf, size); | ||
837 | } | ||
838 | |||
839 | if ((ep->pipenum != 0) && finish) | ||
840 | transfer_complete(ep, req, 0); | ||
841 | } | ||
842 | |||
843 | static void irq_pipe_ready(struct m66592 *m66592, u16 status, u16 enb) | ||
844 | { | ||
845 | u16 check; | ||
846 | u16 pipenum; | ||
847 | struct m66592_ep *ep; | ||
848 | struct m66592_request *req; | ||
849 | |||
850 | if ((status & M66592_BRDY0) && (enb & M66592_BRDY0)) { | ||
851 | m66592_write(m66592, ~M66592_BRDY0, M66592_BRDYSTS); | ||
852 | m66592_mdfy(m66592, M66592_PIPE0, M66592_CURPIPE, | ||
853 | M66592_CFIFOSEL); | ||
854 | |||
855 | ep = &m66592->ep[0]; | ||
856 | req = list_entry(ep->queue.next, struct m66592_request, queue); | ||
857 | irq_packet_read(ep, req); | ||
858 | } else { | ||
859 | for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) { | ||
860 | check = 1 << pipenum; | ||
861 | if ((status & check) && (enb & check)) { | ||
862 | m66592_write(m66592, ~check, M66592_BRDYSTS); | ||
863 | ep = m66592->pipenum2ep[pipenum]; | ||
864 | req = list_entry(ep->queue.next, | ||
865 | struct m66592_request, queue); | ||
866 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | ||
867 | irq_packet_write(ep, req); | ||
868 | else | ||
869 | irq_packet_read(ep, req); | ||
870 | } | ||
871 | } | ||
872 | } | ||
873 | } | ||
874 | |||
875 | static void irq_pipe_empty(struct m66592 *m66592, u16 status, u16 enb) | ||
876 | { | ||
877 | u16 tmp; | ||
878 | u16 check; | ||
879 | u16 pipenum; | ||
880 | struct m66592_ep *ep; | ||
881 | struct m66592_request *req; | ||
882 | |||
883 | if ((status & M66592_BEMP0) && (enb & M66592_BEMP0)) { | ||
884 | m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS); | ||
885 | |||
886 | ep = &m66592->ep[0]; | ||
887 | req = list_entry(ep->queue.next, struct m66592_request, queue); | ||
888 | irq_ep0_write(ep, req); | ||
889 | } else { | ||
890 | for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) { | ||
891 | check = 1 << pipenum; | ||
892 | if ((status & check) && (enb & check)) { | ||
893 | m66592_write(m66592, ~check, M66592_BEMPSTS); | ||
894 | tmp = control_reg_get(m66592, pipenum); | ||
895 | if ((tmp & M66592_INBUFM) == 0) { | ||
896 | disable_irq_empty(m66592, pipenum); | ||
897 | pipe_irq_disable(m66592, pipenum); | ||
898 | pipe_stop(m66592, pipenum); | ||
899 | ep = m66592->pipenum2ep[pipenum]; | ||
900 | req = list_entry(ep->queue.next, | ||
901 | struct m66592_request, | ||
902 | queue); | ||
903 | if (!list_empty(&ep->queue)) | ||
904 | transfer_complete(ep, req, 0); | ||
905 | } | ||
906 | } | ||
907 | } | ||
908 | } | ||
909 | } | ||
910 | |||
911 | static void get_status(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) | ||
912 | { | ||
913 | struct m66592_ep *ep; | ||
914 | u16 pid; | ||
915 | u16 status = 0; | ||
916 | |||
917 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
918 | case USB_RECIP_DEVICE: | ||
919 | status = 1; /* selfpower */ | ||
920 | break; | ||
921 | case USB_RECIP_INTERFACE: | ||
922 | status = 0; | ||
923 | break; | ||
924 | case USB_RECIP_ENDPOINT: | ||
925 | ep = m66592->epaddr2ep[ctrl->wIndex&USB_ENDPOINT_NUMBER_MASK]; | ||
926 | pid = control_reg_get_pid(m66592, ep->pipenum); | ||
927 | if (pid == M66592_PID_STALL) | ||
928 | status = 1; | ||
929 | else | ||
930 | status = 0; | ||
931 | break; | ||
932 | default: | ||
933 | pipe_stall(m66592, 0); | ||
934 | return; /* exit */ | ||
935 | } | ||
936 | |||
937 | *m66592->ep0_buf = status; | ||
938 | m66592->ep0_req->buf = m66592->ep0_buf; | ||
939 | m66592->ep0_req->length = 2; | ||
940 | m66592_queue(m66592->gadget.ep0, m66592->ep0_req, GFP_KERNEL); | ||
941 | } | ||
942 | |||
943 | static void clear_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) | ||
944 | { | ||
945 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
946 | case USB_RECIP_DEVICE: | ||
947 | control_end(m66592, 1); | ||
948 | break; | ||
949 | case USB_RECIP_INTERFACE: | ||
950 | control_end(m66592, 1); | ||
951 | break; | ||
952 | case USB_RECIP_ENDPOINT: { | ||
953 | struct m66592_ep *ep; | ||
954 | struct m66592_request *req; | ||
955 | |||
956 | ep = m66592->epaddr2ep[ctrl->wIndex&USB_ENDPOINT_NUMBER_MASK]; | ||
957 | pipe_stop(m66592, ep->pipenum); | ||
958 | control_reg_sqclr(m66592, ep->pipenum); | ||
959 | |||
960 | control_end(m66592, 1); | ||
961 | |||
962 | req = list_entry(ep->queue.next, | ||
963 | struct m66592_request, queue); | ||
964 | if (ep->busy) { | ||
965 | ep->busy = 0; | ||
966 | if (list_empty(&ep->queue)) | ||
967 | break; | ||
968 | start_packet(ep, req); | ||
969 | } else if (!list_empty(&ep->queue)) | ||
970 | pipe_start(m66592, ep->pipenum); | ||
971 | } | ||
972 | break; | ||
973 | default: | ||
974 | pipe_stall(m66592, 0); | ||
975 | break; | ||
976 | } | ||
977 | } | ||
978 | |||
979 | static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) | ||
980 | { | ||
981 | |||
982 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
983 | case USB_RECIP_DEVICE: | ||
984 | control_end(m66592, 1); | ||
985 | break; | ||
986 | case USB_RECIP_INTERFACE: | ||
987 | control_end(m66592, 1); | ||
988 | break; | ||
989 | case USB_RECIP_ENDPOINT: { | ||
990 | struct m66592_ep *ep; | ||
991 | |||
992 | ep = m66592->epaddr2ep[ctrl->wIndex&USB_ENDPOINT_NUMBER_MASK]; | ||
993 | pipe_stall(m66592, ep->pipenum); | ||
994 | |||
995 | control_end(m66592, 1); | ||
996 | } | ||
997 | break; | ||
998 | default: | ||
999 | pipe_stall(m66592, 0); | ||
1000 | break; | ||
1001 | } | ||
1002 | } | ||
1003 | |||
1004 | /* if return value is true, call class driver's setup() */ | ||
1005 | static int setup_packet(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) | ||
1006 | { | ||
1007 | u16 *p = (u16 *)ctrl; | ||
1008 | unsigned long offset = M66592_USBREQ; | ||
1009 | int i, ret = 0; | ||
1010 | |||
1011 | /* read fifo */ | ||
1012 | m66592_write(m66592, ~M66592_VALID, M66592_INTSTS0); | ||
1013 | |||
1014 | for (i = 0; i < 4; i++) | ||
1015 | p[i] = m66592_read(m66592, offset + i*2); | ||
1016 | |||
1017 | /* check request */ | ||
1018 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | ||
1019 | switch (ctrl->bRequest) { | ||
1020 | case USB_REQ_GET_STATUS: | ||
1021 | get_status(m66592, ctrl); | ||
1022 | break; | ||
1023 | case USB_REQ_CLEAR_FEATURE: | ||
1024 | clear_feature(m66592, ctrl); | ||
1025 | break; | ||
1026 | case USB_REQ_SET_FEATURE: | ||
1027 | set_feature(m66592, ctrl); | ||
1028 | break; | ||
1029 | default: | ||
1030 | ret = 1; | ||
1031 | break; | ||
1032 | } | ||
1033 | } else | ||
1034 | ret = 1; | ||
1035 | return ret; | ||
1036 | } | ||
1037 | |||
1038 | static void m66592_update_usb_speed(struct m66592 *m66592) | ||
1039 | { | ||
1040 | u16 speed = get_usb_speed(m66592); | ||
1041 | |||
1042 | switch (speed) { | ||
1043 | case M66592_HSMODE: | ||
1044 | m66592->gadget.speed = USB_SPEED_HIGH; | ||
1045 | break; | ||
1046 | case M66592_FSMODE: | ||
1047 | m66592->gadget.speed = USB_SPEED_FULL; | ||
1048 | break; | ||
1049 | default: | ||
1050 | m66592->gadget.speed = USB_SPEED_UNKNOWN; | ||
1051 | printk(KERN_ERR "USB speed unknown\n"); | ||
1052 | } | ||
1053 | } | ||
1054 | |||
1055 | static void irq_device_state(struct m66592 *m66592) | ||
1056 | { | ||
1057 | u16 dvsq; | ||
1058 | |||
1059 | dvsq = m66592_read(m66592, M66592_INTSTS0) & M66592_DVSQ; | ||
1060 | m66592_write(m66592, ~M66592_DVST, M66592_INTSTS0); | ||
1061 | |||
1062 | if (dvsq == M66592_DS_DFLT) { /* bus reset */ | ||
1063 | m66592->driver->disconnect(&m66592->gadget); | ||
1064 | m66592_update_usb_speed(m66592); | ||
1065 | } | ||
1066 | if (m66592->old_dvsq == M66592_DS_CNFG && dvsq != M66592_DS_CNFG) | ||
1067 | m66592_update_usb_speed(m66592); | ||
1068 | if ((dvsq == M66592_DS_CNFG || dvsq == M66592_DS_ADDS) && | ||
1069 | m66592->gadget.speed == USB_SPEED_UNKNOWN) | ||
1070 | m66592_update_usb_speed(m66592); | ||
1071 | |||
1072 | m66592->old_dvsq = dvsq; | ||
1073 | } | ||
1074 | |||
1075 | static void irq_control_stage(struct m66592 *m66592) | ||
1076 | { | ||
1077 | struct usb_ctrlrequest ctrl; | ||
1078 | u16 ctsq; | ||
1079 | |||
1080 | ctsq = m66592_read(m66592, M66592_INTSTS0) & M66592_CTSQ; | ||
1081 | m66592_write(m66592, ~M66592_CTRT, M66592_INTSTS0); | ||
1082 | |||
1083 | switch (ctsq) { | ||
1084 | case M66592_CS_IDST: { | ||
1085 | struct m66592_ep *ep; | ||
1086 | struct m66592_request *req; | ||
1087 | ep = &m66592->ep[0]; | ||
1088 | req = list_entry(ep->queue.next, struct m66592_request, queue); | ||
1089 | transfer_complete(ep, req, 0); | ||
1090 | } | ||
1091 | break; | ||
1092 | |||
1093 | case M66592_CS_RDDS: | ||
1094 | case M66592_CS_WRDS: | ||
1095 | case M66592_CS_WRND: | ||
1096 | if (setup_packet(m66592, &ctrl)) { | ||
1097 | if (m66592->driver->setup(&m66592->gadget, &ctrl) < 0) | ||
1098 | pipe_stall(m66592, 0); | ||
1099 | } | ||
1100 | break; | ||
1101 | case M66592_CS_RDSS: | ||
1102 | case M66592_CS_WRSS: | ||
1103 | control_end(m66592, 0); | ||
1104 | break; | ||
1105 | default: | ||
1106 | printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); | ||
1107 | break; | ||
1108 | } | ||
1109 | } | ||
1110 | |||
1111 | static irqreturn_t m66592_irq(int irq, void *_m66592) | ||
1112 | { | ||
1113 | struct m66592 *m66592 = _m66592; | ||
1114 | u16 intsts0; | ||
1115 | u16 intenb0; | ||
1116 | u16 brdysts, nrdysts, bempsts; | ||
1117 | u16 brdyenb, nrdyenb, bempenb; | ||
1118 | u16 savepipe; | ||
1119 | u16 mask0; | ||
1120 | |||
1121 | intsts0 = m66592_read(m66592, M66592_INTSTS0); | ||
1122 | intenb0 = m66592_read(m66592, M66592_INTENB0); | ||
1123 | |||
1124 | savepipe = m66592_read(m66592, M66592_CFIFOSEL); | ||
1125 | |||
1126 | mask0 = intsts0 & intenb0; | ||
1127 | if (mask0) { | ||
1128 | brdysts = m66592_read(m66592, M66592_BRDYSTS); | ||
1129 | nrdysts = m66592_read(m66592, M66592_NRDYSTS); | ||
1130 | bempsts = m66592_read(m66592, M66592_BEMPSTS); | ||
1131 | brdyenb = m66592_read(m66592, M66592_BRDYENB); | ||
1132 | nrdyenb = m66592_read(m66592, M66592_NRDYENB); | ||
1133 | bempenb = m66592_read(m66592, M66592_BEMPENB); | ||
1134 | |||
1135 | if (mask0 & M66592_VBINT) { | ||
1136 | m66592_write(m66592, (u16)~M66592_VBINT, | ||
1137 | M66592_INTSTS0); | ||
1138 | m66592_start_xclock(m66592); | ||
1139 | |||
1140 | /* start vbus sampling */ | ||
1141 | m66592->old_vbus = m66592_read(m66592, M66592_INTSTS0) | ||
1142 | & M66592_VBSTS; | ||
1143 | m66592->scount = M66592_MAX_SAMPLING; | ||
1144 | |||
1145 | mod_timer(&m66592->timer, | ||
1146 | jiffies + msecs_to_jiffies(50)); | ||
1147 | } | ||
1148 | if (intsts0 & M66592_DVSQ) | ||
1149 | irq_device_state(m66592); | ||
1150 | |||
1151 | if ((intsts0 & M66592_BRDY) && (intenb0 & M66592_BRDYE) && | ||
1152 | (brdysts & brdyenb)) { | ||
1153 | irq_pipe_ready(m66592, brdysts, brdyenb); | ||
1154 | } | ||
1155 | if ((intsts0 & M66592_BEMP) && (intenb0 & M66592_BEMPE) && | ||
1156 | (bempsts & bempenb)) { | ||
1157 | irq_pipe_empty(m66592, bempsts, bempenb); | ||
1158 | } | ||
1159 | |||
1160 | if (intsts0 & M66592_CTRT) | ||
1161 | irq_control_stage(m66592); | ||
1162 | } | ||
1163 | |||
1164 | m66592_write(m66592, savepipe, M66592_CFIFOSEL); | ||
1165 | |||
1166 | return IRQ_HANDLED; | ||
1167 | } | ||
1168 | |||
1169 | static void m66592_timer(unsigned long _m66592) | ||
1170 | { | ||
1171 | struct m66592 *m66592 = (struct m66592 *)_m66592; | ||
1172 | unsigned long flags; | ||
1173 | u16 tmp; | ||
1174 | |||
1175 | spin_lock_irqsave(&m66592->lock, flags); | ||
1176 | tmp = m66592_read(m66592, M66592_SYSCFG); | ||
1177 | if (!(tmp & M66592_RCKE)) { | ||
1178 | m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); | ||
1179 | udelay(10); | ||
1180 | m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); | ||
1181 | } | ||
1182 | if (m66592->scount > 0) { | ||
1183 | tmp = m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS; | ||
1184 | if (tmp == m66592->old_vbus) { | ||
1185 | m66592->scount--; | ||
1186 | if (m66592->scount == 0) { | ||
1187 | if (tmp == M66592_VBSTS) | ||
1188 | m66592_usb_connect(m66592); | ||
1189 | else | ||
1190 | m66592_usb_disconnect(m66592); | ||
1191 | } else { | ||
1192 | mod_timer(&m66592->timer, | ||
1193 | jiffies + msecs_to_jiffies(50)); | ||
1194 | } | ||
1195 | } else { | ||
1196 | m66592->scount = M66592_MAX_SAMPLING; | ||
1197 | m66592->old_vbus = tmp; | ||
1198 | mod_timer(&m66592->timer, | ||
1199 | jiffies + msecs_to_jiffies(50)); | ||
1200 | } | ||
1201 | } | ||
1202 | spin_unlock_irqrestore(&m66592->lock, flags); | ||
1203 | } | ||
1204 | |||
1205 | /*-------------------------------------------------------------------------*/ | ||
1206 | static int m66592_enable(struct usb_ep *_ep, | ||
1207 | const struct usb_endpoint_descriptor *desc) | ||
1208 | { | ||
1209 | struct m66592_ep *ep; | ||
1210 | |||
1211 | ep = container_of(_ep, struct m66592_ep, ep); | ||
1212 | return alloc_pipe_config(ep, desc); | ||
1213 | } | ||
1214 | |||
1215 | static int m66592_disable(struct usb_ep *_ep) | ||
1216 | { | ||
1217 | struct m66592_ep *ep; | ||
1218 | struct m66592_request *req; | ||
1219 | unsigned long flags; | ||
1220 | |||
1221 | ep = container_of(_ep, struct m66592_ep, ep); | ||
1222 | BUG_ON(!ep); | ||
1223 | |||
1224 | while (!list_empty(&ep->queue)) { | ||
1225 | req = list_entry(ep->queue.next, struct m66592_request, queue); | ||
1226 | spin_lock_irqsave(&ep->m66592->lock, flags); | ||
1227 | transfer_complete(ep, req, -ECONNRESET); | ||
1228 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | ||
1229 | } | ||
1230 | |||
1231 | pipe_irq_disable(ep->m66592, ep->pipenum); | ||
1232 | return free_pipe_config(ep); | ||
1233 | } | ||
1234 | |||
1235 | static struct usb_request *m66592_alloc_request(struct usb_ep *_ep, | ||
1236 | gfp_t gfp_flags) | ||
1237 | { | ||
1238 | struct m66592_request *req; | ||
1239 | |||
1240 | req = kzalloc(sizeof(struct m66592_request), gfp_flags); | ||
1241 | if (!req) | ||
1242 | return NULL; | ||
1243 | |||
1244 | INIT_LIST_HEAD(&req->queue); | ||
1245 | |||
1246 | return &req->req; | ||
1247 | } | ||
1248 | |||
1249 | static void m66592_free_request(struct usb_ep *_ep, struct usb_request *_req) | ||
1250 | { | ||
1251 | struct m66592_request *req; | ||
1252 | |||
1253 | req = container_of(_req, struct m66592_request, req); | ||
1254 | kfree(req); | ||
1255 | } | ||
1256 | |||
1257 | static void *m66592_alloc_buffer(struct usb_ep *_ep, unsigned bytes, | ||
1258 | dma_addr_t *dma, gfp_t gfp_flags) | ||
1259 | { | ||
1260 | void *buf; | ||
1261 | |||
1262 | buf = kzalloc(bytes, gfp_flags); | ||
1263 | if (dma) | ||
1264 | *dma = virt_to_bus(buf); | ||
1265 | |||
1266 | return buf; | ||
1267 | } | ||
1268 | |||
1269 | static void m66592_free_buffer(struct usb_ep *_ep, void *buf, | ||
1270 | dma_addr_t dma, unsigned bytes) | ||
1271 | { | ||
1272 | kfree(buf); | ||
1273 | } | ||
1274 | |||
1275 | static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req, | ||
1276 | gfp_t gfp_flags) | ||
1277 | { | ||
1278 | struct m66592_ep *ep; | ||
1279 | struct m66592_request *req; | ||
1280 | unsigned long flags; | ||
1281 | int request = 0; | ||
1282 | |||
1283 | ep = container_of(_ep, struct m66592_ep, ep); | ||
1284 | req = container_of(_req, struct m66592_request, req); | ||
1285 | |||
1286 | if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN) | ||
1287 | return -ESHUTDOWN; | ||
1288 | |||
1289 | spin_lock_irqsave(&ep->m66592->lock, flags); | ||
1290 | |||
1291 | if (list_empty(&ep->queue)) | ||
1292 | request = 1; | ||
1293 | |||
1294 | list_add_tail(&req->queue, &ep->queue); | ||
1295 | req->req.actual = 0; | ||
1296 | req->req.status = -EINPROGRESS; | ||
1297 | |||
1298 | if (ep->desc == 0) /* control */ | ||
1299 | start_ep0(ep, req); | ||
1300 | else { | ||
1301 | if (request && !ep->busy) | ||
1302 | start_packet(ep, req); | ||
1303 | } | ||
1304 | |||
1305 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | ||
1306 | |||
1307 | return 0; | ||
1308 | } | ||
1309 | |||
1310 | static int m66592_dequeue(struct usb_ep *_ep, struct usb_request *_req) | ||
1311 | { | ||
1312 | struct m66592_ep *ep; | ||
1313 | struct m66592_request *req; | ||
1314 | unsigned long flags; | ||
1315 | |||
1316 | ep = container_of(_ep, struct m66592_ep, ep); | ||
1317 | req = container_of(_req, struct m66592_request, req); | ||
1318 | |||
1319 | spin_lock_irqsave(&ep->m66592->lock, flags); | ||
1320 | if (!list_empty(&ep->queue)) | ||
1321 | transfer_complete(ep, req, -ECONNRESET); | ||
1322 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | ||
1323 | |||
1324 | return 0; | ||
1325 | } | ||
1326 | |||
1327 | static int m66592_set_halt(struct usb_ep *_ep, int value) | ||
1328 | { | ||
1329 | struct m66592_ep *ep; | ||
1330 | struct m66592_request *req; | ||
1331 | unsigned long flags; | ||
1332 | int ret = 0; | ||
1333 | |||
1334 | ep = container_of(_ep, struct m66592_ep, ep); | ||
1335 | req = list_entry(ep->queue.next, struct m66592_request, queue); | ||
1336 | |||
1337 | spin_lock_irqsave(&ep->m66592->lock, flags); | ||
1338 | if (!list_empty(&ep->queue)) { | ||
1339 | ret = -EAGAIN; | ||
1340 | goto out; | ||
1341 | } | ||
1342 | if (value) { | ||
1343 | ep->busy = 1; | ||
1344 | pipe_stall(ep->m66592, ep->pipenum); | ||
1345 | } else { | ||
1346 | ep->busy = 0; | ||
1347 | pipe_stop(ep->m66592, ep->pipenum); | ||
1348 | } | ||
1349 | |||
1350 | out: | ||
1351 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | ||
1352 | return ret; | ||
1353 | } | ||
1354 | |||
1355 | static int m66592_fifo_status(struct usb_ep *_ep) | ||
1356 | { | ||
1357 | return -EOPNOTSUPP; | ||
1358 | } | ||
1359 | |||
1360 | static void m66592_fifo_flush(struct usb_ep *_ep) | ||
1361 | { | ||
1362 | struct m66592_ep *ep; | ||
1363 | unsigned long flags; | ||
1364 | |||
1365 | ep = container_of(_ep, struct m66592_ep, ep); | ||
1366 | spin_lock_irqsave(&ep->m66592->lock, flags); | ||
1367 | if (list_empty(&ep->queue) && !ep->busy) { | ||
1368 | pipe_stop(ep->m66592, ep->pipenum); | ||
1369 | m66592_bclr(ep->m66592, M66592_BCLR, ep->fifoctr); | ||
1370 | } | ||
1371 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | ||
1372 | } | ||
1373 | |||
1374 | static struct usb_ep_ops m66592_ep_ops = { | ||
1375 | .enable = m66592_enable, | ||
1376 | .disable = m66592_disable, | ||
1377 | |||
1378 | .alloc_request = m66592_alloc_request, | ||
1379 | .free_request = m66592_free_request, | ||
1380 | |||
1381 | .alloc_buffer = m66592_alloc_buffer, | ||
1382 | .free_buffer = m66592_free_buffer, | ||
1383 | |||
1384 | .queue = m66592_queue, | ||
1385 | .dequeue = m66592_dequeue, | ||
1386 | |||
1387 | .set_halt = m66592_set_halt, | ||
1388 | .fifo_status = m66592_fifo_status, | ||
1389 | .fifo_flush = m66592_fifo_flush, | ||
1390 | }; | ||
1391 | |||
1392 | /*-------------------------------------------------------------------------*/ | ||
1393 | static struct m66592 *the_controller; | ||
1394 | |||
1395 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | ||
1396 | { | ||
1397 | struct m66592 *m66592 = the_controller; | ||
1398 | int retval; | ||
1399 | |||
1400 | if (!driver || | ||
1401 | driver->speed != USB_SPEED_HIGH || | ||
1402 | !driver->bind || | ||
1403 | !driver->unbind || | ||
1404 | !driver->setup) | ||
1405 | return -EINVAL; | ||
1406 | if (!m66592) | ||
1407 | return -ENODEV; | ||
1408 | if (m66592->driver) | ||
1409 | return -EBUSY; | ||
1410 | |||
1411 | /* hook up the driver */ | ||
1412 | driver->driver.bus = NULL; | ||
1413 | m66592->driver = driver; | ||
1414 | m66592->gadget.dev.driver = &driver->driver; | ||
1415 | |||
1416 | retval = device_add(&m66592->gadget.dev); | ||
1417 | if (retval) { | ||
1418 | printk(KERN_ERR "device_add error (%d)\n", retval); | ||
1419 | goto error; | ||
1420 | } | ||
1421 | |||
1422 | retval = driver->bind (&m66592->gadget); | ||
1423 | if (retval) { | ||
1424 | printk(KERN_ERR "bind to driver error (%d)\n", retval); | ||
1425 | device_del(&m66592->gadget.dev); | ||
1426 | goto error; | ||
1427 | } | ||
1428 | |||
1429 | m66592_bset(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0); | ||
1430 | if (m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS) { | ||
1431 | m66592_start_xclock(m66592); | ||
1432 | /* start vbus sampling */ | ||
1433 | m66592->old_vbus = m66592_read(m66592, | ||
1434 | M66592_INTSTS0) & M66592_VBSTS; | ||
1435 | m66592->scount = M66592_MAX_SAMPLING; | ||
1436 | mod_timer(&m66592->timer, | ||
1437 | jiffies + msecs_to_jiffies(50)); | ||
1438 | } | ||
1439 | |||
1440 | return 0; | ||
1441 | |||
1442 | error: | ||
1443 | m66592->driver = NULL; | ||
1444 | m66592->gadget.dev.driver = NULL; | ||
1445 | |||
1446 | return retval; | ||
1447 | } | ||
1448 | EXPORT_SYMBOL(usb_gadget_register_driver); | ||
1449 | |||
1450 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | ||
1451 | { | ||
1452 | struct m66592 *m66592 = the_controller; | ||
1453 | unsigned long flags; | ||
1454 | |||
1455 | spin_lock_irqsave(&m66592->lock, flags); | ||
1456 | if (m66592->gadget.speed != USB_SPEED_UNKNOWN) | ||
1457 | m66592_usb_disconnect(m66592); | ||
1458 | spin_unlock_irqrestore(&m66592->lock, flags); | ||
1459 | |||
1460 | m66592_bclr(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0); | ||
1461 | |||
1462 | driver->unbind(&m66592->gadget); | ||
1463 | |||
1464 | init_controller(m66592); | ||
1465 | disable_controller(m66592); | ||
1466 | |||
1467 | device_del(&m66592->gadget.dev); | ||
1468 | m66592->driver = NULL; | ||
1469 | return 0; | ||
1470 | } | ||
1471 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | ||
1472 | |||
1473 | /*-------------------------------------------------------------------------*/ | ||
1474 | static int m66592_get_frame(struct usb_gadget *_gadget) | ||
1475 | { | ||
1476 | struct m66592 *m66592 = gadget_to_m66592(_gadget); | ||
1477 | return m66592_read(m66592, M66592_FRMNUM) & 0x03FF; | ||
1478 | } | ||
1479 | |||
1480 | static struct usb_gadget_ops m66592_gadget_ops = { | ||
1481 | .get_frame = m66592_get_frame, | ||
1482 | }; | ||
1483 | |||
1484 | #if defined(CONFIG_PM) | ||
1485 | static int m66592_suspend(struct platform_device *pdev, pm_message_t state) | ||
1486 | { | ||
1487 | pdev->dev.power.power_state = state; | ||
1488 | return 0; | ||
1489 | } | ||
1490 | |||
1491 | static int m66592_resume(struct platform_device *pdev) | ||
1492 | { | ||
1493 | pdev->dev.power.power_state = PMSG_ON; | ||
1494 | return 0; | ||
1495 | } | ||
1496 | #else /* if defined(CONFIG_PM) */ | ||
1497 | #define m66592_suspend NULL | ||
1498 | #define m66592_resume NULL | ||
1499 | #endif | ||
1500 | |||
1501 | static int __init_or_module m66592_remove(struct platform_device *pdev) | ||
1502 | { | ||
1503 | struct m66592 *m66592 = dev_get_drvdata(&pdev->dev); | ||
1504 | |||
1505 | del_timer_sync(&m66592->timer); | ||
1506 | iounmap(m66592->reg); | ||
1507 | free_irq(platform_get_irq(pdev, 0), m66592); | ||
1508 | kfree(m66592); | ||
1509 | return 0; | ||
1510 | } | ||
1511 | |||
1512 | #define resource_len(r) (((r)->end - (r)->start) + 1) | ||
1513 | static int __init m66592_probe(struct platform_device *pdev) | ||
1514 | { | ||
1515 | struct resource *res = NULL; | ||
1516 | int irq = -1; | ||
1517 | void __iomem *reg = NULL; | ||
1518 | struct m66592 *m66592 = NULL; | ||
1519 | int ret = 0; | ||
1520 | int i; | ||
1521 | |||
1522 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, | ||
1523 | (char *)udc_name); | ||
1524 | if (!res) { | ||
1525 | ret = -ENODEV; | ||
1526 | printk(KERN_ERR "platform_get_resource_byname error.\n"); | ||
1527 | goto clean_up; | ||
1528 | } | ||
1529 | |||
1530 | irq = platform_get_irq(pdev, 0); | ||
1531 | if (irq < 0) { | ||
1532 | ret = -ENODEV; | ||
1533 | printk(KERN_ERR "platform_get_irq error.\n"); | ||
1534 | goto clean_up; | ||
1535 | } | ||
1536 | |||
1537 | reg = ioremap(res->start, resource_len(res)); | ||
1538 | if (reg == NULL) { | ||
1539 | ret = -ENOMEM; | ||
1540 | printk(KERN_ERR "ioremap error.\n"); | ||
1541 | goto clean_up; | ||
1542 | } | ||
1543 | |||
1544 | /* initialize ucd */ | ||
1545 | m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); | ||
1546 | if (m66592 == NULL) { | ||
1547 | printk(KERN_ERR "kzalloc error\n"); | ||
1548 | goto clean_up; | ||
1549 | } | ||
1550 | |||
1551 | spin_lock_init(&m66592->lock); | ||
1552 | dev_set_drvdata(&pdev->dev, m66592); | ||
1553 | |||
1554 | m66592->gadget.ops = &m66592_gadget_ops; | ||
1555 | device_initialize(&m66592->gadget.dev); | ||
1556 | strcpy(m66592->gadget.dev.bus_id, "gadget"); | ||
1557 | m66592->gadget.is_dualspeed = 1; | ||
1558 | m66592->gadget.dev.parent = &pdev->dev; | ||
1559 | m66592->gadget.dev.dma_mask = pdev->dev.dma_mask; | ||
1560 | m66592->gadget.dev.release = pdev->dev.release; | ||
1561 | m66592->gadget.name = udc_name; | ||
1562 | |||
1563 | init_timer(&m66592->timer); | ||
1564 | m66592->timer.function = m66592_timer; | ||
1565 | m66592->timer.data = (unsigned long)m66592; | ||
1566 | m66592->reg = reg; | ||
1567 | |||
1568 | m66592->bi_bufnum = M66592_BASE_BUFNUM; | ||
1569 | |||
1570 | ret = request_irq(irq, m66592_irq, SA_INTERRUPT | SA_SHIRQ, | ||
1571 | udc_name, m66592); | ||
1572 | if (ret < 0) { | ||
1573 | printk(KERN_ERR "request_irq error (%d)\n", ret); | ||
1574 | goto clean_up; | ||
1575 | } | ||
1576 | |||
1577 | INIT_LIST_HEAD(&m66592->gadget.ep_list); | ||
1578 | m66592->gadget.ep0 = &m66592->ep[0].ep; | ||
1579 | INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list); | ||
1580 | for (i = 0; i < M66592_MAX_NUM_PIPE; i++) { | ||
1581 | struct m66592_ep *ep = &m66592->ep[i]; | ||
1582 | |||
1583 | if (i != 0) { | ||
1584 | INIT_LIST_HEAD(&m66592->ep[i].ep.ep_list); | ||
1585 | list_add_tail(&m66592->ep[i].ep.ep_list, | ||
1586 | &m66592->gadget.ep_list); | ||
1587 | } | ||
1588 | ep->m66592 = m66592; | ||
1589 | INIT_LIST_HEAD(&ep->queue); | ||
1590 | ep->ep.name = m66592_ep_name[i]; | ||
1591 | ep->ep.ops = &m66592_ep_ops; | ||
1592 | ep->ep.maxpacket = 512; | ||
1593 | } | ||
1594 | m66592->ep[0].ep.maxpacket = 64; | ||
1595 | m66592->ep[0].pipenum = 0; | ||
1596 | m66592->ep[0].fifoaddr = M66592_CFIFO; | ||
1597 | m66592->ep[0].fifosel = M66592_CFIFOSEL; | ||
1598 | m66592->ep[0].fifoctr = M66592_CFIFOCTR; | ||
1599 | m66592->ep[0].fifotrn = 0; | ||
1600 | m66592->ep[0].pipectr = get_pipectr_addr(0); | ||
1601 | m66592->pipenum2ep[0] = &m66592->ep[0]; | ||
1602 | m66592->epaddr2ep[0] = &m66592->ep[0]; | ||
1603 | |||
1604 | the_controller = m66592; | ||
1605 | |||
1606 | m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL); | ||
1607 | if (m66592->ep0_req == NULL) | ||
1608 | goto clean_up; | ||
1609 | m66592->ep0_buf = m66592_alloc_buffer(&m66592->ep[0].ep, 2, NULL, | ||
1610 | GFP_KERNEL); | ||
1611 | if (m66592->ep0_buf == NULL) | ||
1612 | goto clean_up; | ||
1613 | |||
1614 | init_controller(m66592); | ||
1615 | |||
1616 | printk("driver %s, %s\n", udc_name, DRIVER_VERSION); | ||
1617 | return 0; | ||
1618 | |||
1619 | clean_up: | ||
1620 | if (m66592) { | ||
1621 | if (m66592->ep0_req) | ||
1622 | m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); | ||
1623 | kfree(m66592); | ||
1624 | } | ||
1625 | if (reg) | ||
1626 | iounmap(reg); | ||
1627 | |||
1628 | return ret; | ||
1629 | } | ||
1630 | |||
1631 | /*-------------------------------------------------------------------------*/ | ||
1632 | static struct platform_driver m66592_driver = { | ||
1633 | .probe = m66592_probe, | ||
1634 | .remove = m66592_remove, | ||
1635 | .suspend = m66592_suspend, | ||
1636 | .resume = m66592_resume, | ||
1637 | .driver = { | ||
1638 | .name = (char *) udc_name, | ||
1639 | }, | ||
1640 | }; | ||
1641 | |||
1642 | static int __init m66592_udc_init(void) | ||
1643 | { | ||
1644 | return platform_driver_register(&m66592_driver); | ||
1645 | } | ||
1646 | module_init(m66592_udc_init); | ||
1647 | |||
1648 | static void __exit m66592_udc_cleanup(void) | ||
1649 | { | ||
1650 | platform_driver_unregister(&m66592_driver); | ||
1651 | } | ||
1652 | module_exit(m66592_udc_cleanup); | ||
1653 | |||