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authorCyril Roelandt <tipecaml@gmail.com>2012-02-24 20:14:57 -0500
committerFelipe Balbi <balbi@ti.com>2012-02-27 09:32:50 -0500
commit170b778ffbfca8619b6971e8a5e8b864712b72e2 (patch)
tree88c1533c84f40c2f38c6350123a4f7fc5e150ff7 /drivers/usb/gadget/amd5536udc.c
parentc5cc5ed86667d4ae74fe40ee4ed893f4b46aba05 (diff)
usb: amd5536udc: Fix brace coding style issues.
Remove a bunch of unneeded braces. Signed-off-by: Cyril Roelandt <tipecaml@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/gadget/amd5536udc.c')
-rw-r--r--drivers/usb/gadget/amd5536udc.c93
1 files changed, 36 insertions, 57 deletions
diff --git a/drivers/usb/gadget/amd5536udc.c b/drivers/usb/gadget/amd5536udc.c
index 18883bd0f162..7df2f7082908 100644
--- a/drivers/usb/gadget/amd5536udc.c
+++ b/drivers/usb/gadget/amd5536udc.c
@@ -204,9 +204,8 @@ static void print_regs(struct udc *dev)
204 DBG(dev, "DMA mode = BF (buffer fill mode)\n"); 204 DBG(dev, "DMA mode = BF (buffer fill mode)\n");
205 dev_info(&dev->pdev->dev, "DMA mode (%s)\n", "BF"); 205 dev_info(&dev->pdev->dev, "DMA mode (%s)\n", "BF");
206 } 206 }
207 if (!use_dma) { 207 if (!use_dma)
208 dev_info(&dev->pdev->dev, "FIFO mode\n"); 208 dev_info(&dev->pdev->dev, "FIFO mode\n");
209 }
210 DBG(dev, "-------------------------------------------------------\n"); 209 DBG(dev, "-------------------------------------------------------\n");
211} 210}
212 211
@@ -570,9 +569,8 @@ udc_free_request(struct usb_ep *usbep, struct usb_request *usbreq)
570 VDBG(ep->dev, "req->td_data=%p\n", req->td_data); 569 VDBG(ep->dev, "req->td_data=%p\n", req->td_data);
571 570
572 /* free dma chain if created */ 571 /* free dma chain if created */
573 if (req->chain_len > 1) { 572 if (req->chain_len > 1)
574 udc_free_dma_chain(ep->dev, req); 573 udc_free_dma_chain(ep->dev, req);
575 }
576 574
577 pci_pool_free(ep->dev->data_requests, req->td_data, 575 pci_pool_free(ep->dev->data_requests, req->td_data,
578 req->td_phys); 576 req->td_phys);
@@ -640,9 +638,8 @@ udc_txfifo_write(struct udc_ep *ep, struct usb_request *req)
640 bytes = remaining; 638 bytes = remaining;
641 639
642 /* dwords first */ 640 /* dwords first */
643 for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { 641 for (i = 0; i < bytes / UDC_DWORD_BYTES; i++)
644 writel(*(buf + i), ep->txfifo); 642 writel(*(buf + i), ep->txfifo);
645 }
646 643
647 /* remaining bytes must be written by byte access */ 644 /* remaining bytes must be written by byte access */
648 for (j = 0; j < bytes % UDC_DWORD_BYTES; j++) { 645 for (j = 0; j < bytes % UDC_DWORD_BYTES; j++) {
@@ -661,9 +658,8 @@ static int udc_rxfifo_read_dwords(struct udc *dev, u32 *buf, int dwords)
661 658
662 VDBG(dev, "udc_read_dwords(): %d dwords\n", dwords); 659 VDBG(dev, "udc_read_dwords(): %d dwords\n", dwords);
663 660
664 for (i = 0; i < dwords; i++) { 661 for (i = 0; i < dwords; i++)
665 *(buf + i) = readl(dev->rxfifo); 662 *(buf + i) = readl(dev->rxfifo);
666 }
667 return 0; 663 return 0;
668} 664}
669 665
@@ -676,9 +672,8 @@ static int udc_rxfifo_read_bytes(struct udc *dev, u8 *buf, int bytes)
676 VDBG(dev, "udc_read_bytes(): %d bytes\n", bytes); 672 VDBG(dev, "udc_read_bytes(): %d bytes\n", bytes);
677 673
678 /* dwords first */ 674 /* dwords first */
679 for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { 675 for (i = 0; i < bytes / UDC_DWORD_BYTES; i++)
680 *((u32 *)(buf + (i<<2))) = readl(dev->rxfifo); 676 *((u32 *)(buf + (i<<2))) = readl(dev->rxfifo);
681 }
682 677
683 /* remaining bytes must be read by byte access */ 678 /* remaining bytes must be read by byte access */
684 if (bytes % UDC_DWORD_BYTES) { 679 if (bytes % UDC_DWORD_BYTES) {
@@ -898,9 +893,8 @@ static struct udc_data_dma *udc_get_last_dma_desc(struct udc_request *req)
898 struct udc_data_dma *td; 893 struct udc_data_dma *td;
899 894
900 td = req->td_data; 895 td = req->td_data;
901 while (td && !(td->status & AMD_BIT(UDC_DMA_IN_STS_L))) { 896 while (td && !(td->status & AMD_BIT(UDC_DMA_IN_STS_L)))
902 td = phys_to_virt(td->next); 897 td = phys_to_virt(td->next);
903 }
904 898
905 return td; 899 return td;
906 900
@@ -950,21 +944,18 @@ static int udc_create_dma_chain(
950 dma_addr = DMA_DONT_USE; 944 dma_addr = DMA_DONT_USE;
951 945
952 /* unset L bit in first desc for OUT */ 946 /* unset L bit in first desc for OUT */
953 if (!ep->in) { 947 if (!ep->in)
954 req->td_data->status &= AMD_CLEAR_BIT(UDC_DMA_IN_STS_L); 948 req->td_data->status &= AMD_CLEAR_BIT(UDC_DMA_IN_STS_L);
955 }
956 949
957 /* alloc only new desc's if not already available */ 950 /* alloc only new desc's if not already available */
958 len = req->req.length / ep->ep.maxpacket; 951 len = req->req.length / ep->ep.maxpacket;
959 if (req->req.length % ep->ep.maxpacket) { 952 if (req->req.length % ep->ep.maxpacket)
960 len++; 953 len++;
961 }
962 954
963 if (len > req->chain_len) { 955 if (len > req->chain_len) {
964 /* shorter chain already allocated before */ 956 /* shorter chain already allocated before */
965 if (req->chain_len > 1) { 957 if (req->chain_len > 1)
966 udc_free_dma_chain(ep->dev, req); 958 udc_free_dma_chain(ep->dev, req);
967 }
968 req->chain_len = len; 959 req->chain_len = len;
969 create_new_chain = 1; 960 create_new_chain = 1;
970 } 961 }
@@ -1007,11 +998,12 @@ static int udc_create_dma_chain(
1007 998
1008 /* link td and assign tx bytes */ 999 /* link td and assign tx bytes */
1009 if (i == buf_len) { 1000 if (i == buf_len) {
1010 if (create_new_chain) { 1001 if (create_new_chain)
1011 req->td_data->next = dma_addr; 1002 req->td_data->next = dma_addr;
1012 } else { 1003 /*
1013 /* req->td_data->next = virt_to_phys(td); */ 1004 else
1014 } 1005 req->td_data->next = virt_to_phys(td);
1006 */
1015 /* write tx bytes */ 1007 /* write tx bytes */
1016 if (ep->in) { 1008 if (ep->in) {
1017 /* first desc */ 1009 /* first desc */
@@ -1025,11 +1017,12 @@ static int udc_create_dma_chain(
1025 UDC_DMA_IN_STS_TXBYTES); 1017 UDC_DMA_IN_STS_TXBYTES);
1026 } 1018 }
1027 } else { 1019 } else {
1028 if (create_new_chain) { 1020 if (create_new_chain)
1029 last->next = dma_addr; 1021 last->next = dma_addr;
1030 } else { 1022 /*
1031 /* last->next = virt_to_phys(td); */ 1023 else
1032 } 1024 last->next = virt_to_phys(td);
1025 */
1033 if (ep->in) { 1026 if (ep->in) {
1034 /* write tx bytes */ 1027 /* write tx bytes */
1035 td->status = AMD_ADDBITS(td->status, 1028 td->status = AMD_ADDBITS(td->status,
@@ -1480,11 +1473,10 @@ static int startup_registers(struct udc *dev)
1480 1473
1481 /* program speed */ 1474 /* program speed */
1482 tmp = readl(&dev->regs->cfg); 1475 tmp = readl(&dev->regs->cfg);
1483 if (use_fullspeed) { 1476 if (use_fullspeed)
1484 tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_FS, UDC_DEVCFG_SPD); 1477 tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_FS, UDC_DEVCFG_SPD);
1485 } else { 1478 else
1486 tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_HS, UDC_DEVCFG_SPD); 1479 tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_HS, UDC_DEVCFG_SPD);
1487 }
1488 writel(tmp, &dev->regs->cfg); 1480 writel(tmp, &dev->regs->cfg);
1489 1481
1490 return 0; 1482 return 0;
@@ -1505,9 +1497,8 @@ static void udc_basic_init(struct udc *dev)
1505 mod_timer(&udc_timer, jiffies - 1); 1497 mod_timer(&udc_timer, jiffies - 1);
1506 } 1498 }
1507 /* stop poll stall timer */ 1499 /* stop poll stall timer */
1508 if (timer_pending(&udc_pollstall_timer)) { 1500 if (timer_pending(&udc_pollstall_timer))
1509 mod_timer(&udc_pollstall_timer, jiffies - 1); 1501 mod_timer(&udc_pollstall_timer, jiffies - 1);
1510 }
1511 /* disable DMA */ 1502 /* disable DMA */
1512 tmp = readl(&dev->regs->ctl); 1503 tmp = readl(&dev->regs->ctl);
1513 tmp &= AMD_UNMASK_BIT(UDC_DEVCTL_RDE); 1504 tmp &= AMD_UNMASK_BIT(UDC_DEVCTL_RDE);
@@ -1541,11 +1532,10 @@ static void udc_setup_endpoints(struct udc *dev)
1541 /* read enum speed */ 1532 /* read enum speed */
1542 tmp = readl(&dev->regs->sts); 1533 tmp = readl(&dev->regs->sts);
1543 tmp = AMD_GETBITS(tmp, UDC_DEVSTS_ENUM_SPEED); 1534 tmp = AMD_GETBITS(tmp, UDC_DEVSTS_ENUM_SPEED);
1544 if (tmp == UDC_DEVSTS_ENUM_SPEED_HIGH) { 1535 if (tmp == UDC_DEVSTS_ENUM_SPEED_HIGH)
1545 dev->gadget.speed = USB_SPEED_HIGH; 1536 dev->gadget.speed = USB_SPEED_HIGH;
1546 } else if (tmp == UDC_DEVSTS_ENUM_SPEED_FULL) { 1537 else if (tmp == UDC_DEVSTS_ENUM_SPEED_FULL)
1547 dev->gadget.speed = USB_SPEED_FULL; 1538 dev->gadget.speed = USB_SPEED_FULL;
1548 }
1549 1539
1550 /* set basic ep parameters */ 1540 /* set basic ep parameters */
1551 for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { 1541 for (tmp = 0; tmp < UDC_EP_NUM; tmp++) {
@@ -1571,9 +1561,8 @@ static void udc_setup_endpoints(struct udc *dev)
1571 * disabling ep interrupts when ENUM interrupt occurs but ep is 1561 * disabling ep interrupts when ENUM interrupt occurs but ep is
1572 * not enabled by gadget driver 1562 * not enabled by gadget driver
1573 */ 1563 */
1574 if (!ep->desc) { 1564 if (!ep->desc)
1575 ep_init(dev->regs, ep); 1565 ep_init(dev->regs, ep);
1576 }
1577 1566
1578 if (use_dma) { 1567 if (use_dma) {
1579 /* 1568 /*
@@ -1671,9 +1660,8 @@ static void udc_tasklet_disconnect(unsigned long par)
1671 spin_lock(&dev->lock); 1660 spin_lock(&dev->lock);
1672 1661
1673 /* empty queues */ 1662 /* empty queues */
1674 for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { 1663 for (tmp = 0; tmp < UDC_EP_NUM; tmp++)
1675 empty_req_queue(&dev->ep[tmp]); 1664 empty_req_queue(&dev->ep[tmp]);
1676 }
1677 1665
1678 } 1666 }
1679 1667
@@ -1747,9 +1735,8 @@ static void udc_timer_function(unsigned long v)
1747 * open the fifo 1735 * open the fifo
1748 */ 1736 */
1749 udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV; 1737 udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV;
1750 if (!stop_timer) { 1738 if (!stop_timer)
1751 add_timer(&udc_timer); 1739 add_timer(&udc_timer);
1752 }
1753 } else { 1740 } else {
1754 /* 1741 /*
1755 * fifo contains data now, setup timer for opening 1742 * fifo contains data now, setup timer for opening
@@ -1761,9 +1748,8 @@ static void udc_timer_function(unsigned long v)
1761 set_rde++; 1748 set_rde++;
1762 /* debug: lhadmot_timer_start = 221070 */ 1749 /* debug: lhadmot_timer_start = 221070 */
1763 udc_timer.expires = jiffies + HZ*UDC_RDE_TIMER_SECONDS; 1750 udc_timer.expires = jiffies + HZ*UDC_RDE_TIMER_SECONDS;
1764 if (!stop_timer) { 1751 if (!stop_timer)
1765 add_timer(&udc_timer); 1752 add_timer(&udc_timer);
1766 }
1767 } 1753 }
1768 1754
1769 } else 1755 } else
@@ -1908,19 +1894,17 @@ static void activate_control_endpoints(struct udc *dev)
1908 mod_timer(&udc_timer, jiffies - 1); 1894 mod_timer(&udc_timer, jiffies - 1);
1909 } 1895 }
1910 /* stop pollstall timer */ 1896 /* stop pollstall timer */
1911 if (timer_pending(&udc_pollstall_timer)) { 1897 if (timer_pending(&udc_pollstall_timer))
1912 mod_timer(&udc_pollstall_timer, jiffies - 1); 1898 mod_timer(&udc_pollstall_timer, jiffies - 1);
1913 }
1914 /* enable DMA */ 1899 /* enable DMA */
1915 tmp = readl(&dev->regs->ctl); 1900 tmp = readl(&dev->regs->ctl);
1916 tmp |= AMD_BIT(UDC_DEVCTL_MODE) 1901 tmp |= AMD_BIT(UDC_DEVCTL_MODE)
1917 | AMD_BIT(UDC_DEVCTL_RDE) 1902 | AMD_BIT(UDC_DEVCTL_RDE)
1918 | AMD_BIT(UDC_DEVCTL_TDE); 1903 | AMD_BIT(UDC_DEVCTL_TDE);
1919 if (use_dma_bufferfill_mode) { 1904 if (use_dma_bufferfill_mode)
1920 tmp |= AMD_BIT(UDC_DEVCTL_BF); 1905 tmp |= AMD_BIT(UDC_DEVCTL_BF);
1921 } else if (use_dma_ppb_du) { 1906 else if (use_dma_ppb_du)
1922 tmp |= AMD_BIT(UDC_DEVCTL_DU); 1907 tmp |= AMD_BIT(UDC_DEVCTL_DU);
1923 }
1924 writel(tmp, &dev->regs->ctl); 1908 writel(tmp, &dev->regs->ctl);
1925 } 1909 }
1926 1910
@@ -2105,9 +2089,8 @@ static void udc_ep0_set_rde(struct udc *dev)
2105 udc_timer.expires = 2089 udc_timer.expires =
2106 jiffies + HZ/UDC_RDE_TIMER_DIV; 2090 jiffies + HZ/UDC_RDE_TIMER_DIV;
2107 set_rde = 1; 2091 set_rde = 1;
2108 if (!stop_timer) { 2092 if (!stop_timer)
2109 add_timer(&udc_timer); 2093 add_timer(&udc_timer);
2110 }
2111 } 2094 }
2112 } 2095 }
2113 } 2096 }
@@ -2295,9 +2278,8 @@ static irqreturn_t udc_data_out_isr(struct udc *dev, int ep_ix)
2295 jiffies 2278 jiffies
2296 + HZ*UDC_RDE_TIMER_SECONDS; 2279 + HZ*UDC_RDE_TIMER_SECONDS;
2297 set_rde = 1; 2280 set_rde = 1;
2298 if (!stop_timer) { 2281 if (!stop_timer)
2299 add_timer(&udc_timer); 2282 add_timer(&udc_timer);
2300 }
2301 } 2283 }
2302 if (ep->num != UDC_EP0OUT_IX) 2284 if (ep->num != UDC_EP0OUT_IX)
2303 dev->data_ep_queued = 0; 2285 dev->data_ep_queued = 0;
@@ -2319,9 +2301,8 @@ static irqreturn_t udc_data_out_isr(struct udc *dev, int ep_ix)
2319 /* check pending CNAKS */ 2301 /* check pending CNAKS */
2320 if (cnak_pending) { 2302 if (cnak_pending) {
2321 /* CNAk processing when rxfifo empty only */ 2303 /* CNAk processing when rxfifo empty only */
2322 if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) { 2304 if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY))
2323 udc_process_cnak_queue(dev); 2305 udc_process_cnak_queue(dev);
2324 }
2325 } 2306 }
2326 2307
2327 /* clear OUT bits in ep status */ 2308 /* clear OUT bits in ep status */
@@ -2582,9 +2563,8 @@ __acquires(dev->lock)
2582 if (!timer_pending(&udc_timer)) { 2563 if (!timer_pending(&udc_timer)) {
2583 udc_timer.expires = jiffies + 2564 udc_timer.expires = jiffies +
2584 HZ/UDC_RDE_TIMER_DIV; 2565 HZ/UDC_RDE_TIMER_DIV;
2585 if (!stop_timer) { 2566 if (!stop_timer)
2586 add_timer(&udc_timer); 2567 add_timer(&udc_timer);
2587 }
2588 } 2568 }
2589 } 2569 }
2590 2570
@@ -2698,9 +2678,8 @@ __acquires(dev->lock)
2698 /* check pending CNAKS */ 2678 /* check pending CNAKS */
2699 if (cnak_pending) { 2679 if (cnak_pending) {
2700 /* CNAk processing when rxfifo empty only */ 2680 /* CNAk processing when rxfifo empty only */
2701 if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) { 2681 if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY))
2702 udc_process_cnak_queue(dev); 2682 udc_process_cnak_queue(dev);
2703 }
2704 } 2683 }
2705 2684
2706finished: 2685finished: