aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/usb/dwc3
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 15:09:47 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 15:09:47 -0500
commit55b81e6f2795484ea8edf5805c95c007cacfa736 (patch)
treec3724975107857fcc03b5dd649c462e4f72397be /drivers/usb/dwc3
parent5983faf942f260023e547f3c5f38c1033c35cc9b (diff)
parent08e87d0d773dc9ca5faf4c3306e238ed0ea129b0 (diff)
Merge branch 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
* 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (232 commits) USB: Add USB-ID for Multiplex RC serial adapter to cp210x.c xhci: Clean up 32-bit build warnings. USB: update documentation for usbmon usb: usb-storage doesn't support dynamic id currently, the patch disables the feature to fix an oops drivers/usb/class/cdc-acm.c: clear dangling pointer drivers/usb/dwc3/dwc3-pci.c: introduce missing kfree drivers/usb/host/isp1760-if.c: introduce missing kfree usb: option: add ZD Incorporated HSPA modem usb: ch9: fix up MaxStreams helper USB: usb-skeleton.c: cleanup open_count USB: usb-skeleton.c: fix open/disconnect race xhci: Properly handle COMP_2ND_BW_ERR USB: remove dead code from suspend/resume path USB: add quirk for another camera drivers: usb: wusbcore: Fix dependency for USB_WUSB xhci: Better debugging for critical host errors. xhci: Be less verbose during URB cancellation. xhci: Remove debugging about ring structure allocation. xhci: Remove debugging about toggling cycle bits. xhci: Remove debugging for individual transfers. ...
Diffstat (limited to 'drivers/usb/dwc3')
-rw-r--r--drivers/usb/dwc3/Kconfig5
-rw-r--r--drivers/usb/dwc3/Makefile6
-rw-r--r--drivers/usb/dwc3/core.c209
-rw-r--r--drivers/usb/dwc3/core.h62
-rw-r--r--drivers/usb/dwc3/debugfs.c83
-rw-r--r--drivers/usb/dwc3/dwc3-omap.c43
-rw-r--r--drivers/usb/dwc3/dwc3-pci.c51
-rw-r--r--drivers/usb/dwc3/ep0.c160
-rw-r--r--drivers/usb/dwc3/gadget.c440
-rw-r--r--drivers/usb/dwc3/gadget.h29
-rw-r--r--drivers/usb/dwc3/host.c102
-rw-r--r--drivers/usb/dwc3/io.h2
12 files changed, 871 insertions, 321 deletions
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 3c1d67d324fd..d8f741f9e56e 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -1,7 +1,10 @@
1config USB_DWC3 1config USB_DWC3
2 tristate "DesignWare USB3 DRD Core Support" 2 tristate "DesignWare USB3 DRD Core Support"
3 depends on (USB || USB_GADGET) 3 depends on (USB && USB_GADGET)
4 select USB_OTG_UTILS 4 select USB_OTG_UTILS
5 select USB_GADGET_DUALSPEED
6 select USB_GADGET_SUPERSPEED
7 select USB_XHCI_PLATFORM
5 help 8 help
6 Say Y or M here if your system has a Dual Role SuperSpeed 9 Say Y or M here if your system has a Dual Role SuperSpeed
7 USB controller based on the DesignWare USB3 IP Core. 10 USB controller based on the DesignWare USB3 IP Core.
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 593d1dbc465b..900ae74357f1 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -4,10 +4,8 @@ ccflags-$(CONFIG_USB_DWC3_VERBOSE) += -DVERBOSE_DEBUG
4obj-$(CONFIG_USB_DWC3) += dwc3.o 4obj-$(CONFIG_USB_DWC3) += dwc3.o
5 5
6dwc3-y := core.o 6dwc3-y := core.o
7 7dwc3-y += host.o
8ifneq ($(CONFIG_USB_GADGET_DWC3),) 8dwc3-y += gadget.o ep0.o
9 dwc3-y += gadget.o ep0.o
10endif
11 9
12ifneq ($(CONFIG_DEBUG_FS),) 10ifneq ($(CONFIG_DEBUG_FS),)
13 dwc3-y += debugfs.o 11 dwc3-y += debugfs.o
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 600d82348511..7c9df630dbe4 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -59,6 +59,60 @@
59 59
60#include "debug.h" 60#include "debug.h"
61 61
62static char *maximum_speed = "super";
63module_param(maximum_speed, charp, 0);
64MODULE_PARM_DESC(maximum_speed, "Maximum supported speed.");
65
66/* -------------------------------------------------------------------------- */
67
68#define DWC3_DEVS_POSSIBLE 32
69
70static DECLARE_BITMAP(dwc3_devs, DWC3_DEVS_POSSIBLE);
71
72int dwc3_get_device_id(void)
73{
74 int id;
75
76again:
77 id = find_first_zero_bit(dwc3_devs, DWC3_DEVS_POSSIBLE);
78 if (id < DWC3_DEVS_POSSIBLE) {
79 int old;
80
81 old = test_and_set_bit(id, dwc3_devs);
82 if (old)
83 goto again;
84 } else {
85 pr_err("dwc3: no space for new device\n");
86 id = -ENOMEM;
87 }
88
89 return 0;
90}
91EXPORT_SYMBOL_GPL(dwc3_get_device_id);
92
93void dwc3_put_device_id(int id)
94{
95 int ret;
96
97 if (id < 0)
98 return;
99
100 ret = test_bit(id, dwc3_devs);
101 WARN(!ret, "dwc3: ID %d not in use\n", id);
102 clear_bit(id, dwc3_devs);
103}
104EXPORT_SYMBOL_GPL(dwc3_put_device_id);
105
106void dwc3_set_mode(struct dwc3 *dwc, u32 mode)
107{
108 u32 reg;
109
110 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
111 reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG));
112 reg |= DWC3_GCTL_PRTCAPDIR(mode);
113 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
114}
115
62/** 116/**
63 * dwc3_core_soft_reset - Issues core soft reset and PHY reset 117 * dwc3_core_soft_reset - Issues core soft reset and PHY reset
64 * @dwc: pointer to our context structure 118 * @dwc: pointer to our context structure
@@ -150,7 +204,7 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc)
150 struct dwc3_event_buffer *evt; 204 struct dwc3_event_buffer *evt;
151 int i; 205 int i;
152 206
153 for (i = 0; i < DWC3_EVENT_BUFFERS_NUM; i++) { 207 for (i = 0; i < dwc->num_event_buffers; i++) {
154 evt = dwc->ev_buffs[i]; 208 evt = dwc->ev_buffs[i];
155 if (evt) { 209 if (evt) {
156 dwc3_free_one_event_buffer(dwc, evt); 210 dwc3_free_one_event_buffer(dwc, evt);
@@ -162,17 +216,25 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc)
162/** 216/**
163 * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length 217 * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
164 * @dwc: Pointer to out controller context structure 218 * @dwc: Pointer to out controller context structure
165 * @num: number of event buffers to allocate
166 * @length: size of event buffer 219 * @length: size of event buffer
167 * 220 *
168 * Returns 0 on success otherwise negative errno. In error the case, dwc 221 * Returns 0 on success otherwise negative errno. In error the case, dwc
169 * may contain some buffers allocated but not all which were requested. 222 * may contain some buffers allocated but not all which were requested.
170 */ 223 */
171static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned num, 224static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)
172 unsigned length)
173{ 225{
226 int num;
174 int i; 227 int i;
175 228
229 num = DWC3_NUM_INT(dwc->hwparams.hwparams1);
230 dwc->num_event_buffers = num;
231
232 dwc->ev_buffs = kzalloc(sizeof(*dwc->ev_buffs) * num, GFP_KERNEL);
233 if (!dwc->ev_buffs) {
234 dev_err(dwc->dev, "can't allocate event buffers array\n");
235 return -ENOMEM;
236 }
237
176 for (i = 0; i < num; i++) { 238 for (i = 0; i < num; i++) {
177 struct dwc3_event_buffer *evt; 239 struct dwc3_event_buffer *evt;
178 240
@@ -198,7 +260,7 @@ static int __devinit dwc3_event_buffers_setup(struct dwc3 *dwc)
198 struct dwc3_event_buffer *evt; 260 struct dwc3_event_buffer *evt;
199 int n; 261 int n;
200 262
201 for (n = 0; n < DWC3_EVENT_BUFFERS_NUM; n++) { 263 for (n = 0; n < dwc->num_event_buffers; n++) {
202 evt = dwc->ev_buffs[n]; 264 evt = dwc->ev_buffs[n];
203 dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n", 265 dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n",
204 evt->buf, (unsigned long long) evt->dma, 266 evt->buf, (unsigned long long) evt->dma,
@@ -221,7 +283,7 @@ static void dwc3_event_buffers_cleanup(struct dwc3 *dwc)
221 struct dwc3_event_buffer *evt; 283 struct dwc3_event_buffer *evt;
222 int n; 284 int n;
223 285
224 for (n = 0; n < DWC3_EVENT_BUFFERS_NUM; n++) { 286 for (n = 0; n < dwc->num_event_buffers; n++) {
225 evt = dwc->ev_buffs[n]; 287 evt = dwc->ev_buffs[n];
226 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0); 288 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0);
227 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0); 289 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0);
@@ -285,8 +347,32 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
285 cpu_relax(); 347 cpu_relax();
286 } while (true); 348 } while (true);
287 349
288 ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_NUM, 350 dwc3_cache_hwparams(dwc);
289 DWC3_EVENT_BUFFERS_SIZE); 351
352 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
353 reg &= ~DWC3_GCTL_SCALEDOWN(3);
354 reg &= ~DWC3_GCTL_DISSCRAMBLE;
355
356 switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) {
357 case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
358 reg &= ~DWC3_GCTL_DSBLCLKGTNG;
359 break;
360 default:
361 dev_dbg(dwc->dev, "No power optimization available\n");
362 }
363
364 /*
365 * WORKAROUND: DWC3 revisions <1.90a have a bug
366 * when The device fails to connect at SuperSpeed
367 * and falls back to high-speed mode which causes
368 * the device to enter in a Connect/Disconnect loop
369 */
370 if (dwc->revision < DWC3_REVISION_190A)
371 reg |= DWC3_GCTL_U2RSTECN;
372
373 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
374
375 ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
290 if (ret) { 376 if (ret) {
291 dev_err(dwc->dev, "failed to allocate event buffers\n"); 377 dev_err(dwc->dev, "failed to allocate event buffers\n");
292 ret = -ENOMEM; 378 ret = -ENOMEM;
@@ -299,8 +385,6 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
299 goto err1; 385 goto err1;
300 } 386 }
301 387
302 dwc3_cache_hwparams(dwc);
303
304 return 0; 388 return 0;
305 389
306err1: 390err1:
@@ -320,15 +404,17 @@ static void dwc3_core_exit(struct dwc3 *dwc)
320 404
321static int __devinit dwc3_probe(struct platform_device *pdev) 405static int __devinit dwc3_probe(struct platform_device *pdev)
322{ 406{
323 const struct platform_device_id *id = platform_get_device_id(pdev);
324 struct resource *res; 407 struct resource *res;
325 struct dwc3 *dwc; 408 struct dwc3 *dwc;
326 void __iomem *regs; 409
327 unsigned int features = id->driver_data;
328 int ret = -ENOMEM; 410 int ret = -ENOMEM;
329 int irq; 411 int irq;
412
413 void __iomem *regs;
330 void *mem; 414 void *mem;
331 415
416 u8 mode;
417
332 mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); 418 mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
333 if (!mem) { 419 if (!mem) {
334 dev_err(&pdev->dev, "not enough memory\n"); 420 dev_err(&pdev->dev, "not enough memory\n");
@@ -343,6 +429,8 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
343 goto err1; 429 goto err1;
344 } 430 }
345 431
432 dwc->res = res;
433
346 res = request_mem_region(res->start, resource_size(res), 434 res = request_mem_region(res->start, resource_size(res),
347 dev_name(&pdev->dev)); 435 dev_name(&pdev->dev));
348 if (!res) { 436 if (!res) {
@@ -370,6 +458,17 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
370 dwc->dev = &pdev->dev; 458 dwc->dev = &pdev->dev;
371 dwc->irq = irq; 459 dwc->irq = irq;
372 460
461 if (!strncmp("super", maximum_speed, 5))
462 dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
463 else if (!strncmp("high", maximum_speed, 4))
464 dwc->maximum_speed = DWC3_DCFG_HIGHSPEED;
465 else if (!strncmp("full", maximum_speed, 4))
466 dwc->maximum_speed = DWC3_DCFG_FULLSPEED1;
467 else if (!strncmp("low", maximum_speed, 3))
468 dwc->maximum_speed = DWC3_DCFG_LOWSPEED;
469 else
470 dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
471
373 pm_runtime_enable(&pdev->dev); 472 pm_runtime_enable(&pdev->dev);
374 pm_runtime_get_sync(&pdev->dev); 473 pm_runtime_get_sync(&pdev->dev);
375 pm_runtime_forbid(&pdev->dev); 474 pm_runtime_forbid(&pdev->dev);
@@ -380,13 +479,44 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
380 goto err3; 479 goto err3;
381 } 480 }
382 481
383 if (features & DWC3_HAS_PERIPHERAL) { 482 mode = DWC3_MODE(dwc->hwparams.hwparams0);
483
484 switch (mode) {
485 case DWC3_MODE_DEVICE:
486 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
384 ret = dwc3_gadget_init(dwc); 487 ret = dwc3_gadget_init(dwc);
385 if (ret) { 488 if (ret) {
386 dev_err(&pdev->dev, "failed to initialized gadget\n"); 489 dev_err(&pdev->dev, "failed to initialize gadget\n");
387 goto err4; 490 goto err4;
388 } 491 }
492 break;
493 case DWC3_MODE_HOST:
494 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
495 ret = dwc3_host_init(dwc);
496 if (ret) {
497 dev_err(&pdev->dev, "failed to initialize host\n");
498 goto err4;
499 }
500 break;
501 case DWC3_MODE_DRD:
502 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
503 ret = dwc3_host_init(dwc);
504 if (ret) {
505 dev_err(&pdev->dev, "failed to initialize host\n");
506 goto err4;
507 }
508
509 ret = dwc3_gadget_init(dwc);
510 if (ret) {
511 dev_err(&pdev->dev, "failed to initialize gadget\n");
512 goto err4;
513 }
514 break;
515 default:
516 dev_err(&pdev->dev, "Unsupported mode of operation %d\n", mode);
517 goto err4;
389 } 518 }
519 dwc->mode = mode;
390 520
391 ret = dwc3_debugfs_init(dwc); 521 ret = dwc3_debugfs_init(dwc);
392 if (ret) { 522 if (ret) {
@@ -399,8 +529,21 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
399 return 0; 529 return 0;
400 530
401err5: 531err5:
402 if (features & DWC3_HAS_PERIPHERAL) 532 switch (mode) {
533 case DWC3_MODE_DEVICE:
534 dwc3_gadget_exit(dwc);
535 break;
536 case DWC3_MODE_HOST:
537 dwc3_host_exit(dwc);
538 break;
539 case DWC3_MODE_DRD:
540 dwc3_host_exit(dwc);
403 dwc3_gadget_exit(dwc); 541 dwc3_gadget_exit(dwc);
542 break;
543 default:
544 /* do nothing */
545 break;
546 }
404 547
405err4: 548err4:
406 dwc3_core_exit(dwc); 549 dwc3_core_exit(dwc);
@@ -420,10 +563,8 @@ err0:
420 563
421static int __devexit dwc3_remove(struct platform_device *pdev) 564static int __devexit dwc3_remove(struct platform_device *pdev)
422{ 565{
423 const struct platform_device_id *id = platform_get_device_id(pdev);
424 struct dwc3 *dwc = platform_get_drvdata(pdev); 566 struct dwc3 *dwc = platform_get_drvdata(pdev);
425 struct resource *res; 567 struct resource *res;
426 unsigned int features = id->driver_data;
427 568
428 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 569 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
429 570
@@ -432,8 +573,21 @@ static int __devexit dwc3_remove(struct platform_device *pdev)
432 573
433 dwc3_debugfs_exit(dwc); 574 dwc3_debugfs_exit(dwc);
434 575
435 if (features & DWC3_HAS_PERIPHERAL) 576 switch (dwc->mode) {
577 case DWC3_MODE_DEVICE:
578 dwc3_gadget_exit(dwc);
579 break;
580 case DWC3_MODE_HOST:
581 dwc3_host_exit(dwc);
582 break;
583 case DWC3_MODE_DRD:
584 dwc3_host_exit(dwc);
436 dwc3_gadget_exit(dwc); 585 dwc3_gadget_exit(dwc);
586 break;
587 default:
588 /* do nothing */
589 break;
590 }
437 591
438 dwc3_core_exit(dwc); 592 dwc3_core_exit(dwc);
439 release_mem_region(res->start, resource_size(res)); 593 release_mem_region(res->start, resource_size(res));
@@ -443,30 +597,15 @@ static int __devexit dwc3_remove(struct platform_device *pdev)
443 return 0; 597 return 0;
444} 598}
445 599
446static const struct platform_device_id dwc3_id_table[] __devinitconst = {
447 {
448 .name = "dwc3-omap",
449 .driver_data = (DWC3_HAS_PERIPHERAL
450 | DWC3_HAS_XHCI
451 | DWC3_HAS_OTG),
452 },
453 {
454 .name = "dwc3-pci",
455 .driver_data = DWC3_HAS_PERIPHERAL,
456 },
457 { }, /* Terminating Entry */
458};
459MODULE_DEVICE_TABLE(platform, dwc3_id_table);
460
461static struct platform_driver dwc3_driver = { 600static struct platform_driver dwc3_driver = {
462 .probe = dwc3_probe, 601 .probe = dwc3_probe,
463 .remove = __devexit_p(dwc3_remove), 602 .remove = __devexit_p(dwc3_remove),
464 .driver = { 603 .driver = {
465 .name = "dwc3", 604 .name = "dwc3",
466 }, 605 },
467 .id_table = dwc3_id_table,
468}; 606};
469 607
608MODULE_ALIAS("platform:dwc3");
470MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 609MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
471MODULE_LICENSE("Dual BSD/GPL"); 610MODULE_LICENSE("Dual BSD/GPL");
472MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver"); 611MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 29a8e1679e12..9e57f8e9bf17 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -41,6 +41,7 @@
41 41
42#include <linux/device.h> 42#include <linux/device.h>
43#include <linux/spinlock.h> 43#include <linux/spinlock.h>
44#include <linux/ioport.h>
44#include <linux/list.h> 45#include <linux/list.h>
45#include <linux/dma-mapping.h> 46#include <linux/dma-mapping.h>
46#include <linux/mm.h> 47#include <linux/mm.h>
@@ -52,7 +53,6 @@
52/* Global constants */ 53/* Global constants */
53#define DWC3_ENDPOINTS_NUM 32 54#define DWC3_ENDPOINTS_NUM 32
54 55
55#define DWC3_EVENT_BUFFERS_NUM 2
56#define DWC3_EVENT_BUFFERS_SIZE PAGE_SIZE 56#define DWC3_EVENT_BUFFERS_SIZE PAGE_SIZE
57#define DWC3_EVENT_TYPE_MASK 0xfe 57#define DWC3_EVENT_TYPE_MASK 0xfe
58 58
@@ -153,6 +153,7 @@
153#define DWC3_GCTL_CLK_PIPEHALF (2) 153#define DWC3_GCTL_CLK_PIPEHALF (2)
154#define DWC3_GCTL_CLK_MASK (3) 154#define DWC3_GCTL_CLK_MASK (3)
155 155
156#define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12)
156#define DWC3_GCTL_PRTCAPDIR(n) (n << 12) 157#define DWC3_GCTL_PRTCAPDIR(n) (n << 12)
157#define DWC3_GCTL_PRTCAP_HOST 1 158#define DWC3_GCTL_PRTCAP_HOST 1
158#define DWC3_GCTL_PRTCAP_DEVICE 2 159#define DWC3_GCTL_PRTCAP_DEVICE 2
@@ -347,6 +348,7 @@ struct dwc3_ep {
347 u32 free_slot; 348 u32 free_slot;
348 u32 busy_slot; 349 u32 busy_slot;
349 const struct usb_endpoint_descriptor *desc; 350 const struct usb_endpoint_descriptor *desc;
351 const struct usb_ss_ep_comp_descriptor *comp_desc;
350 struct dwc3 *dwc; 352 struct dwc3 *dwc;
351 353
352 unsigned flags; 354 unsigned flags;
@@ -536,6 +538,31 @@ struct dwc3_hwparams {
536 u32 hwparams8; 538 u32 hwparams8;
537}; 539};
538 540
541/* HWPARAMS0 */
542#define DWC3_MODE(n) ((n) & 0x7)
543
544#define DWC3_MODE_DEVICE 0
545#define DWC3_MODE_HOST 1
546#define DWC3_MODE_DRD 2
547#define DWC3_MODE_HUB 3
548
549/* HWPARAMS1 */
550#define DWC3_NUM_INT(n) (((n) & (0x3f << 15)) >> 15)
551
552struct dwc3_request {
553 struct usb_request request;
554 struct list_head list;
555 struct dwc3_ep *dep;
556
557 u8 epnum;
558 struct dwc3_trb_hw *trb;
559 dma_addr_t trb_dma;
560
561 unsigned direction:1;
562 unsigned mapped:1;
563 unsigned queued:1;
564};
565
539/** 566/**
540 * struct dwc3 - representation of our controller 567 * struct dwc3 - representation of our controller
541 * @ctrl_req: usb control request which is used for ep0 568 * @ctrl_req: usb control request which is used for ep0
@@ -549,19 +576,24 @@ struct dwc3_hwparams {
549 * @ep0_bounce_addr: dma address of ep0_bounce 576 * @ep0_bounce_addr: dma address of ep0_bounce
550 * @lock: for synchronizing 577 * @lock: for synchronizing
551 * @dev: pointer to our struct device 578 * @dev: pointer to our struct device
579 * @xhci: pointer to our xHCI child
552 * @event_buffer_list: a list of event buffers 580 * @event_buffer_list: a list of event buffers
553 * @gadget: device side representation of the peripheral controller 581 * @gadget: device side representation of the peripheral controller
554 * @gadget_driver: pointer to the gadget driver 582 * @gadget_driver: pointer to the gadget driver
555 * @regs: base address for our registers 583 * @regs: base address for our registers
556 * @regs_size: address space size 584 * @regs_size: address space size
557 * @irq: IRQ number 585 * @irq: IRQ number
586 * @num_event_buffers: calculated number of event buffers
587 * @u1u2: only used on revisions <1.83a for workaround
588 * @maximum_speed: maximum speed requested (mainly for testing purposes)
558 * @revision: revision register contents 589 * @revision: revision register contents
590 * @mode: mode of operation
559 * @is_selfpowered: true when we are selfpowered 591 * @is_selfpowered: true when we are selfpowered
560 * @three_stage_setup: set if we perform a three phase setup 592 * @three_stage_setup: set if we perform a three phase setup
561 * @ep0_status_pending: ep0 status response without a req is pending
562 * @ep0_bounced: true when we used bounce buffer 593 * @ep0_bounced: true when we used bounce buffer
563 * @ep0_expect_in: true when we expect a DATA IN transfer 594 * @ep0_expect_in: true when we expect a DATA IN transfer
564 * @start_config_issued: true when StartConfig command has been issued 595 * @start_config_issued: true when StartConfig command has been issued
596 * @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround
565 * @ep0_next_event: hold the next expected event 597 * @ep0_next_event: hold the next expected event
566 * @ep0state: state of endpoint zero 598 * @ep0state: state of endpoint zero
567 * @link_state: link state 599 * @link_state: link state
@@ -579,12 +611,15 @@ struct dwc3 {
579 dma_addr_t ep0_trb_addr; 611 dma_addr_t ep0_trb_addr;
580 dma_addr_t setup_buf_addr; 612 dma_addr_t setup_buf_addr;
581 dma_addr_t ep0_bounce_addr; 613 dma_addr_t ep0_bounce_addr;
582 struct usb_request ep0_usb_req; 614 struct dwc3_request ep0_usb_req;
583 /* device lock */ 615 /* device lock */
584 spinlock_t lock; 616 spinlock_t lock;
585 struct device *dev; 617 struct device *dev;
586 618
587 struct dwc3_event_buffer *ev_buffs[DWC3_EVENT_BUFFERS_NUM]; 619 struct platform_device *xhci;
620 struct resource *res;
621
622 struct dwc3_event_buffer **ev_buffs;
588 struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM]; 623 struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM];
589 624
590 struct usb_gadget gadget; 625 struct usb_gadget gadget;
@@ -595,7 +630,11 @@ struct dwc3 {
595 630
596 int irq; 631 int irq;
597 632
633 u32 num_event_buffers;
634 u32 u1u2;
635 u32 maximum_speed;
598 u32 revision; 636 u32 revision;
637 u32 mode;
599 638
600#define DWC3_REVISION_173A 0x5533173a 639#define DWC3_REVISION_173A 0x5533173a
601#define DWC3_REVISION_175A 0x5533175a 640#define DWC3_REVISION_175A 0x5533175a
@@ -607,10 +646,11 @@ struct dwc3 {
607 646
608 unsigned is_selfpowered:1; 647 unsigned is_selfpowered:1;
609 unsigned three_stage_setup:1; 648 unsigned three_stage_setup:1;
610 unsigned ep0_status_pending:1;
611 unsigned ep0_bounced:1; 649 unsigned ep0_bounced:1;
612 unsigned ep0_expect_in:1; 650 unsigned ep0_expect_in:1;
613 unsigned start_config_issued:1; 651 unsigned start_config_issued:1;
652 unsigned setup_packet_pending:1;
653 unsigned delayed_status:1;
614 654
615 enum dwc3_ep0_next ep0_next_event; 655 enum dwc3_ep0_next ep0_next_event;
616 enum dwc3_ep0_state ep0state; 656 enum dwc3_ep0_state ep0state;
@@ -765,4 +805,16 @@ union dwc3_event {
765#define DWC3_HAS_XHCI BIT(1) 805#define DWC3_HAS_XHCI BIT(1)
766#define DWC3_HAS_OTG BIT(3) 806#define DWC3_HAS_OTG BIT(3)
767 807
808/* prototypes */
809void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
810
811int dwc3_host_init(struct dwc3 *dwc);
812void dwc3_host_exit(struct dwc3 *dwc);
813
814int dwc3_gadget_init(struct dwc3 *dwc);
815void dwc3_gadget_exit(struct dwc3 *dwc);
816
817extern int dwc3_get_device_id(void);
818extern void dwc3_put_device_id(int id);
819
768#endif /* __DRIVERS_USB_DWC3_CORE_H */ 820#endif /* __DRIVERS_USB_DWC3_CORE_H */
diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
index fcfa91517ea1..433c97c15fc5 100644
--- a/drivers/usb/dwc3/debugfs.c
+++ b/drivers/usb/dwc3/debugfs.c
@@ -44,12 +44,12 @@
44#include <linux/debugfs.h> 44#include <linux/debugfs.h>
45#include <linux/seq_file.h> 45#include <linux/seq_file.h>
46#include <linux/delay.h> 46#include <linux/delay.h>
47 47#include <linux/uaccess.h>
48#include <asm/uaccess.h>
49 48
50#include "core.h" 49#include "core.h"
51#include "gadget.h" 50#include "gadget.h"
52#include "io.h" 51#include "io.h"
52#include "debug.h"
53 53
54#define dump_register(nm) \ 54#define dump_register(nm) \
55{ \ 55{ \
@@ -395,6 +395,75 @@ static const struct file_operations dwc3_regdump_fops = {
395 .release = single_release, 395 .release = single_release,
396}; 396};
397 397
398static int dwc3_mode_show(struct seq_file *s, void *unused)
399{
400 struct dwc3 *dwc = s->private;
401 unsigned long flags;
402 u32 reg;
403
404 spin_lock_irqsave(&dwc->lock, flags);
405 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
406 spin_unlock_irqrestore(&dwc->lock, flags);
407
408 switch (DWC3_GCTL_PRTCAP(reg)) {
409 case DWC3_GCTL_PRTCAP_HOST:
410 seq_printf(s, "host\n");
411 break;
412 case DWC3_GCTL_PRTCAP_DEVICE:
413 seq_printf(s, "device\n");
414 break;
415 case DWC3_GCTL_PRTCAP_OTG:
416 seq_printf(s, "OTG\n");
417 break;
418 default:
419 seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg));
420 }
421
422 return 0;
423}
424
425static int dwc3_mode_open(struct inode *inode, struct file *file)
426{
427 return single_open(file, dwc3_mode_show, inode->i_private);
428}
429
430static ssize_t dwc3_mode_write(struct file *file,
431 const char __user *ubuf, size_t count, loff_t *ppos)
432{
433 struct seq_file *s = file->private_data;
434 struct dwc3 *dwc = s->private;
435 unsigned long flags;
436 u32 mode = 0;
437 char buf[32];
438
439 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
440 return -EFAULT;
441
442 if (!strncmp(buf, "host", 4))
443 mode |= DWC3_GCTL_PRTCAP_HOST;
444
445 if (!strncmp(buf, "device", 6))
446 mode |= DWC3_GCTL_PRTCAP_DEVICE;
447
448 if (!strncmp(buf, "otg", 3))
449 mode |= DWC3_GCTL_PRTCAP_OTG;
450
451 if (mode) {
452 spin_lock_irqsave(&dwc->lock, flags);
453 dwc3_set_mode(dwc, mode);
454 spin_unlock_irqrestore(&dwc->lock, flags);
455 }
456 return count;
457}
458
459static const struct file_operations dwc3_mode_fops = {
460 .open = dwc3_mode_open,
461 .write = dwc3_mode_write,
462 .read = seq_read,
463 .llseek = seq_lseek,
464 .release = single_release,
465};
466
398int __devinit dwc3_debugfs_init(struct dwc3 *dwc) 467int __devinit dwc3_debugfs_init(struct dwc3 *dwc)
399{ 468{
400 struct dentry *root; 469 struct dentry *root;
@@ -402,7 +471,7 @@ int __devinit dwc3_debugfs_init(struct dwc3 *dwc)
402 int ret; 471 int ret;
403 472
404 root = debugfs_create_dir(dev_name(dwc->dev), NULL); 473 root = debugfs_create_dir(dev_name(dwc->dev), NULL);
405 if (IS_ERR(root)){ 474 if (IS_ERR(root)) {
406 ret = PTR_ERR(root); 475 ret = PTR_ERR(root);
407 goto err0; 476 goto err0;
408 } 477 }
@@ -415,6 +484,14 @@ int __devinit dwc3_debugfs_init(struct dwc3 *dwc)
415 ret = PTR_ERR(file); 484 ret = PTR_ERR(file);
416 goto err1; 485 goto err1;
417 } 486 }
487
488 file = debugfs_create_file("mode", S_IRUGO | S_IWUSR, root,
489 dwc, &dwc3_mode_fops);
490 if (IS_ERR(file)) {
491 ret = PTR_ERR(file);
492 goto err1;
493 }
494
418 return 0; 495 return 0;
419 496
420err1: 497err1:
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 062552b5fc8a..3274ac8f1200 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -48,6 +48,7 @@
48#include <linux/io.h> 48#include <linux/io.h>
49#include <linux/module.h> 49#include <linux/module.h>
50 50
51#include "core.h"
51#include "io.h" 52#include "io.h"
52 53
53/* 54/*
@@ -200,6 +201,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
200 struct dwc3_omap *omap; 201 struct dwc3_omap *omap;
201 struct resource *res; 202 struct resource *res;
202 203
204 int devid;
203 int ret = -ENOMEM; 205 int ret = -ENOMEM;
204 int irq; 206 int irq;
205 207
@@ -236,16 +238,20 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
236 goto err1; 238 goto err1;
237 } 239 }
238 240
239 dwc3 = platform_device_alloc("dwc3-omap", -1); 241 devid = dwc3_get_device_id();
242 if (devid < 0)
243 goto err2;
244
245 dwc3 = platform_device_alloc("dwc3", devid);
240 if (!dwc3) { 246 if (!dwc3) {
241 dev_err(&pdev->dev, "couldn't allocate dwc3 device\n"); 247 dev_err(&pdev->dev, "couldn't allocate dwc3 device\n");
242 goto err2; 248 goto err3;
243 } 249 }
244 250
245 context = kzalloc(resource_size(res), GFP_KERNEL); 251 context = kzalloc(resource_size(res), GFP_KERNEL);
246 if (!context) { 252 if (!context) {
247 dev_err(&pdev->dev, "couldn't allocate dwc3 context memory\n"); 253 dev_err(&pdev->dev, "couldn't allocate dwc3 context memory\n");
248 goto err3; 254 goto err4;
249 } 255 }
250 256
251 spin_lock_init(&omap->lock); 257 spin_lock_init(&omap->lock);
@@ -299,7 +305,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
299 if (ret) { 305 if (ret) {
300 dev_err(&pdev->dev, "failed to request IRQ #%d --> %d\n", 306 dev_err(&pdev->dev, "failed to request IRQ #%d --> %d\n",
301 omap->irq, ret); 307 omap->irq, ret);
302 goto err4; 308 goto err5;
303 } 309 }
304 310
305 /* enable all IRQs */ 311 /* enable all IRQs */
@@ -322,26 +328,29 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
322 pdev->num_resources); 328 pdev->num_resources);
323 if (ret) { 329 if (ret) {
324 dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n"); 330 dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n");
325 goto err5; 331 goto err6;
326 } 332 }
327 333
328 ret = platform_device_add(dwc3); 334 ret = platform_device_add(dwc3);
329 if (ret) { 335 if (ret) {
330 dev_err(&pdev->dev, "failed to register dwc3 device\n"); 336 dev_err(&pdev->dev, "failed to register dwc3 device\n");
331 goto err5; 337 goto err6;
332 } 338 }
333 339
334 return 0; 340 return 0;
335 341
336err5: 342err6:
337 free_irq(omap->irq, omap); 343 free_irq(omap->irq, omap);
338 344
339err4: 345err5:
340 kfree(omap->context); 346 kfree(omap->context);
341 347
342err3: 348err4:
343 platform_device_put(dwc3); 349 platform_device_put(dwc3);
344 350
351err3:
352 dwc3_put_device_id(devid);
353
345err2: 354err2:
346 iounmap(base); 355 iounmap(base);
347 356
@@ -358,6 +367,7 @@ static int __devexit dwc3_omap_remove(struct platform_device *pdev)
358 367
359 platform_device_unregister(omap->dwc3); 368 platform_device_unregister(omap->dwc3);
360 369
370 dwc3_put_device_id(omap->dwc3->id);
361 free_irq(omap->irq, omap); 371 free_irq(omap->irq, omap);
362 iounmap(omap->base); 372 iounmap(omap->base);
363 373
@@ -384,18 +394,9 @@ static struct platform_driver dwc3_omap_driver = {
384 }, 394 },
385}; 395};
386 396
397module_platform_driver(dwc3_omap_driver);
398
399MODULE_ALIAS("platform:omap-dwc3");
387MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 400MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
388MODULE_LICENSE("Dual BSD/GPL"); 401MODULE_LICENSE("Dual BSD/GPL");
389MODULE_DESCRIPTION("DesignWare USB3 OMAP Glue Layer"); 402MODULE_DESCRIPTION("DesignWare USB3 OMAP Glue Layer");
390
391static int __devinit dwc3_omap_init(void)
392{
393 return platform_driver_register(&dwc3_omap_driver);
394}
395module_init(dwc3_omap_init);
396
397static void __exit dwc3_omap_exit(void)
398{
399 platform_driver_unregister(&dwc3_omap_driver);
400}
401module_exit(dwc3_omap_exit);
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index f77c00042685..64e1f7c67b08 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -42,52 +42,17 @@
42#include <linux/pci.h> 42#include <linux/pci.h>
43#include <linux/platform_device.h> 43#include <linux/platform_device.h>
44 44
45#include "core.h"
46
45/* FIXME define these in <linux/pci_ids.h> */ 47/* FIXME define these in <linux/pci_ids.h> */
46#define PCI_VENDOR_ID_SYNOPSYS 0x16c3 48#define PCI_VENDOR_ID_SYNOPSYS 0x16c3
47#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd 49#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
48 50
49#define DWC3_PCI_DEVS_POSSIBLE 32
50
51struct dwc3_pci { 51struct dwc3_pci {
52 struct device *dev; 52 struct device *dev;
53 struct platform_device *dwc3; 53 struct platform_device *dwc3;
54}; 54};
55 55
56static DECLARE_BITMAP(dwc3_pci_devs, DWC3_PCI_DEVS_POSSIBLE);
57
58static int dwc3_pci_get_device_id(struct dwc3_pci *glue)
59{
60 int id;
61
62again:
63 id = find_first_zero_bit(dwc3_pci_devs, DWC3_PCI_DEVS_POSSIBLE);
64 if (id < DWC3_PCI_DEVS_POSSIBLE) {
65 int old;
66
67 old = test_and_set_bit(id, dwc3_pci_devs);
68 if (old)
69 goto again;
70 } else {
71 dev_err(glue->dev, "no space for new device\n");
72 id = -ENOMEM;
73 }
74
75 return 0;
76}
77
78static void dwc3_pci_put_device_id(struct dwc3_pci *glue, int id)
79{
80 int ret;
81
82 if (id < 0)
83 return;
84
85 ret = test_bit(id, dwc3_pci_devs);
86 WARN(!ret, "Device: %s\nID %d not in use\n",
87 dev_driver_string(glue->dev), id);
88 clear_bit(id, dwc3_pci_devs);
89}
90
91static int __devinit dwc3_pci_probe(struct pci_dev *pci, 56static int __devinit dwc3_pci_probe(struct pci_dev *pci,
92 const struct pci_device_id *id) 57 const struct pci_device_id *id)
93{ 58{
@@ -114,11 +79,11 @@ static int __devinit dwc3_pci_probe(struct pci_dev *pci,
114 pci_set_power_state(pci, PCI_D0); 79 pci_set_power_state(pci, PCI_D0);
115 pci_set_master(pci); 80 pci_set_master(pci);
116 81
117 devid = dwc3_pci_get_device_id(glue); 82 devid = dwc3_get_device_id();
118 if (devid < 0) 83 if (devid < 0)
119 goto err2; 84 goto err2;
120 85
121 dwc3 = platform_device_alloc("dwc3-pci", devid); 86 dwc3 = platform_device_alloc("dwc3", devid);
122 if (!dwc3) { 87 if (!dwc3) {
123 dev_err(&pci->dev, "couldn't allocate dwc3 device\n"); 88 dev_err(&pci->dev, "couldn't allocate dwc3 device\n");
124 goto err3; 89 goto err3;
@@ -163,13 +128,13 @@ err4:
163 platform_device_put(dwc3); 128 platform_device_put(dwc3);
164 129
165err3: 130err3:
166 dwc3_pci_put_device_id(glue, devid); 131 dwc3_put_device_id(devid);
167 132
168err2: 133err2:
169 pci_disable_device(pci); 134 pci_disable_device(pci);
170 135
171err1: 136err1:
172 kfree(pci); 137 kfree(glue);
173 138
174err0: 139err0:
175 return ret; 140 return ret;
@@ -179,7 +144,7 @@ static void __devexit dwc3_pci_remove(struct pci_dev *pci)
179{ 144{
180 struct dwc3_pci *glue = pci_get_drvdata(pci); 145 struct dwc3_pci *glue = pci_get_drvdata(pci);
181 146
182 dwc3_pci_put_device_id(glue, glue->dwc3->id); 147 dwc3_put_device_id(glue->dwc3->id);
183 platform_device_unregister(glue->dwc3); 148 platform_device_unregister(glue->dwc3);
184 pci_set_drvdata(pci, NULL); 149 pci_set_drvdata(pci, NULL);
185 pci_disable_device(pci); 150 pci_disable_device(pci);
@@ -196,7 +161,7 @@ static DEFINE_PCI_DEVICE_TABLE(dwc3_pci_id_table) = {
196MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 161MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
197 162
198static struct pci_driver dwc3_pci_driver = { 163static struct pci_driver dwc3_pci_driver = {
199 .name = "pci-dwc3", 164 .name = "dwc3-pci",
200 .id_table = dwc3_pci_id_table, 165 .id_table = dwc3_pci_id_table,
201 .probe = dwc3_pci_probe, 166 .probe = dwc3_pci_probe,
202 .remove = __devexit_p(dwc3_pci_remove), 167 .remove = __devexit_p(dwc3_pci_remove),
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 69a4e43ddf59..2f51de57593a 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -48,13 +48,13 @@
48 48
49#include <linux/usb/ch9.h> 49#include <linux/usb/ch9.h>
50#include <linux/usb/gadget.h> 50#include <linux/usb/gadget.h>
51#include <linux/usb/composite.h>
51 52
52#include "core.h" 53#include "core.h"
53#include "gadget.h" 54#include "gadget.h"
54#include "io.h" 55#include "io.h"
55 56
56static void dwc3_ep0_inspect_setup(struct dwc3 *dwc, 57static void dwc3_ep0_do_control_status(struct dwc3 *dwc, u32 epnum);
57 const struct dwc3_event_depevt *event);
58 58
59static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state) 59static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state)
60{ 60{
@@ -125,6 +125,8 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
125static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, 125static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
126 struct dwc3_request *req) 126 struct dwc3_request *req)
127{ 127{
128 struct dwc3 *dwc = dep->dwc;
129 u32 type;
128 int ret = 0; 130 int ret = 0;
129 131
130 req->request.actual = 0; 132 req->request.actual = 0;
@@ -143,9 +145,7 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
143 * IRQ we were waiting for is long gone. 145 * IRQ we were waiting for is long gone.
144 */ 146 */
145 if (dep->flags & DWC3_EP_PENDING_REQUEST) { 147 if (dep->flags & DWC3_EP_PENDING_REQUEST) {
146 struct dwc3 *dwc = dep->dwc;
147 unsigned direction; 148 unsigned direction;
148 u32 type;
149 149
150 direction = !!(dep->flags & DWC3_EP0_DIR_IN); 150 direction = !!(dep->flags & DWC3_EP0_DIR_IN);
151 151
@@ -165,6 +165,13 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
165 req->request.dma, req->request.length, type); 165 req->request.dma, req->request.length, type);
166 dep->flags &= ~(DWC3_EP_PENDING_REQUEST | 166 dep->flags &= ~(DWC3_EP_PENDING_REQUEST |
167 DWC3_EP0_DIR_IN); 167 DWC3_EP0_DIR_IN);
168 } else if (dwc->delayed_status) {
169 dwc->delayed_status = false;
170
171 if (dwc->ep0state == EP0_STATUS_PHASE)
172 dwc3_ep0_do_control_status(dwc, 1);
173 else
174 dev_dbg(dwc->dev, "too early for delayed status\n");
168 } 175 }
169 176
170 return ret; 177 return ret;
@@ -190,9 +197,7 @@ int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
190 } 197 }
191 198
192 /* we share one TRB for ep0/1 */ 199 /* we share one TRB for ep0/1 */
193 if (!list_empty(&dwc->eps[0]->request_list) || 200 if (!list_empty(&dep->request_list)) {
194 !list_empty(&dwc->eps[1]->request_list) ||
195 dwc->ep0_status_pending) {
196 ret = -EBUSY; 201 ret = -EBUSY;
197 goto out; 202 goto out;
198 } 203 }
@@ -214,8 +219,9 @@ static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc)
214 struct dwc3_ep *dep = dwc->eps[0]; 219 struct dwc3_ep *dep = dwc->eps[0];
215 220
216 /* stall is always issued on EP0 */ 221 /* stall is always issued on EP0 */
217 __dwc3_gadget_ep_set_halt(dwc->eps[0], 1); 222 __dwc3_gadget_ep_set_halt(dep, 1);
218 dwc->eps[0]->flags = DWC3_EP_ENABLED; 223 dep->flags = DWC3_EP_ENABLED;
224 dwc->delayed_status = false;
219 225
220 if (!list_empty(&dep->request_list)) { 226 if (!list_empty(&dep->request_list)) {
221 struct dwc3_request *req; 227 struct dwc3_request *req;
@@ -254,17 +260,14 @@ static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le)
254 return NULL; 260 return NULL;
255} 261}
256 262
257static void dwc3_ep0_send_status_response(struct dwc3 *dwc) 263static void dwc3_ep0_status_cmpl(struct usb_ep *ep, struct usb_request *req)
258{ 264{
259 dwc3_ep0_start_trans(dwc, 1, dwc->setup_buf_addr,
260 dwc->ep0_usb_req.length,
261 DWC3_TRBCTL_CONTROL_DATA);
262} 265}
263
264/* 266/*
265 * ch 9.4.5 267 * ch 9.4.5
266 */ 268 */
267static int dwc3_ep0_handle_status(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) 269static int dwc3_ep0_handle_status(struct dwc3 *dwc,
270 struct usb_ctrlrequest *ctrl)
268{ 271{
269 struct dwc3_ep *dep; 272 struct dwc3_ep *dep;
270 u32 recip; 273 u32 recip;
@@ -291,7 +294,7 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl
291 case USB_RECIP_ENDPOINT: 294 case USB_RECIP_ENDPOINT:
292 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex); 295 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
293 if (!dep) 296 if (!dep)
294 return -EINVAL; 297 return -EINVAL;
295 298
296 if (dep->flags & DWC3_EP_STALL) 299 if (dep->flags & DWC3_EP_STALL)
297 usb_status = 1 << USB_ENDPOINT_HALT; 300 usb_status = 1 << USB_ENDPOINT_HALT;
@@ -302,10 +305,14 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl
302 305
303 response_pkt = (__le16 *) dwc->setup_buf; 306 response_pkt = (__le16 *) dwc->setup_buf;
304 *response_pkt = cpu_to_le16(usb_status); 307 *response_pkt = cpu_to_le16(usb_status);
305 dwc->ep0_usb_req.length = sizeof(*response_pkt);
306 dwc->ep0_status_pending = 1;
307 308
308 return 0; 309 dep = dwc->eps[0];
310 dwc->ep0_usb_req.dep = dep;
311 dwc->ep0_usb_req.request.length = sizeof(*response_pkt);
312 dwc->ep0_usb_req.request.dma = dwc->setup_buf_addr;
313 dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl;
314
315 return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
309} 316}
310 317
311static int dwc3_ep0_handle_feature(struct dwc3 *dwc, 318static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
@@ -396,8 +403,7 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
396 case USB_RECIP_ENDPOINT: 403 case USB_RECIP_ENDPOINT:
397 switch (wValue) { 404 switch (wValue) {
398 case USB_ENDPOINT_HALT: 405 case USB_ENDPOINT_HALT:
399 406 dep = dwc3_wIndex_to_dep(dwc, wIndex);
400 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
401 if (!dep) 407 if (!dep)
402 return -EINVAL; 408 return -EINVAL;
403 ret = __dwc3_gadget_ep_set_halt(dep, set); 409 ret = __dwc3_gadget_ep_set_halt(dep, set);
@@ -422,8 +428,15 @@ static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
422 u32 reg; 428 u32 reg;
423 429
424 addr = le16_to_cpu(ctrl->wValue); 430 addr = le16_to_cpu(ctrl->wValue);
425 if (addr > 127) 431 if (addr > 127) {
432 dev_dbg(dwc->dev, "invalid device address %d\n", addr);
426 return -EINVAL; 433 return -EINVAL;
434 }
435
436 if (dwc->dev_state == DWC3_CONFIGURED_STATE) {
437 dev_dbg(dwc->dev, "trying to set address when configured\n");
438 return -EINVAL;
439 }
427 440
428 reg = dwc3_readl(dwc->regs, DWC3_DCFG); 441 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
429 reg &= ~(DWC3_DCFG_DEVADDR_MASK); 442 reg &= ~(DWC3_DCFG_DEVADDR_MASK);
@@ -473,8 +486,10 @@ static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
473 if (!cfg) 486 if (!cfg)
474 dwc->dev_state = DWC3_ADDRESS_STATE; 487 dwc->dev_state = DWC3_ADDRESS_STATE;
475 break; 488 break;
489 default:
490 ret = -EINVAL;
476 } 491 }
477 return 0; 492 return ret;
478} 493}
479 494
480static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) 495static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
@@ -537,6 +552,9 @@ static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
537 else 552 else
538 ret = dwc3_ep0_delegate_req(dwc, ctrl); 553 ret = dwc3_ep0_delegate_req(dwc, ctrl);
539 554
555 if (ret == USB_GADGET_DELAYED_STATUS)
556 dwc->delayed_status = true;
557
540 if (ret >= 0) 558 if (ret >= 0)
541 return; 559 return;
542 560
@@ -550,27 +568,21 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
550 struct dwc3_request *r = NULL; 568 struct dwc3_request *r = NULL;
551 struct usb_request *ur; 569 struct usb_request *ur;
552 struct dwc3_trb trb; 570 struct dwc3_trb trb;
553 struct dwc3_ep *dep; 571 struct dwc3_ep *ep0;
554 u32 transferred; 572 u32 transferred;
555 u8 epnum; 573 u8 epnum;
556 574
557 epnum = event->endpoint_number; 575 epnum = event->endpoint_number;
558 dep = dwc->eps[epnum]; 576 ep0 = dwc->eps[0];
559 577
560 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS; 578 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
561 579
562 if (!dwc->ep0_status_pending) { 580 r = next_request(&ep0->request_list);
563 r = next_request(&dwc->eps[0]->request_list); 581 ur = &r->request;
564 ur = &r->request;
565 } else {
566 ur = &dwc->ep0_usb_req;
567 dwc->ep0_status_pending = 0;
568 }
569 582
570 dwc3_trb_to_nat(dwc->ep0_trb, &trb); 583 dwc3_trb_to_nat(dwc->ep0_trb, &trb);
571 584
572 if (dwc->ep0_bounced) { 585 if (dwc->ep0_bounced) {
573 struct dwc3_ep *ep0 = dwc->eps[0];
574 586
575 transferred = min_t(u32, ur->length, 587 transferred = min_t(u32, ur->length,
576 ep0->endpoint.maxpacket - trb.length); 588 ep0->endpoint.maxpacket - trb.length);
@@ -591,7 +603,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
591 * seems to be case when req.length > maxpacket. Could it be? 603 * seems to be case when req.length > maxpacket. Could it be?
592 */ 604 */
593 if (r) 605 if (r)
594 dwc3_gadget_giveback(dep, r, 0); 606 dwc3_gadget_giveback(ep0, r, 0);
595 } 607 }
596} 608}
597 609
@@ -619,6 +631,7 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
619 struct dwc3_ep *dep = dwc->eps[event->endpoint_number]; 631 struct dwc3_ep *dep = dwc->eps[event->endpoint_number];
620 632
621 dep->flags &= ~DWC3_EP_BUSY; 633 dep->flags &= ~DWC3_EP_BUSY;
634 dwc->setup_packet_pending = false;
622 635
623 switch (dwc->ep0state) { 636 switch (dwc->ep0state) {
624 case EP0_SETUP_PHASE: 637 case EP0_SETUP_PHASE:
@@ -643,7 +656,6 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
643static void dwc3_ep0_do_control_setup(struct dwc3 *dwc, 656static void dwc3_ep0_do_control_setup(struct dwc3 *dwc,
644 const struct dwc3_event_depevt *event) 657 const struct dwc3_event_depevt *event)
645{ 658{
646 dwc->ep0state = EP0_SETUP_PHASE;
647 dwc3_ep0_out_start(dwc); 659 dwc3_ep0_out_start(dwc);
648} 660}
649 661
@@ -655,12 +667,6 @@ static void dwc3_ep0_do_control_data(struct dwc3 *dwc,
655 int ret; 667 int ret;
656 668
657 dep = dwc->eps[0]; 669 dep = dwc->eps[0];
658 dwc->ep0state = EP0_DATA_PHASE;
659
660 if (dwc->ep0_status_pending) {
661 dwc3_ep0_send_status_response(dwc);
662 return;
663 }
664 670
665 if (list_empty(&dep->request_list)) { 671 if (list_empty(&dep->request_list)) {
666 dev_vdbg(dwc->dev, "pending request for EP0 Data phase\n"); 672 dev_vdbg(dwc->dev, "pending request for EP0 Data phase\n");
@@ -674,7 +680,6 @@ static void dwc3_ep0_do_control_data(struct dwc3 *dwc,
674 req = next_request(&dep->request_list); 680 req = next_request(&dep->request_list);
675 req->direction = !!event->endpoint_number; 681 req->direction = !!event->endpoint_number;
676 682
677 dwc->ep0state = EP0_DATA_PHASE;
678 if (req->request.length == 0) { 683 if (req->request.length == 0) {
679 ret = dwc3_ep0_start_trans(dwc, event->endpoint_number, 684 ret = dwc3_ep0_start_trans(dwc, event->endpoint_number,
680 dwc->ctrl_req_addr, 0, 685 dwc->ctrl_req_addr, 0,
@@ -706,35 +711,79 @@ static void dwc3_ep0_do_control_data(struct dwc3 *dwc,
706 WARN_ON(ret < 0); 711 WARN_ON(ret < 0);
707} 712}
708 713
709static void dwc3_ep0_do_control_status(struct dwc3 *dwc, 714static int dwc3_ep0_start_control_status(struct dwc3_ep *dep)
710 const struct dwc3_event_depevt *event)
711{ 715{
716 struct dwc3 *dwc = dep->dwc;
712 u32 type; 717 u32 type;
713 int ret;
714
715 dwc->ep0state = EP0_STATUS_PHASE;
716 718
717 type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3 719 type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3
718 : DWC3_TRBCTL_CONTROL_STATUS2; 720 : DWC3_TRBCTL_CONTROL_STATUS2;
719 721
720 ret = dwc3_ep0_start_trans(dwc, event->endpoint_number, 722 return dwc3_ep0_start_trans(dwc, dep->number,
721 dwc->ctrl_req_addr, 0, type); 723 dwc->ctrl_req_addr, 0, type);
724}
722 725
723 WARN_ON(ret < 0); 726static void dwc3_ep0_do_control_status(struct dwc3 *dwc, u32 epnum)
727{
728 struct dwc3_ep *dep = dwc->eps[epnum];
729
730 WARN_ON(dwc3_ep0_start_control_status(dep));
724} 731}
725 732
726static void dwc3_ep0_xfernotready(struct dwc3 *dwc, 733static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
727 const struct dwc3_event_depevt *event) 734 const struct dwc3_event_depevt *event)
728{ 735{
736 dwc->setup_packet_pending = true;
737
738 /*
739 * This part is very tricky: If we has just handled
740 * XferNotReady(Setup) and we're now expecting a
741 * XferComplete but, instead, we receive another
742 * XferNotReady(Setup), we should STALL and restart
743 * the state machine.
744 *
745 * In all other cases, we just continue waiting
746 * for the XferComplete event.
747 *
748 * We are a little bit unsafe here because we're
749 * not trying to ensure that last event was, indeed,
750 * XferNotReady(Setup).
751 *
752 * Still, we don't expect any condition where that
753 * should happen and, even if it does, it would be
754 * another error condition.
755 */
756 if (dwc->ep0_next_event == DWC3_EP0_COMPLETE) {
757 switch (event->status) {
758 case DEPEVT_STATUS_CONTROL_SETUP:
759 dev_vdbg(dwc->dev, "Unexpected XferNotReady(Setup)\n");
760 dwc3_ep0_stall_and_restart(dwc);
761 break;
762 case DEPEVT_STATUS_CONTROL_DATA:
763 /* FALLTHROUGH */
764 case DEPEVT_STATUS_CONTROL_STATUS:
765 /* FALLTHROUGH */
766 default:
767 dev_vdbg(dwc->dev, "waiting for XferComplete\n");
768 }
769
770 return;
771 }
772
729 switch (event->status) { 773 switch (event->status) {
730 case DEPEVT_STATUS_CONTROL_SETUP: 774 case DEPEVT_STATUS_CONTROL_SETUP:
731 dev_vdbg(dwc->dev, "Control Setup\n"); 775 dev_vdbg(dwc->dev, "Control Setup\n");
776
777 dwc->ep0state = EP0_SETUP_PHASE;
778
732 dwc3_ep0_do_control_setup(dwc, event); 779 dwc3_ep0_do_control_setup(dwc, event);
733 break; 780 break;
734 781
735 case DEPEVT_STATUS_CONTROL_DATA: 782 case DEPEVT_STATUS_CONTROL_DATA:
736 dev_vdbg(dwc->dev, "Control Data\n"); 783 dev_vdbg(dwc->dev, "Control Data\n");
737 784
785 dwc->ep0state = EP0_DATA_PHASE;
786
738 if (dwc->ep0_next_event != DWC3_EP0_NRDY_DATA) { 787 if (dwc->ep0_next_event != DWC3_EP0_NRDY_DATA) {
739 dev_vdbg(dwc->dev, "Expected %d got %d\n", 788 dev_vdbg(dwc->dev, "Expected %d got %d\n",
740 dwc->ep0_next_event, 789 dwc->ep0_next_event,
@@ -764,6 +813,8 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
764 case DEPEVT_STATUS_CONTROL_STATUS: 813 case DEPEVT_STATUS_CONTROL_STATUS:
765 dev_vdbg(dwc->dev, "Control Status\n"); 814 dev_vdbg(dwc->dev, "Control Status\n");
766 815
816 dwc->ep0state = EP0_STATUS_PHASE;
817
767 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) { 818 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) {
768 dev_vdbg(dwc->dev, "Expected %d got %d\n", 819 dev_vdbg(dwc->dev, "Expected %d got %d\n",
769 dwc->ep0_next_event, 820 dwc->ep0_next_event,
@@ -772,12 +823,19 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
772 dwc3_ep0_stall_and_restart(dwc); 823 dwc3_ep0_stall_and_restart(dwc);
773 return; 824 return;
774 } 825 }
775 dwc3_ep0_do_control_status(dwc, event); 826
827 if (dwc->delayed_status) {
828 WARN_ON_ONCE(event->endpoint_number != 1);
829 dev_vdbg(dwc->dev, "Mass Storage delayed status\n");
830 return;
831 }
832
833 dwc3_ep0_do_control_status(dwc, event->endpoint_number);
776 } 834 }
777} 835}
778 836
779void dwc3_ep0_interrupt(struct dwc3 *dwc, 837void dwc3_ep0_interrupt(struct dwc3 *dwc,
780 const const struct dwc3_event_depevt *event) 838 const struct dwc3_event_depevt *event)
781{ 839{
782 u8 epnum = event->endpoint_number; 840 u8 epnum = event->endpoint_number;
783 841
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 25dbd8614e72..a696bde53222 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -65,6 +65,22 @@ void dwc3_map_buffer_to_dma(struct dwc3_request *req)
65 return; 65 return;
66 } 66 }
67 67
68 if (req->request.num_sgs) {
69 int mapped;
70
71 mapped = dma_map_sg(dwc->dev, req->request.sg,
72 req->request.num_sgs,
73 req->direction ? DMA_TO_DEVICE
74 : DMA_FROM_DEVICE);
75 if (mapped < 0) {
76 dev_err(dwc->dev, "failed to map SGs\n");
77 return;
78 }
79
80 req->request.num_mapped_sgs = mapped;
81 return;
82 }
83
68 if (req->request.dma == DMA_ADDR_INVALID) { 84 if (req->request.dma == DMA_ADDR_INVALID) {
69 req->request.dma = dma_map_single(dwc->dev, req->request.buf, 85 req->request.dma = dma_map_single(dwc->dev, req->request.buf,
70 req->request.length, req->direction 86 req->request.length, req->direction
@@ -82,6 +98,17 @@ void dwc3_unmap_buffer_from_dma(struct dwc3_request *req)
82 return; 98 return;
83 } 99 }
84 100
101 if (req->request.num_mapped_sgs) {
102 req->request.dma = DMA_ADDR_INVALID;
103 dma_unmap_sg(dwc->dev, req->request.sg,
104 req->request.num_sgs,
105 req->direction ? DMA_TO_DEVICE
106 : DMA_FROM_DEVICE);
107
108 req->request.num_mapped_sgs = 0;
109 return;
110 }
111
85 if (req->mapped) { 112 if (req->mapped) {
86 dma_unmap_single(dwc->dev, req->request.dma, 113 dma_unmap_single(dwc->dev, req->request.dma,
87 req->request.length, req->direction 114 req->request.length, req->direction
@@ -97,7 +124,11 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
97 struct dwc3 *dwc = dep->dwc; 124 struct dwc3 *dwc = dep->dwc;
98 125
99 if (req->queued) { 126 if (req->queued) {
100 dep->busy_slot++; 127 if (req->request.num_mapped_sgs)
128 dep->busy_slot += req->request.num_mapped_sgs;
129 else
130 dep->busy_slot++;
131
101 /* 132 /*
102 * Skip LINK TRB. We can't use req->trb and check for 133 * Skip LINK TRB. We can't use req->trb and check for
103 * DWC3_TRBCTL_LINK_TRB because it points the TRB we just 134 * DWC3_TRBCTL_LINK_TRB because it points the TRB we just
@@ -108,6 +139,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
108 dep->busy_slot++; 139 dep->busy_slot++;
109 } 140 }
110 list_del(&req->list); 141 list_del(&req->list);
142 req->trb = NULL;
111 143
112 if (req->request.status == -EINPROGRESS) 144 if (req->request.status == -EINPROGRESS)
113 req->request.status = status; 145 req->request.status = status;
@@ -251,7 +283,8 @@ static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
251} 283}
252 284
253static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, 285static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
254 const struct usb_endpoint_descriptor *desc) 286 const struct usb_endpoint_descriptor *desc,
287 const struct usb_ss_ep_comp_descriptor *comp_desc)
255{ 288{
256 struct dwc3_gadget_ep_cmd_params params; 289 struct dwc3_gadget_ep_cmd_params params;
257 290
@@ -264,7 +297,7 @@ static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
264 params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN 297 params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN
265 | DWC3_DEPCFG_XFER_NOT_READY_EN; 298 | DWC3_DEPCFG_XFER_NOT_READY_EN;
266 299
267 if (usb_endpoint_xfer_bulk(desc) && dep->endpoint.max_streams) { 300 if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
268 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE 301 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE
269 | DWC3_DEPCFG_STREAM_EVENT_EN; 302 | DWC3_DEPCFG_STREAM_EVENT_EN;
270 dep->stream_capable = true; 303 dep->stream_capable = true;
@@ -317,7 +350,8 @@ static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
317 * Caller should take care of locking 350 * Caller should take care of locking
318 */ 351 */
319static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, 352static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
320 const struct usb_endpoint_descriptor *desc) 353 const struct usb_endpoint_descriptor *desc,
354 const struct usb_ss_ep_comp_descriptor *comp_desc)
321{ 355{
322 struct dwc3 *dwc = dep->dwc; 356 struct dwc3 *dwc = dep->dwc;
323 u32 reg; 357 u32 reg;
@@ -329,7 +363,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
329 return ret; 363 return ret;
330 } 364 }
331 365
332 ret = dwc3_gadget_set_ep_config(dwc, dep, desc); 366 ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc);
333 if (ret) 367 if (ret)
334 return ret; 368 return ret;
335 369
@@ -343,6 +377,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
343 return ret; 377 return ret;
344 378
345 dep->desc = desc; 379 dep->desc = desc;
380 dep->comp_desc = comp_desc;
346 dep->type = usb_endpoint_type(desc); 381 dep->type = usb_endpoint_type(desc);
347 dep->flags |= DWC3_EP_ENABLED; 382 dep->flags |= DWC3_EP_ENABLED;
348 383
@@ -405,6 +440,7 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
405 440
406 dep->stream_capable = false; 441 dep->stream_capable = false;
407 dep->desc = NULL; 442 dep->desc = NULL;
443 dep->comp_desc = NULL;
408 dep->type = 0; 444 dep->type = 0;
409 dep->flags = 0; 445 dep->flags = 0;
410 446
@@ -473,7 +509,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
473 dev_vdbg(dwc->dev, "Enabling %s\n", dep->name); 509 dev_vdbg(dwc->dev, "Enabling %s\n", dep->name);
474 510
475 spin_lock_irqsave(&dwc->lock, flags); 511 spin_lock_irqsave(&dwc->lock, flags);
476 ret = __dwc3_gadget_ep_enable(dep, desc); 512 ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc);
477 spin_unlock_irqrestore(&dwc->lock, flags); 513 spin_unlock_irqrestore(&dwc->lock, flags);
478 514
479 return ret; 515 return ret;
@@ -539,6 +575,85 @@ static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
539 kfree(req); 575 kfree(req);
540} 576}
541 577
578/**
579 * dwc3_prepare_one_trb - setup one TRB from one request
580 * @dep: endpoint for which this request is prepared
581 * @req: dwc3_request pointer
582 */
583static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
584 struct dwc3_request *req, dma_addr_t dma,
585 unsigned length, unsigned last, unsigned chain)
586{
587 struct dwc3 *dwc = dep->dwc;
588 struct dwc3_trb_hw *trb_hw;
589 struct dwc3_trb trb;
590
591 unsigned int cur_slot;
592
593 dev_vdbg(dwc->dev, "%s: req %p dma %08llx length %d%s%s\n",
594 dep->name, req, (unsigned long long) dma,
595 length, last ? " last" : "",
596 chain ? " chain" : "");
597
598 trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK];
599 cur_slot = dep->free_slot;
600 dep->free_slot++;
601
602 /* Skip the LINK-TRB on ISOC */
603 if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) &&
604 usb_endpoint_xfer_isoc(dep->desc))
605 return;
606
607 memset(&trb, 0, sizeof(trb));
608 if (!req->trb) {
609 dwc3_gadget_move_request_queued(req);
610 req->trb = trb_hw;
611 req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw);
612 }
613
614 if (usb_endpoint_xfer_isoc(dep->desc)) {
615 trb.isp_imi = true;
616 trb.csp = true;
617 } else {
618 trb.chn = chain;
619 trb.lst = last;
620 }
621
622 if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable)
623 trb.sid_sofn = req->request.stream_id;
624
625 switch (usb_endpoint_type(dep->desc)) {
626 case USB_ENDPOINT_XFER_CONTROL:
627 trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP;
628 break;
629
630 case USB_ENDPOINT_XFER_ISOC:
631 trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
632
633 /* IOC every DWC3_TRB_NUM / 4 so we can refill */
634 if (!(cur_slot % (DWC3_TRB_NUM / 4)))
635 trb.ioc = last;
636 break;
637
638 case USB_ENDPOINT_XFER_BULK:
639 case USB_ENDPOINT_XFER_INT:
640 trb.trbctl = DWC3_TRBCTL_NORMAL;
641 break;
642 default:
643 /*
644 * This is only possible with faulty memory because we
645 * checked it already :)
646 */
647 BUG();
648 }
649
650 trb.length = length;
651 trb.bplh = dma;
652 trb.hwo = true;
653
654 dwc3_trb_to_hw(&trb, trb_hw);
655}
656
542/* 657/*
543 * dwc3_prepare_trbs - setup TRBs from requests 658 * dwc3_prepare_trbs - setup TRBs from requests
544 * @dep: endpoint for which requests are being prepared 659 * @dep: endpoint for which requests are being prepared
@@ -548,18 +663,17 @@ static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
548 * transfers. The functions returns once there are not more TRBs available or 663 * transfers. The functions returns once there are not more TRBs available or
549 * it run out of requests. 664 * it run out of requests.
550 */ 665 */
551static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep, 666static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
552 bool starting)
553{ 667{
554 struct dwc3_request *req, *n, *ret = NULL; 668 struct dwc3_request *req, *n;
555 struct dwc3_trb_hw *trb_hw;
556 struct dwc3_trb trb;
557 u32 trbs_left; 669 u32 trbs_left;
670 unsigned int last_one = 0;
558 671
559 BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM); 672 BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
560 673
561 /* the first request must not be queued */ 674 /* the first request must not be queued */
562 trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK; 675 trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK;
676
563 /* 677 /*
564 * if busy & slot are equal than it is either full or empty. If we are 678 * if busy & slot are equal than it is either full or empty. If we are
565 * starting to proceed requests then we are empty. Otherwise we ar 679 * starting to proceed requests then we are empty. Otherwise we ar
@@ -567,7 +681,7 @@ static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep,
567 */ 681 */
568 if (!trbs_left) { 682 if (!trbs_left) {
569 if (!starting) 683 if (!starting)
570 return NULL; 684 return;
571 trbs_left = DWC3_TRB_NUM; 685 trbs_left = DWC3_TRB_NUM;
572 /* 686 /*
573 * In case we start from scratch, we queue the ISOC requests 687 * In case we start from scratch, we queue the ISOC requests
@@ -591,94 +705,62 @@ static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep,
591 705
592 /* The last TRB is a link TRB, not used for xfer */ 706 /* The last TRB is a link TRB, not used for xfer */
593 if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc)) 707 if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc))
594 return NULL; 708 return;
595 709
596 list_for_each_entry_safe(req, n, &dep->request_list, list) { 710 list_for_each_entry_safe(req, n, &dep->request_list, list) {
597 unsigned int last_one = 0; 711 unsigned length;
598 unsigned int cur_slot; 712 dma_addr_t dma;
599 713
600 trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK]; 714 if (req->request.num_mapped_sgs > 0) {
601 cur_slot = dep->free_slot; 715 struct usb_request *request = &req->request;
602 dep->free_slot++; 716 struct scatterlist *sg = request->sg;
717 struct scatterlist *s;
718 int i;
603 719
604 /* Skip the LINK-TRB on ISOC */ 720 for_each_sg(sg, s, request->num_mapped_sgs, i) {
605 if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) && 721 unsigned chain = true;
606 usb_endpoint_xfer_isoc(dep->desc))
607 continue;
608 722
609 dwc3_gadget_move_request_queued(req); 723 length = sg_dma_len(s);
610 memset(&trb, 0, sizeof(trb)); 724 dma = sg_dma_address(s);
611 trbs_left--;
612 725
613 /* Is our TRB pool empty? */ 726 if (i == (request->num_mapped_sgs - 1)
614 if (!trbs_left) 727 || sg_is_last(s)) {
615 last_one = 1; 728 last_one = true;
616 /* Is this the last request? */ 729 chain = false;
617 if (list_empty(&dep->request_list)) 730 }
618 last_one = 1;
619 731
620 /* 732 trbs_left--;
621 * FIXME we shouldn't need to set LST bit always but we are 733 if (!trbs_left)
622 * facing some weird problem with the Hardware where it doesn't 734 last_one = true;
623 * complete even though it has been previously started.
624 *
625 * While we're debugging the problem, as a workaround to
626 * multiple TRBs handling, use only one TRB at a time.
627 */
628 last_one = 1;
629 735
630 req->trb = trb_hw; 736 if (last_one)
631 if (!ret) 737 chain = false;
632 ret = req;
633 738
634 trb.bplh = req->request.dma; 739 dwc3_prepare_one_trb(dep, req, dma, length,
740 last_one, chain);
635 741
636 if (usb_endpoint_xfer_isoc(dep->desc)) { 742 if (last_one)
637 trb.isp_imi = true; 743 break;
638 trb.csp = true; 744 }
639 } else { 745 } else {
640 trb.lst = last_one; 746 dma = req->request.dma;
641 } 747 length = req->request.length;
748 trbs_left--;
642 749
643 if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable) 750 if (!trbs_left)
644 trb.sid_sofn = req->request.stream_id; 751 last_one = 1;
645
646 switch (usb_endpoint_type(dep->desc)) {
647 case USB_ENDPOINT_XFER_CONTROL:
648 trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP;
649 break;
650 752
651 case USB_ENDPOINT_XFER_ISOC: 753 /* Is this the last request? */
652 trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST; 754 if (list_is_last(&req->list, &dep->request_list))
755 last_one = 1;
653 756
654 /* IOC every DWC3_TRB_NUM / 4 so we can refill */ 757 dwc3_prepare_one_trb(dep, req, dma, length,
655 if (!(cur_slot % (DWC3_TRB_NUM / 4))) 758 last_one, false);
656 trb.ioc = last_one;
657 break;
658 759
659 case USB_ENDPOINT_XFER_BULK: 760 if (last_one)
660 case USB_ENDPOINT_XFER_INT: 761 break;
661 trb.trbctl = DWC3_TRBCTL_NORMAL;
662 break;
663 default:
664 /*
665 * This is only possible with faulty memory because we
666 * checked it already :)
667 */
668 BUG();
669 } 762 }
670
671 trb.length = req->request.length;
672 trb.hwo = true;
673
674 dwc3_trb_to_hw(&trb, trb_hw);
675 req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw);
676
677 if (last_one)
678 break;
679 } 763 }
680
681 return ret;
682} 764}
683 765
684static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param, 766static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
@@ -707,11 +789,13 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
707 /* req points to the first request which will be sent */ 789 /* req points to the first request which will be sent */
708 req = next_request(&dep->req_queued); 790 req = next_request(&dep->req_queued);
709 } else { 791 } else {
792 dwc3_prepare_trbs(dep, start_new);
793
710 /* 794 /*
711 * req points to the first request where HWO changed 795 * req points to the first request where HWO changed
712 * from 0 to 1 796 * from 0 to 1
713 */ 797 */
714 req = dwc3_prepare_trbs(dep, start_new); 798 req = next_request(&dep->req_queued);
715 } 799 }
716 if (!req) { 800 if (!req) {
717 dep->flags |= DWC3_EP_PENDING_REQUEST; 801 dep->flags |= DWC3_EP_PENDING_REQUEST;
@@ -745,8 +829,9 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
745 dep->flags |= DWC3_EP_BUSY; 829 dep->flags |= DWC3_EP_BUSY;
746 dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc, 830 dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc,
747 dep->number); 831 dep->number);
748 if (!dep->res_trans_idx) 832
749 printk_once(KERN_ERR "%s() res_trans_idx is invalid\n", __func__); 833 WARN_ON_ONCE(!dep->res_trans_idx);
834
750 return 0; 835 return 0;
751} 836}
752 837
@@ -1155,35 +1240,9 @@ static int dwc3_gadget_start(struct usb_gadget *g,
1155 dwc->gadget_driver = driver; 1240 dwc->gadget_driver = driver;
1156 dwc->gadget.dev.driver = &driver->driver; 1241 dwc->gadget.dev.driver = &driver->driver;
1157 1242
1158 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
1159
1160 reg &= ~DWC3_GCTL_SCALEDOWN(3);
1161 reg &= ~DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG);
1162 reg &= ~DWC3_GCTL_DISSCRAMBLE;
1163 reg |= DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_DEVICE);
1164
1165 switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams0)) {
1166 case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
1167 reg &= ~DWC3_GCTL_DSBLCLKGTNG;
1168 break;
1169 default:
1170 dev_dbg(dwc->dev, "No power optimization available\n");
1171 }
1172
1173 /*
1174 * WORKAROUND: DWC3 revisions <1.90a have a bug
1175 * when The device fails to connect at SuperSpeed
1176 * and falls back to high-speed mode which causes
1177 * the device to enter in a Connect/Disconnect loop
1178 */
1179 if (dwc->revision < DWC3_REVISION_190A)
1180 reg |= DWC3_GCTL_U2RSTECN;
1181
1182 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
1183
1184 reg = dwc3_readl(dwc->regs, DWC3_DCFG); 1243 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1185 reg &= ~(DWC3_DCFG_SPEED_MASK); 1244 reg &= ~(DWC3_DCFG_SPEED_MASK);
1186 reg |= DWC3_DCFG_SUPERSPEED; 1245 reg |= dwc->maximum_speed;
1187 dwc3_writel(dwc->regs, DWC3_DCFG, reg); 1246 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1188 1247
1189 dwc->start_config_issued = false; 1248 dwc->start_config_issued = false;
@@ -1192,14 +1251,14 @@ static int dwc3_gadget_start(struct usb_gadget *g,
1192 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); 1251 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1193 1252
1194 dep = dwc->eps[0]; 1253 dep = dwc->eps[0];
1195 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); 1254 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1196 if (ret) { 1255 if (ret) {
1197 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1256 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1198 goto err0; 1257 goto err0;
1199 } 1258 }
1200 1259
1201 dep = dwc->eps[1]; 1260 dep = dwc->eps[1];
1202 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); 1261 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1203 if (ret) { 1262 if (ret) {
1204 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1263 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1205 goto err1; 1264 goto err1;
@@ -1290,11 +1349,10 @@ static int __devinit dwc3_gadget_init_endpoints(struct dwc3 *dwc)
1290 &dwc->gadget.ep_list); 1349 &dwc->gadget.ep_list);
1291 1350
1292 ret = dwc3_alloc_trb_pool(dep); 1351 ret = dwc3_alloc_trb_pool(dep);
1293 if (ret) { 1352 if (ret)
1294 dev_err(dwc->dev, "%s: failed to allocate TRB pool\n", dep->name);
1295 return ret; 1353 return ret;
1296 }
1297 } 1354 }
1355
1298 INIT_LIST_HEAD(&dep->request_list); 1356 INIT_LIST_HEAD(&dep->request_list);
1299 INIT_LIST_HEAD(&dep->req_queued); 1357 INIT_LIST_HEAD(&dep->req_queued);
1300 } 1358 }
@@ -1334,8 +1392,10 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1334 1392
1335 do { 1393 do {
1336 req = next_request(&dep->req_queued); 1394 req = next_request(&dep->req_queued);
1337 if (!req) 1395 if (!req) {
1338 break; 1396 WARN_ON_ONCE(1);
1397 return 1;
1398 }
1339 1399
1340 dwc3_trb_to_nat(req->trb, &trb); 1400 dwc3_trb_to_nat(req->trb, &trb);
1341 1401
@@ -1400,6 +1460,31 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
1400 dep->flags &= ~DWC3_EP_BUSY; 1460 dep->flags &= ~DWC3_EP_BUSY;
1401 dep->res_trans_idx = 0; 1461 dep->res_trans_idx = 0;
1402 } 1462 }
1463
1464 /*
1465 * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround.
1466 * See dwc3_gadget_linksts_change_interrupt() for 1st half.
1467 */
1468 if (dwc->revision < DWC3_REVISION_183A) {
1469 u32 reg;
1470 int i;
1471
1472 for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
1473 struct dwc3_ep *dep = dwc->eps[i];
1474
1475 if (!(dep->flags & DWC3_EP_ENABLED))
1476 continue;
1477
1478 if (!list_empty(&dep->req_queued))
1479 return;
1480 }
1481
1482 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1483 reg |= dwc->u1u2;
1484 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1485
1486 dwc->u1u2 = 0;
1487 }
1403} 1488}
1404 1489
1405static void dwc3_gadget_start_isoc(struct dwc3 *dwc, 1490static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
@@ -1639,6 +1724,7 @@ static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)
1639 dwc->start_config_issued = false; 1724 dwc->start_config_issued = false;
1640 1725
1641 dwc->gadget.speed = USB_SPEED_UNKNOWN; 1726 dwc->gadget.speed = USB_SPEED_UNKNOWN;
1727 dwc->setup_packet_pending = false;
1642} 1728}
1643 1729
1644static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on) 1730static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on)
@@ -1675,6 +1761,40 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
1675 1761
1676 dev_vdbg(dwc->dev, "%s\n", __func__); 1762 dev_vdbg(dwc->dev, "%s\n", __func__);
1677 1763
1764 /*
1765 * WORKAROUND: DWC3 revisions <1.88a have an issue which
1766 * would cause a missing Disconnect Event if there's a
1767 * pending Setup Packet in the FIFO.
1768 *
1769 * There's no suggested workaround on the official Bug
1770 * report, which states that "unless the driver/application
1771 * is doing any special handling of a disconnect event,
1772 * there is no functional issue".
1773 *
1774 * Unfortunately, it turns out that we _do_ some special
1775 * handling of a disconnect event, namely complete all
1776 * pending transfers, notify gadget driver of the
1777 * disconnection, and so on.
1778 *
1779 * Our suggested workaround is to follow the Disconnect
1780 * Event steps here, instead, based on a setup_packet_pending
1781 * flag. Such flag gets set whenever we have a XferNotReady
1782 * event on EP0 and gets cleared on XferComplete for the
1783 * same endpoint.
1784 *
1785 * Refers to:
1786 *
1787 * STAR#9000466709: RTL: Device : Disconnect event not
1788 * generated if setup packet pending in FIFO
1789 */
1790 if (dwc->revision < DWC3_REVISION_188A) {
1791 if (dwc->setup_packet_pending)
1792 dwc3_gadget_disconnect_interrupt(dwc);
1793 }
1794
1795 /* after reset -> Default State */
1796 dwc->dev_state = DWC3_DEFAULT_STATE;
1797
1678 /* Enable PHYs */ 1798 /* Enable PHYs */
1679 dwc3_gadget_usb2_phy_power(dwc, true); 1799 dwc3_gadget_usb2_phy_power(dwc, true);
1680 dwc3_gadget_usb3_phy_power(dwc, true); 1800 dwc3_gadget_usb3_phy_power(dwc, true);
@@ -1755,6 +1875,22 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
1755 1875
1756 switch (speed) { 1876 switch (speed) {
1757 case DWC3_DCFG_SUPERSPEED: 1877 case DWC3_DCFG_SUPERSPEED:
1878 /*
1879 * WORKAROUND: DWC3 revisions <1.90a have an issue which
1880 * would cause a missing USB3 Reset event.
1881 *
1882 * In such situations, we should force a USB3 Reset
1883 * event by calling our dwc3_gadget_reset_interrupt()
1884 * routine.
1885 *
1886 * Refers to:
1887 *
1888 * STAR#9000483510: RTL: SS : USB3 reset event may
1889 * not be generated always when the link enters poll
1890 */
1891 if (dwc->revision < DWC3_REVISION_190A)
1892 dwc3_gadget_reset_interrupt(dwc);
1893
1758 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); 1894 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1759 dwc->gadget.ep0->maxpacket = 512; 1895 dwc->gadget.ep0->maxpacket = 512;
1760 dwc->gadget.speed = USB_SPEED_SUPER; 1896 dwc->gadget.speed = USB_SPEED_SUPER;
@@ -1781,14 +1917,14 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
1781 dwc3_gadget_disable_phy(dwc, dwc->gadget.speed); 1917 dwc3_gadget_disable_phy(dwc, dwc->gadget.speed);
1782 1918
1783 dep = dwc->eps[0]; 1919 dep = dwc->eps[0];
1784 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); 1920 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1785 if (ret) { 1921 if (ret) {
1786 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1922 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1787 return; 1923 return;
1788 } 1924 }
1789 1925
1790 dep = dwc->eps[1]; 1926 dep = dwc->eps[1];
1791 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); 1927 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1792 if (ret) { 1928 if (ret) {
1793 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1929 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1794 return; 1930 return;
@@ -1818,8 +1954,55 @@ static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
1818static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, 1954static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
1819 unsigned int evtinfo) 1955 unsigned int evtinfo)
1820{ 1956{
1821 /* The fith bit says SuperSpeed yes or no. */ 1957 enum dwc3_link_state next = evtinfo & DWC3_LINK_STATE_MASK;
1822 dwc->link_state = evtinfo & DWC3_LINK_STATE_MASK; 1958
1959 /*
1960 * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending
1961 * on the link partner, the USB session might do multiple entry/exit
1962 * of low power states before a transfer takes place.
1963 *
1964 * Due to this problem, we might experience lower throughput. The
1965 * suggested workaround is to disable DCTL[12:9] bits if we're
1966 * transitioning from U1/U2 to U0 and enable those bits again
1967 * after a transfer completes and there are no pending transfers
1968 * on any of the enabled endpoints.
1969 *
1970 * This is the first half of that workaround.
1971 *
1972 * Refers to:
1973 *
1974 * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us
1975 * core send LGO_Ux entering U0
1976 */
1977 if (dwc->revision < DWC3_REVISION_183A) {
1978 if (next == DWC3_LINK_STATE_U0) {
1979 u32 u1u2;
1980 u32 reg;
1981
1982 switch (dwc->link_state) {
1983 case DWC3_LINK_STATE_U1:
1984 case DWC3_LINK_STATE_U2:
1985 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1986 u1u2 = reg & (DWC3_DCTL_INITU2ENA
1987 | DWC3_DCTL_ACCEPTU2ENA
1988 | DWC3_DCTL_INITU1ENA
1989 | DWC3_DCTL_ACCEPTU1ENA);
1990
1991 if (!dwc->u1u2)
1992 dwc->u1u2 = reg & u1u2;
1993
1994 reg &= ~u1u2;
1995
1996 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1997 break;
1998 default:
1999 /* do nothing */
2000 break;
2001 }
2002 }
2003 }
2004
2005 dwc->link_state = next;
1823 2006
1824 dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state); 2007 dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state);
1825} 2008}
@@ -1925,7 +2108,7 @@ static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
1925 2108
1926 spin_lock(&dwc->lock); 2109 spin_lock(&dwc->lock);
1927 2110
1928 for (i = 0; i < DWC3_EVENT_BUFFERS_NUM; i++) { 2111 for (i = 0; i < dwc->num_event_buffers; i++) {
1929 irqreturn_t status; 2112 irqreturn_t status;
1930 2113
1931 status = dwc3_process_event_buf(dwc, i); 2114 status = dwc3_process_event_buf(dwc, i);
@@ -1986,9 +2169,10 @@ int __devinit dwc3_gadget_init(struct dwc3 *dwc)
1986 dev_set_name(&dwc->gadget.dev, "gadget"); 2169 dev_set_name(&dwc->gadget.dev, "gadget");
1987 2170
1988 dwc->gadget.ops = &dwc3_gadget_ops; 2171 dwc->gadget.ops = &dwc3_gadget_ops;
1989 dwc->gadget.is_dualspeed = true; 2172 dwc->gadget.max_speed = USB_SPEED_SUPER;
1990 dwc->gadget.speed = USB_SPEED_UNKNOWN; 2173 dwc->gadget.speed = USB_SPEED_UNKNOWN;
1991 dwc->gadget.dev.parent = dwc->dev; 2174 dwc->gadget.dev.parent = dwc->dev;
2175 dwc->gadget.sg_supported = true;
1992 2176
1993 dma_set_coherent_mask(&dwc->gadget.dev, dwc->dev->coherent_dma_mask); 2177 dma_set_coherent_mask(&dwc->gadget.dev, dwc->dev->coherent_dma_mask);
1994 2178
@@ -2076,7 +2260,6 @@ err0:
2076void dwc3_gadget_exit(struct dwc3 *dwc) 2260void dwc3_gadget_exit(struct dwc3 *dwc)
2077{ 2261{
2078 int irq; 2262 int irq;
2079 int i;
2080 2263
2081 usb_del_gadget_udc(&dwc->gadget); 2264 usb_del_gadget_udc(&dwc->gadget);
2082 irq = platform_get_irq(to_platform_device(dwc->dev), 0); 2265 irq = platform_get_irq(to_platform_device(dwc->dev), 0);
@@ -2084,9 +2267,6 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
2084 dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00); 2267 dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
2085 free_irq(irq, dwc); 2268 free_irq(irq, dwc);
2086 2269
2087 for (i = 0; i < ARRAY_SIZE(dwc->eps); i++)
2088 __dwc3_gadget_ep_disable(dwc->eps[i]);
2089
2090 dwc3_gadget_free_endpoints(dwc); 2270 dwc3_gadget_free_endpoints(dwc);
2091 2271
2092 dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce, 2272 dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce,
diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
index 71145a449d99..d97f467d41cc 100644
--- a/drivers/usb/dwc3/gadget.h
+++ b/drivers/usb/dwc3/gadget.h
@@ -79,19 +79,6 @@ struct dwc3_gadget_ep_cmd_params {
79 79
80/* -------------------------------------------------------------------------- */ 80/* -------------------------------------------------------------------------- */
81 81
82struct dwc3_request {
83 struct usb_request request;
84 struct list_head list;
85 struct dwc3_ep *dep;
86
87 u8 epnum;
88 struct dwc3_trb_hw *trb;
89 dma_addr_t trb_dma;
90
91 unsigned direction:1;
92 unsigned mapped:1;
93 unsigned queued:1;
94};
95#define to_dwc3_request(r) (container_of(r, struct dwc3_request, request)) 82#define to_dwc3_request(r) (container_of(r, struct dwc3_request, request))
96 83
97static inline struct dwc3_request *next_request(struct list_head *list) 84static inline struct dwc3_request *next_request(struct list_head *list)
@@ -110,23 +97,11 @@ static inline void dwc3_gadget_move_request_queued(struct dwc3_request *req)
110 list_move_tail(&req->list, &dep->req_queued); 97 list_move_tail(&req->list, &dep->req_queued);
111} 98}
112 99
113#if defined(CONFIG_USB_GADGET_DWC3) || defined(CONFIG_USB_GADGET_DWC3_MODULE)
114int dwc3_gadget_init(struct dwc3 *dwc);
115void dwc3_gadget_exit(struct dwc3 *dwc);
116#else
117static inline int dwc3_gadget_init(struct dwc3 *dwc) { return 0; }
118static inline void dwc3_gadget_exit(struct dwc3 *dwc) { }
119static inline int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
120 unsigned cmd, struct dwc3_gadget_ep_cmd_params *params)
121{
122 return 0;
123}
124#endif
125
126void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, 100void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
127 int status); 101 int status);
128 102
129void dwc3_ep0_interrupt(struct dwc3 *dwc, const struct dwc3_event_depevt *event); 103void dwc3_ep0_interrupt(struct dwc3 *dwc,
104 const struct dwc3_event_depevt *event);
130void dwc3_ep0_out_start(struct dwc3 *dwc); 105void dwc3_ep0_out_start(struct dwc3 *dwc);
131int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request, 106int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
132 gfp_t gfp_flags); 107 gfp_t gfp_flags);
diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
new file mode 100644
index 000000000000..7cfe211b6c37
--- /dev/null
+++ b/drivers/usb/dwc3/host.c
@@ -0,0 +1,102 @@
1/**
2 * host.c - DesignWare USB3 DRD Controller Host Glue
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions, and the following disclaimer,
13 * without modification.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. The names of the above-listed copyright holders may not be used
18 * to endorse or promote products derived from this software without
19 * specific prior written permission.
20 *
21 * ALTERNATIVELY, this software may be distributed under the terms of the
22 * GNU General Public License ("GPL") version 2, as published by the Free
23 * Software Foundation.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
26 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
32 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
33 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
34 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include <linux/platform_device.h>
39
40#include "core.h"
41
42static struct resource generic_resources[] = {
43 {
44 .flags = IORESOURCE_IRQ,
45 },
46 {
47 .flags = IORESOURCE_MEM,
48 },
49};
50
51int dwc3_host_init(struct dwc3 *dwc)
52{
53 struct platform_device *xhci;
54 int ret;
55
56 xhci = platform_device_alloc("xhci", -1);
57 if (!xhci) {
58 dev_err(dwc->dev, "couldn't allocate xHCI device\n");
59 ret = -ENOMEM;
60 goto err0;
61 }
62
63 dma_set_coherent_mask(&xhci->dev, dwc->dev->coherent_dma_mask);
64
65 xhci->dev.parent = dwc->dev;
66 xhci->dev.dma_mask = dwc->dev->dma_mask;
67 xhci->dev.dma_parms = dwc->dev->dma_parms;
68
69 dwc->xhci = xhci;
70
71 /* setup resources */
72 generic_resources[0].start = dwc->irq;
73
74 generic_resources[1].start = dwc->res->start;
75 generic_resources[1].end = dwc->res->start + 0x7fff;
76
77 ret = platform_device_add_resources(xhci, generic_resources,
78 ARRAY_SIZE(generic_resources));
79 if (ret) {
80 dev_err(dwc->dev, "couldn't add resources to xHCI device\n");
81 goto err1;
82 }
83
84 ret = platform_device_add(xhci);
85 if (ret) {
86 dev_err(dwc->dev, "failed to register xHCI device\n");
87 goto err1;
88 }
89
90 return 0;
91
92err1:
93 platform_device_put(xhci);
94
95err0:
96 return ret;
97}
98
99void dwc3_host_exit(struct dwc3 *dwc)
100{
101 platform_device_unregister(dwc->xhci);
102}
diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h
index bc957db1ea4b..071d561f3e68 100644
--- a/drivers/usb/dwc3/io.h
+++ b/drivers/usb/dwc3/io.h
@@ -39,7 +39,7 @@
39#ifndef __DRIVERS_USB_DWC3_IO_H 39#ifndef __DRIVERS_USB_DWC3_IO_H
40#define __DRIVERS_USB_DWC3_IO_H 40#define __DRIVERS_USB_DWC3_IO_H
41 41
42#include <asm/io.h> 42#include <linux/io.h>
43 43
44static inline u32 dwc3_readl(void __iomem *base, u32 offset) 44static inline u32 dwc3_readl(void __iomem *base, u32 offset)
45{ 45{
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 01:32:10 -0500