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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-20 14:26:30 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-20 14:26:30 -0400
commited378a52dabf77b406b447fd3238f83ea24b71fa (patch)
tree07e1a7ec2d1c08767ee81b9910f5912b80502632 /drivers/usb/dwc3/gadget.c
parent843ec558f91b8e8fdb6efc908f2c0506407cc750 (diff)
parent11207b6fe05438b2e87a26435cd98db3d55e6fa7 (diff)
Merge tag 'usb-3.3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB merge for 3.4-rc1 from Greg KH: "Here's the big USB merge for the 3.4-rc1 merge window. Lots of gadget driver reworks here, driver updates, xhci changes, some new drivers added, usb-serial core reworking to fix some bugs, and other various minor things. There are some patches touching arch code, but they have all been acked by the various arch maintainers." * tag 'usb-3.3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (302 commits) net: qmi_wwan: add support for ZTE MF820D USB: option: add ZTE MF820D usb: gadget: f_fs: Remove lock is held before freeing checks USB: option: make interface blacklist work again usb/ub: deprecate & schedule for removal the "Low Performance USB Block" driver USB: ohci-pxa27x: add clk_prepare/clk_unprepare calls USB: use generic platform driver on ath79 USB: EHCI: Add a generic platform device driver USB: OHCI: Add a generic platform device driver USB: ftdi_sio: new PID: LUMEL PD12 USB: ftdi_sio: add support for FT-X series devices USB: serial: mos7840: Fixed MCS7820 device attach problem usb: Don't make USB_ARCH_HAS_{XHCI,OHCI,EHCI} depend on USB_SUPPORT. usb gadget: fix a section mismatch when compiling g_ffs with CONFIG_USB_FUNCTIONFS_ETH USB: ohci-nxp: Remove i2c_write(), use smbus USB: ohci-nxp: Support for LPC32xx USB: ohci-nxp: Rename symbols from pnx4008 to nxp USB: OHCI-HCD: Rename ohci-pnx4008 to ohci-nxp usb: gadget: Kconfig: fix typo for 'different' usb: dwc3: pci: fix another failure path in dwc3_pci_probe() ...
Diffstat (limited to 'drivers/usb/dwc3/gadget.c')
-rw-r--r--drivers/usb/dwc3/gadget.c429
1 files changed, 270 insertions, 159 deletions
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 064b6e2cd411..5255fe975ea1 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -54,68 +54,162 @@
54#include "gadget.h" 54#include "gadget.h"
55#include "io.h" 55#include "io.h"
56 56
57#define DMA_ADDR_INVALID (~(dma_addr_t)0) 57/**
58 58 * dwc3_gadget_set_test_mode - Enables USB2 Test Modes
59void dwc3_map_buffer_to_dma(struct dwc3_request *req) 59 * @dwc: pointer to our context structure
60 * @mode: the mode to set (J, K SE0 NAK, Force Enable)
61 *
62 * Caller should take care of locking. This function will
63 * return 0 on success or -EINVAL if wrong Test Selector
64 * is passed
65 */
66int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode)
60{ 67{
61 struct dwc3 *dwc = req->dep->dwc; 68 u32 reg;
62 69
63 if (req->request.length == 0) { 70 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
64 /* req->request.dma = dwc->setup_buf_addr; */ 71 reg &= ~DWC3_DCTL_TSTCTRL_MASK;
65 return; 72
73 switch (mode) {
74 case TEST_J:
75 case TEST_K:
76 case TEST_SE0_NAK:
77 case TEST_PACKET:
78 case TEST_FORCE_EN:
79 reg |= mode << 1;
80 break;
81 default:
82 return -EINVAL;
66 } 83 }
67 84
68 if (req->request.num_sgs) { 85 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
69 int mapped;
70 86
71 mapped = dma_map_sg(dwc->dev, req->request.sg, 87 return 0;
72 req->request.num_sgs, 88}
73 req->direction ? DMA_TO_DEVICE
74 : DMA_FROM_DEVICE);
75 if (mapped < 0) {
76 dev_err(dwc->dev, "failed to map SGs\n");
77 return;
78 }
79 89
80 req->request.num_mapped_sgs = mapped; 90/**
81 return; 91 * dwc3_gadget_set_link_state - Sets USB Link to a particular State
82 } 92 * @dwc: pointer to our context structure
93 * @state: the state to put link into
94 *
95 * Caller should take care of locking. This function will
96 * return 0 on success or -ETIMEDOUT.
97 */
98int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state)
99{
100 int retries = 10000;
101 u32 reg;
102
103 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
104 reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
83 105
84 if (req->request.dma == DMA_ADDR_INVALID) { 106 /* set requested state */
85 req->request.dma = dma_map_single(dwc->dev, req->request.buf, 107 reg |= DWC3_DCTL_ULSTCHNGREQ(state);
86 req->request.length, req->direction 108 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
87 ? DMA_TO_DEVICE : DMA_FROM_DEVICE); 109
88 req->mapped = true; 110 /* wait for a change in DSTS */
111 while (--retries) {
112 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
113
114 if (DWC3_DSTS_USBLNKST(reg) == state)
115 return 0;
116
117 udelay(5);
89 } 118 }
119
120 dev_vdbg(dwc->dev, "link state change request timed out\n");
121
122 return -ETIMEDOUT;
90} 123}
91 124
92void dwc3_unmap_buffer_from_dma(struct dwc3_request *req) 125/**
126 * dwc3_gadget_resize_tx_fifos - reallocate fifo spaces for current use-case
127 * @dwc: pointer to our context structure
128 *
129 * This function will a best effort FIFO allocation in order
130 * to improve FIFO usage and throughput, while still allowing
131 * us to enable as many endpoints as possible.
132 *
133 * Keep in mind that this operation will be highly dependent
134 * on the configured size for RAM1 - which contains TxFifo -,
135 * the amount of endpoints enabled on coreConsultant tool, and
136 * the width of the Master Bus.
137 *
138 * In the ideal world, we would always be able to satisfy the
139 * following equation:
140 *
141 * ((512 + 2 * MDWIDTH-Bytes) + (Number of IN Endpoints - 1) * \
142 * (3 * (1024 + MDWIDTH-Bytes) + MDWIDTH-Bytes)) / MDWIDTH-Bytes
143 *
144 * Unfortunately, due to many variables that's not always the case.
145 */
146int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)
93{ 147{
94 struct dwc3 *dwc = req->dep->dwc; 148 int last_fifo_depth = 0;
149 int ram1_depth;
150 int fifo_size;
151 int mdwidth;
152 int num;
95 153
96 if (req->request.length == 0) { 154 if (!dwc->needs_fifo_resize)
97 req->request.dma = DMA_ADDR_INVALID; 155 return 0;
98 return;
99 }
100 156
101 if (req->request.num_mapped_sgs) { 157 ram1_depth = DWC3_RAM1_DEPTH(dwc->hwparams.hwparams7);
102 req->request.dma = DMA_ADDR_INVALID; 158 mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
103 dma_unmap_sg(dwc->dev, req->request.sg,
104 req->request.num_mapped_sgs,
105 req->direction ? DMA_TO_DEVICE
106 : DMA_FROM_DEVICE);
107 159
108 req->request.num_mapped_sgs = 0; 160 /* MDWIDTH is represented in bits, we need it in bytes */
109 return; 161 mdwidth >>= 3;
110 } 162
163 /*
164 * FIXME For now we will only allocate 1 wMaxPacketSize space
165 * for each enabled endpoint, later patches will come to
166 * improve this algorithm so that we better use the internal
167 * FIFO space
168 */
169 for (num = 0; num < DWC3_ENDPOINTS_NUM; num++) {
170 struct dwc3_ep *dep = dwc->eps[num];
171 int fifo_number = dep->number >> 1;
172 int mult = 1;
173 int tmp;
174
175 if (!(dep->number & 1))
176 continue;
177
178 if (!(dep->flags & DWC3_EP_ENABLED))
179 continue;
180
181 if (usb_endpoint_xfer_bulk(dep->desc)
182 || usb_endpoint_xfer_isoc(dep->desc))
183 mult = 3;
184
185 /*
186 * REVISIT: the following assumes we will always have enough
187 * space available on the FIFO RAM for all possible use cases.
188 * Make sure that's true somehow and change FIFO allocation
189 * accordingly.
190 *
191 * If we have Bulk or Isochronous endpoints, we want
192 * them to be able to be very, very fast. So we're giving
193 * those endpoints a fifo_size which is enough for 3 full
194 * packets
195 */
196 tmp = mult * (dep->endpoint.maxpacket + mdwidth);
197 tmp += mdwidth;
198
199 fifo_size = DIV_ROUND_UP(tmp, mdwidth);
200
201 fifo_size |= (last_fifo_depth << 16);
202
203 dev_vdbg(dwc->dev, "%s: Fifo Addr %04x Size %d\n",
204 dep->name, last_fifo_depth, fifo_size & 0xffff);
205
206 dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(fifo_number),
207 fifo_size);
111 208
112 if (req->mapped) { 209 last_fifo_depth += (fifo_size & 0xffff);
113 dma_unmap_single(dwc->dev, req->request.dma,
114 req->request.length, req->direction
115 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
116 req->mapped = 0;
117 req->request.dma = DMA_ADDR_INVALID;
118 } 210 }
211
212 return 0;
119} 213}
120 214
121void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, 215void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
@@ -144,14 +238,15 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
144 if (req->request.status == -EINPROGRESS) 238 if (req->request.status == -EINPROGRESS)
145 req->request.status = status; 239 req->request.status = status;
146 240
147 dwc3_unmap_buffer_from_dma(req); 241 usb_gadget_unmap_request(&dwc->gadget, &req->request,
242 req->direction);
148 243
149 dev_dbg(dwc->dev, "request %p from %s completed %d/%d ===> %d\n", 244 dev_dbg(dwc->dev, "request %p from %s completed %d/%d ===> %d\n",
150 req, dep->name, req->request.actual, 245 req, dep->name, req->request.actual,
151 req->request.length, status); 246 req->request.length, status);
152 247
153 spin_unlock(&dwc->lock); 248 spin_unlock(&dwc->lock);
154 req->request.complete(&req->dep->endpoint, &req->request); 249 req->request.complete(&dep->endpoint, &req->request);
155 spin_lock(&dwc->lock); 250 spin_lock(&dwc->lock);
156} 251}
157 252
@@ -219,7 +314,7 @@ int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
219} 314}
220 315
221static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep, 316static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,
222 struct dwc3_trb_hw *trb) 317 struct dwc3_trb *trb)
223{ 318{
224 u32 offset = (char *) trb - (char *) dep->trb_pool; 319 u32 offset = (char *) trb - (char *) dep->trb_pool;
225 320
@@ -368,9 +463,8 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
368 return ret; 463 return ret;
369 464
370 if (!(dep->flags & DWC3_EP_ENABLED)) { 465 if (!(dep->flags & DWC3_EP_ENABLED)) {
371 struct dwc3_trb_hw *trb_st_hw; 466 struct dwc3_trb *trb_st_hw;
372 struct dwc3_trb_hw *trb_link_hw; 467 struct dwc3_trb *trb_link;
373 struct dwc3_trb trb_link;
374 468
375 ret = dwc3_gadget_set_xfer_resource(dwc, dep); 469 ret = dwc3_gadget_set_xfer_resource(dwc, dep);
376 if (ret) 470 if (ret)
@@ -390,15 +484,15 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
390 484
391 memset(&trb_link, 0, sizeof(trb_link)); 485 memset(&trb_link, 0, sizeof(trb_link));
392 486
393 /* Link TRB for ISOC. The HWO but is never reset */ 487 /* Link TRB for ISOC. The HWO bit is never reset */
394 trb_st_hw = &dep->trb_pool[0]; 488 trb_st_hw = &dep->trb_pool[0];
395 489
396 trb_link.bplh = dwc3_trb_dma_offset(dep, trb_st_hw); 490 trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1];
397 trb_link.trbctl = DWC3_TRBCTL_LINK_TRB;
398 trb_link.hwo = true;
399 491
400 trb_link_hw = &dep->trb_pool[DWC3_TRB_NUM - 1]; 492 trb_link->bpl = lower_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
401 dwc3_trb_to_hw(&trb_link, trb_link_hw); 493 trb_link->bph = upper_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
494 trb_link->ctrl |= DWC3_TRBCTL_LINK_TRB;
495 trb_link->ctrl |= DWC3_TRB_CTRL_HWO;
402 } 496 }
403 497
404 return 0; 498 return 0;
@@ -440,6 +534,7 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
440 534
441 dep->stream_capable = false; 535 dep->stream_capable = false;
442 dep->desc = NULL; 536 dep->desc = NULL;
537 dep->endpoint.desc = NULL;
443 dep->comp_desc = NULL; 538 dep->comp_desc = NULL;
444 dep->type = 0; 539 dep->type = 0;
445 dep->flags = 0; 540 dep->flags = 0;
@@ -485,16 +580,16 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
485 580
486 switch (usb_endpoint_type(desc)) { 581 switch (usb_endpoint_type(desc)) {
487 case USB_ENDPOINT_XFER_CONTROL: 582 case USB_ENDPOINT_XFER_CONTROL:
488 strncat(dep->name, "-control", sizeof(dep->name)); 583 strlcat(dep->name, "-control", sizeof(dep->name));
489 break; 584 break;
490 case USB_ENDPOINT_XFER_ISOC: 585 case USB_ENDPOINT_XFER_ISOC:
491 strncat(dep->name, "-isoc", sizeof(dep->name)); 586 strlcat(dep->name, "-isoc", sizeof(dep->name));
492 break; 587 break;
493 case USB_ENDPOINT_XFER_BULK: 588 case USB_ENDPOINT_XFER_BULK:
494 strncat(dep->name, "-bulk", sizeof(dep->name)); 589 strlcat(dep->name, "-bulk", sizeof(dep->name));
495 break; 590 break;
496 case USB_ENDPOINT_XFER_INT: 591 case USB_ENDPOINT_XFER_INT:
497 strncat(dep->name, "-int", sizeof(dep->name)); 592 strlcat(dep->name, "-int", sizeof(dep->name));
498 break; 593 break;
499 default: 594 default:
500 dev_err(dwc->dev, "invalid endpoint transfer type\n"); 595 dev_err(dwc->dev, "invalid endpoint transfer type\n");
@@ -562,7 +657,6 @@ static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep,
562 657
563 req->epnum = dep->number; 658 req->epnum = dep->number;
564 req->dep = dep; 659 req->dep = dep;
565 req->request.dma = DMA_ADDR_INVALID;
566 660
567 return &req->request; 661 return &req->request;
568} 662}
@@ -585,8 +679,7 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
585 unsigned length, unsigned last, unsigned chain) 679 unsigned length, unsigned last, unsigned chain)
586{ 680{
587 struct dwc3 *dwc = dep->dwc; 681 struct dwc3 *dwc = dep->dwc;
588 struct dwc3_trb_hw *trb_hw; 682 struct dwc3_trb *trb;
589 struct dwc3_trb trb;
590 683
591 unsigned int cur_slot; 684 unsigned int cur_slot;
592 685
@@ -595,7 +688,7 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
595 length, last ? " last" : "", 688 length, last ? " last" : "",
596 chain ? " chain" : ""); 689 chain ? " chain" : "");
597 690
598 trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK]; 691 trb = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK];
599 cur_slot = dep->free_slot; 692 cur_slot = dep->free_slot;
600 dep->free_slot++; 693 dep->free_slot++;
601 694
@@ -604,40 +697,32 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
604 usb_endpoint_xfer_isoc(dep->desc)) 697 usb_endpoint_xfer_isoc(dep->desc))
605 return; 698 return;
606 699
607 memset(&trb, 0, sizeof(trb));
608 if (!req->trb) { 700 if (!req->trb) {
609 dwc3_gadget_move_request_queued(req); 701 dwc3_gadget_move_request_queued(req);
610 req->trb = trb_hw; 702 req->trb = trb;
611 req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw); 703 req->trb_dma = dwc3_trb_dma_offset(dep, trb);
612 } 704 }
613 705
614 if (usb_endpoint_xfer_isoc(dep->desc)) { 706 trb->size = DWC3_TRB_SIZE_LENGTH(length);
615 trb.isp_imi = true; 707 trb->bpl = lower_32_bits(dma);
616 trb.csp = true; 708 trb->bph = upper_32_bits(dma);
617 } else {
618 trb.chn = chain;
619 trb.lst = last;
620 }
621
622 if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable)
623 trb.sid_sofn = req->request.stream_id;
624 709
625 switch (usb_endpoint_type(dep->desc)) { 710 switch (usb_endpoint_type(dep->desc)) {
626 case USB_ENDPOINT_XFER_CONTROL: 711 case USB_ENDPOINT_XFER_CONTROL:
627 trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP; 712 trb->ctrl = DWC3_TRBCTL_CONTROL_SETUP;
628 break; 713 break;
629 714
630 case USB_ENDPOINT_XFER_ISOC: 715 case USB_ENDPOINT_XFER_ISOC:
631 trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST; 716 trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
632 717
633 /* IOC every DWC3_TRB_NUM / 4 so we can refill */ 718 /* IOC every DWC3_TRB_NUM / 4 so we can refill */
634 if (!(cur_slot % (DWC3_TRB_NUM / 4))) 719 if (!(cur_slot % (DWC3_TRB_NUM / 4)))
635 trb.ioc = last; 720 trb->ctrl |= DWC3_TRB_CTRL_IOC;
636 break; 721 break;
637 722
638 case USB_ENDPOINT_XFER_BULK: 723 case USB_ENDPOINT_XFER_BULK:
639 case USB_ENDPOINT_XFER_INT: 724 case USB_ENDPOINT_XFER_INT:
640 trb.trbctl = DWC3_TRBCTL_NORMAL; 725 trb->ctrl = DWC3_TRBCTL_NORMAL;
641 break; 726 break;
642 default: 727 default:
643 /* 728 /*
@@ -647,11 +732,21 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
647 BUG(); 732 BUG();
648 } 733 }
649 734
650 trb.length = length; 735 if (usb_endpoint_xfer_isoc(dep->desc)) {
651 trb.bplh = dma; 736 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
652 trb.hwo = true; 737 trb->ctrl |= DWC3_TRB_CTRL_CSP;
738 } else {
739 if (chain)
740 trb->ctrl |= DWC3_TRB_CTRL_CHN;
741
742 if (last)
743 trb->ctrl |= DWC3_TRB_CTRL_LST;
744 }
653 745
654 dwc3_trb_to_hw(&trb, trb_hw); 746 if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable)
747 trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(req->request.stream_id);
748
749 trb->ctrl |= DWC3_TRB_CTRL_HWO;
655} 750}
656 751
657/* 752/*
@@ -659,14 +754,15 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
659 * @dep: endpoint for which requests are being prepared 754 * @dep: endpoint for which requests are being prepared
660 * @starting: true if the endpoint is idle and no requests are queued. 755 * @starting: true if the endpoint is idle and no requests are queued.
661 * 756 *
662 * The functions goes through the requests list and setups TRBs for the 757 * The function goes through the requests list and sets up TRBs for the
663 * transfers. The functions returns once there are not more TRBs available or 758 * transfers. The function returns once there are no more TRBs available or
664 * it run out of requests. 759 * it runs out of requests.
665 */ 760 */
666static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting) 761static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
667{ 762{
668 struct dwc3_request *req, *n; 763 struct dwc3_request *req, *n;
669 u32 trbs_left; 764 u32 trbs_left;
765 u32 max;
670 unsigned int last_one = 0; 766 unsigned int last_one = 0;
671 767
672 BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM); 768 BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
@@ -674,9 +770,16 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
674 /* the first request must not be queued */ 770 /* the first request must not be queued */
675 trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK; 771 trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK;
676 772
773 /* Can't wrap around on a non-isoc EP since there's no link TRB */
774 if (!usb_endpoint_xfer_isoc(dep->desc)) {
775 max = DWC3_TRB_NUM - (dep->free_slot & DWC3_TRB_MASK);
776 if (trbs_left > max)
777 trbs_left = max;
778 }
779
677 /* 780 /*
678 * if busy & slot are equal than it is either full or empty. If we are 781 * If busy & slot are equal than it is either full or empty. If we are
679 * starting to proceed requests then we are empty. Otherwise we ar 782 * starting to process requests then we are empty. Otherwise we are
680 * full and don't do anything 783 * full and don't do anything
681 */ 784 */
682 if (!trbs_left) { 785 if (!trbs_left) {
@@ -687,7 +790,7 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
687 * In case we start from scratch, we queue the ISOC requests 790 * In case we start from scratch, we queue the ISOC requests
688 * starting from slot 1. This is done because we use ring 791 * starting from slot 1. This is done because we use ring
689 * buffer and have no LST bit to stop us. Instead, we place 792 * buffer and have no LST bit to stop us. Instead, we place
690 * IOC bit TRB_NUM/4. We try to avoid to having an interrupt 793 * IOC bit every TRB_NUM/4. We try to avoid having an interrupt
691 * after the first request so we start at slot 1 and have 794 * after the first request so we start at slot 1 and have
692 * 7 requests proceed before we hit the first IOC. 795 * 7 requests proceed before we hit the first IOC.
693 * Other transfer types don't use the ring buffer and are 796 * Other transfer types don't use the ring buffer and are
@@ -723,8 +826,8 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
723 length = sg_dma_len(s); 826 length = sg_dma_len(s);
724 dma = sg_dma_address(s); 827 dma = sg_dma_address(s);
725 828
726 if (i == (request->num_mapped_sgs - 1) 829 if (i == (request->num_mapped_sgs - 1) ||
727 || sg_is_last(s)) { 830 sg_is_last(s)) {
728 last_one = true; 831 last_one = true;
729 chain = false; 832 chain = false;
730 } 833 }
@@ -792,8 +895,7 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
792 dwc3_prepare_trbs(dep, start_new); 895 dwc3_prepare_trbs(dep, start_new);
793 896
794 /* 897 /*
795 * req points to the first request where HWO changed 898 * req points to the first request where HWO changed from 0 to 1
796 * from 0 to 1
797 */ 899 */
798 req = next_request(&dep->req_queued); 900 req = next_request(&dep->req_queued);
799 } 901 }
@@ -819,9 +921,10 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
819 /* 921 /*
820 * FIXME we need to iterate over the list of requests 922 * FIXME we need to iterate over the list of requests
821 * here and stop, unmap, free and del each of the linked 923 * here and stop, unmap, free and del each of the linked
822 * requests instead of we do now. 924 * requests instead of what we do now.
823 */ 925 */
824 dwc3_unmap_buffer_from_dma(req); 926 usb_gadget_unmap_request(&dwc->gadget, &req->request,
927 req->direction);
825 list_del(&req->list); 928 list_del(&req->list);
826 return ret; 929 return ret;
827 } 930 }
@@ -837,6 +940,9 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
837 940
838static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) 941static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
839{ 942{
943 struct dwc3 *dwc = dep->dwc;
944 int ret;
945
840 req->request.actual = 0; 946 req->request.actual = 0;
841 req->request.status = -EINPROGRESS; 947 req->request.status = -EINPROGRESS;
842 req->direction = dep->direction; 948 req->direction = dep->direction;
@@ -852,9 +958,13 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
852 * particular token from the Host side. 958 * particular token from the Host side.
853 * 959 *
854 * This will also avoid Host cancelling URBs due to too 960 * This will also avoid Host cancelling URBs due to too
855 * many NACKs. 961 * many NAKs.
856 */ 962 */
857 dwc3_map_buffer_to_dma(req); 963 ret = usb_gadget_map_request(&dwc->gadget, &req->request,
964 dep->direction);
965 if (ret)
966 return ret;
967
858 list_add_tail(&req->list, &dep->request_list); 968 list_add_tail(&req->list, &dep->request_list);
859 969
860 /* 970 /*
@@ -874,11 +984,11 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
874 int start_trans; 984 int start_trans;
875 985
876 start_trans = 1; 986 start_trans = 1;
877 if (usb_endpoint_xfer_isoc(dep->endpoint.desc) && 987 if (usb_endpoint_xfer_isoc(dep->desc) &&
878 dep->flags & DWC3_EP_BUSY) 988 (dep->flags & DWC3_EP_BUSY))
879 start_trans = 0; 989 start_trans = 0;
880 990
881 ret = __dwc3_gadget_kick_transfer(dep, 0, start_trans); 991 ret = __dwc3_gadget_kick_transfer(dep, 0, start_trans);
882 if (ret && ret != -EBUSY) { 992 if (ret && ret != -EBUSY) {
883 struct dwc3 *dwc = dep->dwc; 993 struct dwc3 *dwc = dep->dwc;
884 994
@@ -1031,8 +1141,12 @@ out:
1031static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep) 1141static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
1032{ 1142{
1033 struct dwc3_ep *dep = to_dwc3_ep(ep); 1143 struct dwc3_ep *dep = to_dwc3_ep(ep);
1144 struct dwc3 *dwc = dep->dwc;
1145 unsigned long flags;
1034 1146
1147 spin_lock_irqsave(&dwc->lock, flags);
1035 dep->flags |= DWC3_EP_WEDGE; 1148 dep->flags |= DWC3_EP_WEDGE;
1149 spin_unlock_irqrestore(&dwc->lock, flags);
1036 1150
1037 return dwc3_gadget_ep_set_halt(ep, 1); 1151 return dwc3_gadget_ep_set_halt(ep, 1);
1038} 1152}
@@ -1122,26 +1236,20 @@ static int dwc3_gadget_wakeup(struct usb_gadget *g)
1122 goto out; 1236 goto out;
1123 } 1237 }
1124 1238
1125 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 1239 ret = dwc3_gadget_set_link_state(dwc, DWC3_LINK_STATE_RECOV);
1126 1240 if (ret < 0) {
1127 /* 1241 dev_err(dwc->dev, "failed to put link in Recovery\n");
1128 * Switch link state to Recovery. In HS/FS/LS this means 1242 goto out;
1129 * RemoteWakeup Request 1243 }
1130 */
1131 reg |= DWC3_DCTL_ULSTCHNG_RECOVERY;
1132 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1133
1134 /* wait for at least 2000us */
1135 usleep_range(2000, 2500);
1136 1244
1137 /* write zeroes to Link Change Request */ 1245 /* write zeroes to Link Change Request */
1138 reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK; 1246 reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
1139 dwc3_writel(dwc->regs, DWC3_DCTL, reg); 1247 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1140 1248
1141 /* pool until Link State change to ON */ 1249 /* poll until Link State changes to ON */
1142 timeout = jiffies + msecs_to_jiffies(100); 1250 timeout = jiffies + msecs_to_jiffies(100);
1143 1251
1144 while (!(time_after(jiffies, timeout))) { 1252 while (!time_after(jiffies, timeout)) {
1145 reg = dwc3_readl(dwc->regs, DWC3_DSTS); 1253 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1146 1254
1147 /* in HS, means ON */ 1255 /* in HS, means ON */
@@ -1164,8 +1272,11 @@ static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
1164 int is_selfpowered) 1272 int is_selfpowered)
1165{ 1273{
1166 struct dwc3 *dwc = gadget_to_dwc(g); 1274 struct dwc3 *dwc = gadget_to_dwc(g);
1275 unsigned long flags;
1167 1276
1277 spin_lock_irqsave(&dwc->lock, flags);
1168 dwc->is_selfpowered = !!is_selfpowered; 1278 dwc->is_selfpowered = !!is_selfpowered;
1279 spin_unlock_irqrestore(&dwc->lock, flags);
1169 1280
1170 return 0; 1281 return 0;
1171} 1282}
@@ -1176,10 +1287,13 @@ static void dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on)
1176 u32 timeout = 500; 1287 u32 timeout = 500;
1177 1288
1178 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 1289 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1179 if (is_on) 1290 if (is_on) {
1180 reg |= DWC3_DCTL_RUN_STOP; 1291 reg &= ~DWC3_DCTL_TRGTULST_MASK;
1181 else 1292 reg |= (DWC3_DCTL_RUN_STOP
1293 | DWC3_DCTL_TRGTULST_RX_DET);
1294 } else {
1182 reg &= ~DWC3_DCTL_RUN_STOP; 1295 reg &= ~DWC3_DCTL_RUN_STOP;
1296 }
1183 1297
1184 dwc3_writel(dwc->regs, DWC3_DCTL, reg); 1298 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1185 1299
@@ -1386,7 +1500,7 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1386 const struct dwc3_event_depevt *event, int status) 1500 const struct dwc3_event_depevt *event, int status)
1387{ 1501{
1388 struct dwc3_request *req; 1502 struct dwc3_request *req;
1389 struct dwc3_trb trb; 1503 struct dwc3_trb *trb;
1390 unsigned int count; 1504 unsigned int count;
1391 unsigned int s_pkt = 0; 1505 unsigned int s_pkt = 0;
1392 1506
@@ -1397,20 +1511,20 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1397 return 1; 1511 return 1;
1398 } 1512 }
1399 1513
1400 dwc3_trb_to_nat(req->trb, &trb); 1514 trb = req->trb;
1401 1515
1402 if (trb.hwo && status != -ESHUTDOWN) 1516 if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN)
1403 /* 1517 /*
1404 * We continue despite the error. There is not much we 1518 * We continue despite the error. There is not much we
1405 * can do. If we don't clean in up we loop for ever. If 1519 * can do. If we don't clean it up we loop forever. If
1406 * we skip the TRB than it gets overwritten reused after 1520 * we skip the TRB then it gets overwritten after a
1407 * a while since we use them in a ring buffer. a BUG() 1521 * while since we use them in a ring buffer. A BUG()
1408 * would help. Lets hope that if this occures, someone 1522 * would help. Lets hope that if this occurs, someone
1409 * fixes the root cause instead of looking away :) 1523 * fixes the root cause instead of looking away :)
1410 */ 1524 */
1411 dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n", 1525 dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
1412 dep->name, req->trb); 1526 dep->name, req->trb);
1413 count = trb.length; 1527 count = trb->size & DWC3_TRB_SIZE_MASK;
1414 1528
1415 if (dep->direction) { 1529 if (dep->direction) {
1416 if (count) { 1530 if (count) {
@@ -1434,13 +1548,16 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1434 dwc3_gadget_giveback(dep, req, status); 1548 dwc3_gadget_giveback(dep, req, status);
1435 if (s_pkt) 1549 if (s_pkt)
1436 break; 1550 break;
1437 if ((event->status & DEPEVT_STATUS_LST) && trb.lst) 1551 if ((event->status & DEPEVT_STATUS_LST) &&
1552 (trb->ctrl & DWC3_TRB_CTRL_LST))
1438 break; 1553 break;
1439 if ((event->status & DEPEVT_STATUS_IOC) && trb.ioc) 1554 if ((event->status & DEPEVT_STATUS_IOC) &&
1555 (trb->ctrl & DWC3_TRB_CTRL_IOC))
1440 break; 1556 break;
1441 } while (1); 1557 } while (1);
1442 1558
1443 if ((event->status & DEPEVT_STATUS_IOC) && trb.ioc) 1559 if ((event->status & DEPEVT_STATUS_IOC) &&
1560 (trb->ctrl & DWC3_TRB_CTRL_IOC))
1444 return 0; 1561 return 0;
1445 return 1; 1562 return 1;
1446} 1563}
@@ -1455,11 +1572,9 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
1455 if (event->status & DEPEVT_STATUS_BUSERR) 1572 if (event->status & DEPEVT_STATUS_BUSERR)
1456 status = -ECONNRESET; 1573 status = -ECONNRESET;
1457 1574
1458 clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status); 1575 clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
1459 if (clean_busy) { 1576 if (clean_busy)
1460 dep->flags &= ~DWC3_EP_BUSY; 1577 dep->flags &= ~DWC3_EP_BUSY;
1461 dep->res_trans_idx = 0;
1462 }
1463 1578
1464 /* 1579 /*
1465 * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround. 1580 * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround.
@@ -1490,7 +1605,7 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
1490static void dwc3_gadget_start_isoc(struct dwc3 *dwc, 1605static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
1491 struct dwc3_ep *dep, const struct dwc3_event_depevt *event) 1606 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
1492{ 1607{
1493 u32 uf; 1608 u32 uf, mask;
1494 1609
1495 if (list_empty(&dep->request_list)) { 1610 if (list_empty(&dep->request_list)) {
1496 dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n", 1611 dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n",
@@ -1498,16 +1613,10 @@ static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
1498 return; 1613 return;
1499 } 1614 }
1500 1615
1501 if (event->parameters) { 1616 mask = ~(dep->interval - 1);
1502 u32 mask; 1617 uf = event->parameters & mask;
1503 1618 /* 4 micro frames in the future */
1504 mask = ~(dep->interval - 1); 1619 uf += dep->interval * 4;
1505 uf = event->parameters & mask;
1506 /* 4 micro frames in the future */
1507 uf += dep->interval * 4;
1508 } else {
1509 uf = 0;
1510 }
1511 1620
1512 __dwc3_gadget_kick_transfer(dep, uf, 1); 1621 __dwc3_gadget_kick_transfer(dep, uf, 1);
1513} 1622}
@@ -1519,8 +1628,8 @@ static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep,
1519 struct dwc3_event_depevt mod_ev = *event; 1628 struct dwc3_event_depevt mod_ev = *event;
1520 1629
1521 /* 1630 /*
1522 * We were asked to remove one requests. It is possible that this 1631 * We were asked to remove one request. It is possible that this
1523 * request and a few other were started together and have the same 1632 * request and a few others were started together and have the same
1524 * transfer index. Since we stopped the complete endpoint we don't 1633 * transfer index. Since we stopped the complete endpoint we don't
1525 * know how many requests were already completed (and not yet) 1634 * know how many requests were already completed (and not yet)
1526 * reported and how could be done (later). We purge them all until 1635 * reported and how could be done (later). We purge them all until
@@ -1529,7 +1638,7 @@ static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep,
1529 mod_ev.status = DEPEVT_STATUS_LST; 1638 mod_ev.status = DEPEVT_STATUS_LST;
1530 dwc3_cleanup_done_reqs(dwc, dep, &mod_ev, -ESHUTDOWN); 1639 dwc3_cleanup_done_reqs(dwc, dep, &mod_ev, -ESHUTDOWN);
1531 dep->flags &= ~DWC3_EP_BUSY; 1640 dep->flags &= ~DWC3_EP_BUSY;
1532 /* pending requets are ignored and are queued on XferNotReady */ 1641 /* pending requests are ignored and are queued on XferNotReady */
1533} 1642}
1534 1643
1535static void dwc3_ep_cmd_compl(struct dwc3_ep *dep, 1644static void dwc3_ep_cmd_compl(struct dwc3_ep *dep,
@@ -1570,6 +1679,8 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
1570 1679
1571 switch (event->endpoint_event) { 1680 switch (event->endpoint_event) {
1572 case DWC3_DEPEVT_XFERCOMPLETE: 1681 case DWC3_DEPEVT_XFERCOMPLETE:
1682 dep->res_trans_idx = 0;
1683
1573 if (usb_endpoint_xfer_isoc(dep->desc)) { 1684 if (usb_endpoint_xfer_isoc(dep->desc)) {
1574 dev_dbg(dwc->dev, "%s is an Isochronous endpoint\n", 1685 dev_dbg(dwc->dev, "%s is an Isochronous endpoint\n",
1575 dep->name); 1686 dep->name);
@@ -1594,7 +1705,8 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
1594 int ret; 1705 int ret;
1595 1706
1596 dev_vdbg(dwc->dev, "%s: reason %s\n", 1707 dev_vdbg(dwc->dev, "%s: reason %s\n",
1597 dep->name, event->status 1708 dep->name, event->status &
1709 DEPEVT_STATUS_TRANSFER_ACTIVE
1598 ? "Transfer Active" 1710 ? "Transfer Active"
1599 : "Transfer Not Active"); 1711 : "Transfer Not Active");
1600 1712
@@ -1805,6 +1917,7 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
1805 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 1917 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1806 reg &= ~DWC3_DCTL_TSTCTRL_MASK; 1918 reg &= ~DWC3_DCTL_TSTCTRL_MASK;
1807 dwc3_writel(dwc->regs, DWC3_DCTL, reg); 1919 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1920 dwc->test_mode = false;
1808 1921
1809 dwc3_stop_active_transfers(dwc); 1922 dwc3_stop_active_transfers(dwc);
1810 dwc3_clear_stall_all_ep(dwc); 1923 dwc3_clear_stall_all_ep(dwc);
@@ -2082,7 +2195,8 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf)
2082 while (left > 0) { 2195 while (left > 0) {
2083 union dwc3_event event; 2196 union dwc3_event event;
2084 2197
2085 memcpy(&event.raw, (evt->buf + evt->lpos), sizeof(event.raw)); 2198 event.raw = *(u32 *) (evt->buf + evt->lpos);
2199
2086 dwc3_process_event_entry(dwc, &event); 2200 dwc3_process_event_entry(dwc, &event);
2087 /* 2201 /*
2088 * XXX we wrap around correctly to the next entry as almost all 2202 * XXX we wrap around correctly to the next entry as almost all
@@ -2123,7 +2237,7 @@ static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
2123 2237
2124/** 2238/**
2125 * dwc3_gadget_init - Initializes gadget related registers 2239 * dwc3_gadget_init - Initializes gadget related registers
2126 * @dwc: Pointer to out controller context structure 2240 * @dwc: pointer to our controller context structure
2127 * 2241 *
2128 * Returns 0 on success otherwise negative errno. 2242 * Returns 0 on success otherwise negative errno.
2129 */ 2243 */
@@ -2149,9 +2263,8 @@ int __devinit dwc3_gadget_init(struct dwc3 *dwc)
2149 goto err1; 2263 goto err1;
2150 } 2264 }
2151 2265
2152 dwc->setup_buf = dma_alloc_coherent(dwc->dev, 2266 dwc->setup_buf = kzalloc(sizeof(*dwc->setup_buf) * 2,
2153 sizeof(*dwc->setup_buf) * 2, 2267 GFP_KERNEL);
2154 &dwc->setup_buf_addr, GFP_KERNEL);
2155 if (!dwc->setup_buf) { 2268 if (!dwc->setup_buf) {
2156 dev_err(dwc->dev, "failed to allocate setup buffer\n"); 2269 dev_err(dwc->dev, "failed to allocate setup buffer\n");
2157 ret = -ENOMEM; 2270 ret = -ENOMEM;
@@ -2242,8 +2355,7 @@ err4:
2242 dwc->ep0_bounce_addr); 2355 dwc->ep0_bounce_addr);
2243 2356
2244err3: 2357err3:
2245 dma_free_coherent(dwc->dev, sizeof(*dwc->setup_buf) * 2, 2358 kfree(dwc->setup_buf);
2246 dwc->setup_buf, dwc->setup_buf_addr);
2247 2359
2248err2: 2360err2:
2249 dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb), 2361 dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
@@ -2272,8 +2384,7 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
2272 dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce, 2384 dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce,
2273 dwc->ep0_bounce_addr); 2385 dwc->ep0_bounce_addr);
2274 2386
2275 dma_free_coherent(dwc->dev, sizeof(*dwc->setup_buf) * 2, 2387 kfree(dwc->setup_buf);
2276 dwc->setup_buf, dwc->setup_buf_addr);
2277 2388
2278 dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb), 2389 dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2279 dwc->ep0_trb, dwc->ep0_trb_addr); 2390 dwc->ep0_trb, dwc->ep0_trb_addr);