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authorLi Jun <b47624@freescale.com>2015-03-20 04:28:06 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-03-26 05:54:39 -0400
commit3a316ec4c91cfe03093d708369f9ab57000c96c3 (patch)
tree9fd2cc1d5b86975c492411b0e67ace78519c64c5 /drivers/usb/chipidea
parent2f8a467a11aeec61f5077cd337b4efe74847e1d3 (diff)
usb: chipidea: use hrtimer for otg fsm timers
Current otg fsm timers are using controller 1ms irq and count it, this patch is to replace it with hrtimer solution, use one hrtimer for all otg timers. Signed-off-by: Li Jun <jun.li@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/chipidea')
-rw-r--r--drivers/usb/chipidea/ci.h10
-rw-r--r--drivers/usb/chipidea/otg_fsm.c364
-rw-r--r--drivers/usb/chipidea/otg_fsm.h13
3 files changed, 190 insertions, 197 deletions
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index c09381d4ca77..6d6200e37b71 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -162,7 +162,10 @@ struct hw_bank {
162 * @role: current role 162 * @role: current role
163 * @is_otg: if the device is otg-capable 163 * @is_otg: if the device is otg-capable
164 * @fsm: otg finite state machine 164 * @fsm: otg finite state machine
165 * @fsm_timer: pointer to timer list of otg fsm 165 * @otg_fsm_hrtimer: hrtimer for otg fsm timers
166 * @hr_timeouts: time out list for active otg fsm timers
167 * @enabled_otg_timer_bits: bits of enabled otg timers
168 * @next_otg_timer: next nearest enabled timer to be expired
166 * @work: work for role changing 169 * @work: work for role changing
167 * @wq: workqueue thread 170 * @wq: workqueue thread
168 * @qh_pool: allocation pool for queue heads 171 * @qh_pool: allocation pool for queue heads
@@ -205,7 +208,10 @@ struct ci_hdrc {
205 bool is_otg; 208 bool is_otg;
206 struct usb_otg otg; 209 struct usb_otg otg;
207 struct otg_fsm fsm; 210 struct otg_fsm fsm;
208 struct ci_otg_fsm_timer_list *fsm_timer; 211 struct hrtimer otg_fsm_hrtimer;
212 ktime_t hr_timeouts[NUM_OTG_FSM_TIMERS];
213 unsigned enabled_otg_timer_bits;
214 enum otg_fsm_timer next_otg_timer;
209 struct work_struct work; 215 struct work_struct work;
210 struct workqueue_struct *wq; 216 struct workqueue_struct *wq;
211 217
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index ba2cb91cb790..083acf45ad5a 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -30,22 +30,6 @@
30#include "otg.h" 30#include "otg.h"
31#include "otg_fsm.h" 31#include "otg_fsm.h"
32 32
33static struct ci_otg_fsm_timer *otg_timer_initializer
34(struct ci_hdrc *ci, void (*function)(void *, unsigned long),
35 unsigned long expires, unsigned long data)
36{
37 struct ci_otg_fsm_timer *timer;
38
39 timer = devm_kzalloc(ci->dev, sizeof(struct ci_otg_fsm_timer),
40 GFP_KERNEL);
41 if (!timer)
42 return NULL;
43 timer->function = function;
44 timer->expires = expires;
45 timer->data = data;
46 return timer;
47}
48
49/* Add for otg: interact with user space app */ 33/* Add for otg: interact with user space app */
50static ssize_t 34static ssize_t
51get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf) 35get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
@@ -204,36 +188,48 @@ static struct attribute_group inputs_attr_group = {
204}; 188};
205 189
206/* 190/*
191 * Keep this list in the same order as timers indexed
192 * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
193 */
194static unsigned otg_timer_ms[] = {
195 TA_WAIT_VRISE,
196 TA_WAIT_VFALL,
197 TA_WAIT_BCON,
198 TA_AIDL_BDIS,
199 TB_ASE0_BRST,
200 TA_BIDL_ADIS,
201 TB_SE0_SRP,
202 TB_SRP_FAIL,
203 0,
204 TB_DATA_PLS,
205 TB_SSEND_SRP,
206};
207
208/*
207 * Add timer to active timer list 209 * Add timer to active timer list
208 */ 210 */
209static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t) 211static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
210{ 212{
211 struct ci_otg_fsm_timer *tmp_timer; 213 unsigned long flags, timer_sec, timer_nsec;
212 struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
213 struct list_head *active_timers = &ci->fsm_timer->active_timers;
214 214
215 if (t >= NUM_OTG_FSM_TIMERS) 215 if (t >= NUM_OTG_FSM_TIMERS)
216 return; 216 return;
217 217
218 /* 218 spin_lock_irqsave(&ci->lock, flags);
219 * Check if the timer is already in the active list, 219 timer_sec = otg_timer_ms[t] / MSEC_PER_SEC;
220 * if so update timer count 220 timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC;
221 */ 221 ci->hr_timeouts[t] = ktime_add(ktime_get(),
222 list_for_each_entry(tmp_timer, active_timers, list) 222 ktime_set(timer_sec, timer_nsec));
223 if (tmp_timer == timer) { 223 ci->enabled_otg_timer_bits |= (1 << t);
224 timer->count = timer->expires; 224 if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) ||
225 return; 225 (ci->hr_timeouts[ci->next_otg_timer].tv64 >
226 } 226 ci->hr_timeouts[t].tv64)) {
227 227 ci->next_otg_timer = t;
228 if (list_empty(active_timers)) 228 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
229 pm_runtime_get(ci->dev); 229 ci->hr_timeouts[t], NSEC_PER_MSEC,
230 230 HRTIMER_MODE_ABS);
231 timer->count = timer->expires; 231 }
232 list_add_tail(&timer->list, active_timers); 232 spin_unlock_irqrestore(&ci->lock, flags);
233
234 /* Enable 1ms irq */
235 if (!(hw_read_otgsc(ci, OTGSC_1MSIE)))
236 hw_write_otgsc(ci, OTGSC_1MSIE, OTGSC_1MSIE);
237} 233}
238 234
239/* 235/*
@@ -241,174 +237,178 @@ static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
241 */ 237 */
242static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t) 238static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
243{ 239{
244 struct ci_otg_fsm_timer *tmp_timer, *del_tmp; 240 unsigned long flags, enabled_timer_bits;
245 struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t]; 241 enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
246 struct list_head *active_timers = &ci->fsm_timer->active_timers;
247 int flag = 0;
248 242
249 if (t >= NUM_OTG_FSM_TIMERS) 243 if ((t >= NUM_OTG_FSM_TIMERS) ||
244 !(ci->enabled_otg_timer_bits & (1 << t)))
250 return; 245 return;
251 246
252 list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list) 247 spin_lock_irqsave(&ci->lock, flags);
253 if (tmp_timer == timer) { 248 ci->enabled_otg_timer_bits &= ~(1 << t);
254 list_del(&timer->list); 249 if (ci->next_otg_timer == t) {
255 flag = 1; 250 if (ci->enabled_otg_timer_bits == 0) {
256 } 251 /* No enabled timers after delete it */
257 252 hrtimer_cancel(&ci->otg_fsm_hrtimer);
258 /* Disable 1ms irq if there is no any active timer */ 253 ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
259 if (list_empty(active_timers) && (flag == 1)) { 254 } else {
260 hw_write_otgsc(ci, OTGSC_1MSIE, 0); 255 /* Find the next timer */
261 pm_runtime_put(ci->dev); 256 enabled_timer_bits = ci->enabled_otg_timer_bits;
262 } 257 for_each_set_bit(cur_timer, &enabled_timer_bits,
263} 258 NUM_OTG_FSM_TIMERS) {
264 259 if ((next_timer == NUM_OTG_FSM_TIMERS) ||
265/* 260 (ci->hr_timeouts[next_timer].tv64 <
266 * Reduce timer count by 1, and find timeout conditions. 261 ci->hr_timeouts[cur_timer].tv64))
267 * Called by otg 1ms timer interrupt 262 next_timer = cur_timer;
268 */ 263 }
269static inline int ci_otg_tick_timer(struct ci_hdrc *ci)
270{
271 struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
272 struct list_head *active_timers = &ci->fsm_timer->active_timers;
273 int expired = 0;
274
275 list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list) {
276 tmp_timer->count--;
277 /* check if timer expires */
278 if (!tmp_timer->count) {
279 list_del(&tmp_timer->list);
280 tmp_timer->function(ci, tmp_timer->data);
281 expired = 1;
282 } 264 }
283 } 265 }
284 266 if (next_timer != NUM_OTG_FSM_TIMERS) {
285 /* disable 1ms irq if there is no any timer active */ 267 ci->next_otg_timer = next_timer;
286 if ((expired == 1) && list_empty(active_timers)) { 268 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
287 hw_write_otgsc(ci, OTGSC_1MSIE, 0); 269 ci->hr_timeouts[next_timer], NSEC_PER_MSEC,
288 pm_runtime_put(ci->dev); 270 HRTIMER_MODE_ABS);
289 } 271 }
290 272 spin_unlock_irqrestore(&ci->lock, flags);
291 return expired;
292} 273}
293 274
294/* The timeout callback function to set time out bit */ 275/* OTG FSM timer handlers */
295static void set_tmout(void *ptr, unsigned long indicator) 276static int a_wait_vrise_tmout(struct ci_hdrc *ci)
296{ 277{
297 *(int *)indicator = 1; 278 ci->fsm.a_wait_vrise_tmout = 1;
279 return 0;
298} 280}
299 281
300static void set_tmout_and_fsm(void *ptr, unsigned long indicator) 282static int a_wait_vfall_tmout(struct ci_hdrc *ci)
301{ 283{
302 struct ci_hdrc *ci = (struct ci_hdrc *)ptr; 284 ci->fsm.a_wait_vfall_tmout = 1;
303 285 return 0;
304 set_tmout(ci, indicator);
305
306 ci_otg_queue_work(ci);
307} 286}
308 287
309static void a_wait_vfall_tmout_func(void *ptr, unsigned long indicator) 288static int a_wait_bcon_tmout(struct ci_hdrc *ci)
310{ 289{
311 struct ci_hdrc *ci = (struct ci_hdrc *)ptr; 290 ci->fsm.a_wait_bcon_tmout = 1;
291 return 0;
292}
312 293
313 set_tmout(ci, indicator); 294static int a_aidl_bdis_tmout(struct ci_hdrc *ci)
314 /* Disable port power */ 295{
315 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0); 296 ci->fsm.a_aidl_bdis_tmout = 1;
316 /* Clear existing DP irq */ 297 return 0;
317 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
318 /* Enable data pulse irq */
319 hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
320 ci_otg_queue_work(ci);
321} 298}
322 299
323static void b_ssend_srp_tmout_func(void *ptr, unsigned long indicator) 300static int b_ase0_brst_tmout(struct ci_hdrc *ci)
324{ 301{
325 struct ci_hdrc *ci = (struct ci_hdrc *)ptr; 302 ci->fsm.b_ase0_brst_tmout = 1;
303 return 0;
304}
326 305
327 set_tmout(ci, indicator); 306static int a_bidl_adis_tmout(struct ci_hdrc *ci)
307{
308 ci->fsm.a_bidl_adis_tmout = 1;
309 return 0;
310}
328 311
329 /* only vbus fall below B_sess_vld in b_idle state */ 312static int b_se0_srp_tmout(struct ci_hdrc *ci)
330 if (ci->fsm.otg->state == OTG_STATE_B_IDLE) 313{
331 ci_otg_queue_work(ci); 314 ci->fsm.b_se0_srp = 1;
315 return 0;
332} 316}
333 317
334static void b_data_pulse_end(void *ptr, unsigned long indicator) 318static int b_srp_fail_tmout(struct ci_hdrc *ci)
335{ 319{
336 struct ci_hdrc *ci = (struct ci_hdrc *)ptr; 320 ci->fsm.b_srp_done = 1;
321 return 1;
322}
337 323
324static int b_data_pls_tmout(struct ci_hdrc *ci)
325{
338 ci->fsm.b_srp_done = 1; 326 ci->fsm.b_srp_done = 1;
339 ci->fsm.b_bus_req = 0; 327 ci->fsm.b_bus_req = 0;
340 if (ci->fsm.power_up) 328 if (ci->fsm.power_up)
341 ci->fsm.power_up = 0; 329 ci->fsm.power_up = 0;
342
343 hw_write_otgsc(ci, OTGSC_HABA, 0); 330 hw_write_otgsc(ci, OTGSC_HABA, 0);
331 pm_runtime_put(ci->dev);
332 return 0;
333}
344 334
345 ci_otg_queue_work(ci); 335static int b_ssend_srp_tmout(struct ci_hdrc *ci)
336{
337 ci->fsm.b_ssend_srp = 1;
338 /* only vbus fall below B_sess_vld in b_idle state */
339 if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
340 return 0;
341 else
342 return 1;
343}
344
345/*
346 * Keep this list in the same order as timers indexed
347 * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
348 */
349static int (*otg_timer_handlers[])(struct ci_hdrc *) = {
350 a_wait_vrise_tmout, /* A_WAIT_VRISE */
351 a_wait_vfall_tmout, /* A_WAIT_VFALL */
352 a_wait_bcon_tmout, /* A_WAIT_BCON */
353 a_aidl_bdis_tmout, /* A_AIDL_BDIS */
354 b_ase0_brst_tmout, /* B_ASE0_BRST */
355 a_bidl_adis_tmout, /* A_BIDL_ADIS */
356 b_se0_srp_tmout, /* B_SE0_SRP */
357 b_srp_fail_tmout, /* B_SRP_FAIL */
358 NULL, /* A_WAIT_ENUM */
359 b_data_pls_tmout, /* B_DATA_PLS */
360 b_ssend_srp_tmout, /* B_SSEND_SRP */
361};
362
363/*
364 * Enable the next nearest enabled timer if have
365 */
366static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t)
367{
368 struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer);
369 ktime_t now, *timeout;
370 unsigned long enabled_timer_bits;
371 unsigned long flags;
372 enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
373 int ret = -EINVAL;
374
375 spin_lock_irqsave(&ci->lock, flags);
376 enabled_timer_bits = ci->enabled_otg_timer_bits;
377 ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
378
379 now = ktime_get();
380 for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) {
381 if (now.tv64 >= ci->hr_timeouts[cur_timer].tv64) {
382 ci->enabled_otg_timer_bits &= ~(1 << cur_timer);
383 if (otg_timer_handlers[cur_timer])
384 ret = otg_timer_handlers[cur_timer](ci);
385 } else {
386 if ((next_timer == NUM_OTG_FSM_TIMERS) ||
387 (ci->hr_timeouts[cur_timer].tv64 <
388 ci->hr_timeouts[next_timer].tv64))
389 next_timer = cur_timer;
390 }
391 }
392 /* Enable the next nearest timer */
393 if (next_timer < NUM_OTG_FSM_TIMERS) {
394 timeout = &ci->hr_timeouts[next_timer];
395 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout,
396 NSEC_PER_MSEC, HRTIMER_MODE_ABS);
397 ci->next_otg_timer = next_timer;
398 }
399 spin_unlock_irqrestore(&ci->lock, flags);
400
401 if (!ret)
402 ci_otg_queue_work(ci);
403
404 return HRTIMER_NORESTART;
346} 405}
347 406
348/* Initialize timers */ 407/* Initialize timers */
349static int ci_otg_init_timers(struct ci_hdrc *ci) 408static int ci_otg_init_timers(struct ci_hdrc *ci)
350{ 409{
351 struct otg_fsm *fsm = &ci->fsm; 410 hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
352 411 ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func;
353 /* FSM used timers */
354 ci->fsm_timer->timer_list[A_WAIT_VRISE] =
355 otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_VRISE,
356 (unsigned long)&fsm->a_wait_vrise_tmout);
357 if (ci->fsm_timer->timer_list[A_WAIT_VRISE] == NULL)
358 return -ENOMEM;
359
360 ci->fsm_timer->timer_list[A_WAIT_VFALL] =
361 otg_timer_initializer(ci, &a_wait_vfall_tmout_func,
362 TA_WAIT_VFALL, (unsigned long)&fsm->a_wait_vfall_tmout);
363 if (ci->fsm_timer->timer_list[A_WAIT_VFALL] == NULL)
364 return -ENOMEM;
365
366 ci->fsm_timer->timer_list[A_WAIT_BCON] =
367 otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_BCON,
368 (unsigned long)&fsm->a_wait_bcon_tmout);
369 if (ci->fsm_timer->timer_list[A_WAIT_BCON] == NULL)
370 return -ENOMEM;
371
372 ci->fsm_timer->timer_list[A_AIDL_BDIS] =
373 otg_timer_initializer(ci, &set_tmout_and_fsm, TA_AIDL_BDIS,
374 (unsigned long)&fsm->a_aidl_bdis_tmout);
375 if (ci->fsm_timer->timer_list[A_AIDL_BDIS] == NULL)
376 return -ENOMEM;
377
378 ci->fsm_timer->timer_list[A_BIDL_ADIS] =
379 otg_timer_initializer(ci, &set_tmout_and_fsm, TA_BIDL_ADIS,
380 (unsigned long)&fsm->a_bidl_adis_tmout);
381 if (ci->fsm_timer->timer_list[A_BIDL_ADIS] == NULL)
382 return -ENOMEM;
383
384 ci->fsm_timer->timer_list[B_ASE0_BRST] =
385 otg_timer_initializer(ci, &set_tmout_and_fsm, TB_ASE0_BRST,
386 (unsigned long)&fsm->b_ase0_brst_tmout);
387 if (ci->fsm_timer->timer_list[B_ASE0_BRST] == NULL)
388 return -ENOMEM;
389
390 ci->fsm_timer->timer_list[B_SE0_SRP] =
391 otg_timer_initializer(ci, &set_tmout_and_fsm, TB_SE0_SRP,
392 (unsigned long)&fsm->b_se0_srp);
393 if (ci->fsm_timer->timer_list[B_SE0_SRP] == NULL)
394 return -ENOMEM;
395
396 ci->fsm_timer->timer_list[B_SSEND_SRP] =
397 otg_timer_initializer(ci, &b_ssend_srp_tmout_func, TB_SSEND_SRP,
398 (unsigned long)&fsm->b_ssend_srp);
399 if (ci->fsm_timer->timer_list[B_SSEND_SRP] == NULL)
400 return -ENOMEM;
401
402 ci->fsm_timer->timer_list[B_SRP_FAIL] =
403 otg_timer_initializer(ci, &set_tmout, TB_SRP_FAIL,
404 (unsigned long)&fsm->b_srp_done);
405 if (ci->fsm_timer->timer_list[B_SRP_FAIL] == NULL)
406 return -ENOMEM;
407
408 ci->fsm_timer->timer_list[B_DATA_PLS] =
409 otg_timer_initializer(ci, &b_data_pulse_end, TB_DATA_PLS, 0);
410 if (ci->fsm_timer->timer_list[B_DATA_PLS] == NULL)
411 return -ENOMEM;
412 412
413 return 0; 413 return 0;
414} 414}
@@ -512,6 +512,7 @@ static void ci_otg_start_pulse(struct otg_fsm *fsm)
512 /* Hardware Assistant Data pulse */ 512 /* Hardware Assistant Data pulse */
513 hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP); 513 hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
514 514
515 pm_runtime_get(ci->dev);
515 ci_otg_add_timer(ci, B_DATA_PLS); 516 ci_otg_add_timer(ci, B_DATA_PLS);
516} 517}
517 518
@@ -579,8 +580,15 @@ int ci_otg_fsm_work(struct ci_hdrc *ci)
579 * a_idle to a_wait_vrise when power up 580 * a_idle to a_wait_vrise when power up
580 */ 581 */
581 if ((ci->fsm.id) || (ci->id_event) || 582 if ((ci->fsm.id) || (ci->id_event) ||
582 (ci->fsm.power_up)) 583 (ci->fsm.power_up)) {
583 ci_otg_queue_work(ci); 584 ci_otg_queue_work(ci);
585 } else {
586 /* Enable data pulse irq */
587 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS |
588 PORTSC_PP, 0);
589 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
590 hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
591 }
584 if (ci->id_event) 592 if (ci->id_event)
585 ci->id_event = false; 593 ci->id_event = false;
586 } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) { 594 } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) {
@@ -712,11 +720,7 @@ irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
712 fsm->id = (otgsc & OTGSC_ID) ? 1 : 0; 720 fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
713 721
714 if (otg_int_src) { 722 if (otg_int_src) {
715 if (otg_int_src & OTGSC_1MSIS) { 723 if (otg_int_src & OTGSC_DPIS) {
716 hw_write_otgsc(ci, OTGSC_1MSIS, OTGSC_1MSIS);
717 retval = ci_otg_tick_timer(ci);
718 return IRQ_HANDLED;
719 } else if (otg_int_src & OTGSC_DPIS) {
720 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS); 724 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
721 fsm->a_srp_det = 1; 725 fsm->a_srp_det = 1;
722 fsm->a_bus_drop = 0; 726 fsm->a_bus_drop = 0;
@@ -780,17 +784,13 @@ int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
780 784
781 mutex_init(&ci->fsm.lock); 785 mutex_init(&ci->fsm.lock);
782 786
783 ci->fsm_timer = devm_kzalloc(ci->dev,
784 sizeof(struct ci_otg_fsm_timer_list), GFP_KERNEL);
785 if (!ci->fsm_timer)
786 return -ENOMEM;
787
788 INIT_LIST_HEAD(&ci->fsm_timer->active_timers);
789 retval = ci_otg_init_timers(ci); 787 retval = ci_otg_init_timers(ci);
790 if (retval) { 788 if (retval) {
791 dev_err(ci->dev, "Couldn't init OTG timers\n"); 789 dev_err(ci->dev, "Couldn't init OTG timers\n");
792 return retval; 790 return retval;
793 } 791 }
792 ci->enabled_otg_timer_bits = 0;
793 ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
794 794
795 retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group); 795 retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
796 if (retval < 0) { 796 if (retval < 0) {
diff --git a/drivers/usb/chipidea/otg_fsm.h b/drivers/usb/chipidea/otg_fsm.h
index 9e0fc4c83f13..2689375ae5da 100644
--- a/drivers/usb/chipidea/otg_fsm.h
+++ b/drivers/usb/chipidea/otg_fsm.h
@@ -62,19 +62,6 @@
62/* SSEND time before SRP */ 62/* SSEND time before SRP */
63#define TB_SSEND_SRP (1500) /* minimum 1.5 sec, section:5.1.2 */ 63#define TB_SSEND_SRP (1500) /* minimum 1.5 sec, section:5.1.2 */
64 64
65struct ci_otg_fsm_timer {
66 unsigned long expires; /* Number of count increase to timeout */
67 unsigned long count; /* Tick counter */
68 void (*function)(void *, unsigned long); /* Timeout function */
69 unsigned long data; /* Data passed to function */
70 struct list_head list;
71};
72
73struct ci_otg_fsm_timer_list {
74 struct ci_otg_fsm_timer *timer_list[NUM_OTG_FSM_TIMERS];
75 struct list_head active_timers;
76};
77
78#ifdef CONFIG_USB_OTG_FSM 65#ifdef CONFIG_USB_OTG_FSM
79 66
80int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci); 67int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci);