Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci

* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)
  x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
  PCI: Increase resource array mask bit size in pcim_iomap_regions()
  PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES
  PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)
  PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
  x86/PCI: amd: factor out MMCONFIG discovery
  PCI: Enable ATS at the device state restore
  PCI: msi: fix imbalanced refcount of msi irq sysfs objects
  PCI: kconfig: English typo in pci/pcie/Kconfig
  PCI/PM/Runtime: make PCI traces quieter
  PCI: remove pci_create_bus()
  xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources
  x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()
  x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()
  x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan
  sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources
  sparc/PCI: convert to pci_create_root_bus()
  sh/PCI: convert to pci_scan_root_bus() for correct root bus resources
  powerpc/PCI: convert to pci_create_root_bus()
  powerpc/PCI: split PHB part out of pcibios_map_io_space()
  ...

Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due
to the same patches being applied in other branches.

1 files changed, 7 insertions, 71 deletions

diff --git a/drivers/uio/uio_pci_generic.c b/drivers/uio/uio_pci_generic.c
index 02bd47bdee1c..0bd08ef2b394 100644
--- a/drivers/uio/uio_pci_generic.c
+++ b/drivers/uio/uio_pci_generic.c
@@ -45,77 +45,12 @@ to_uio_pci_generic_dev(struct uio_info *info)
 static irqreturn_t irqhandler(int irq, struct uio_info *info)
 {
         struct uio_pci_generic_dev *gdev = to_uio_pci_generic_dev(info);
-        struct pci_dev *pdev = gdev->pdev;
-        irqreturn_t ret = IRQ_NONE;
-        u32 cmd_status_dword;
-        u16 origcmd, newcmd, status;
-
-        /* We do a single dword read to retrieve both command and status.
-         * Document assumptions that make this possible. */
-        BUILD_BUG_ON(PCI_COMMAND % 4);
-        BUILD_BUG_ON(PCI_COMMAND + 2 != PCI_STATUS);
-
-        pci_block_user_cfg_access(pdev);
-
-        /* Read both command and status registers in a single 32-bit operation.
-         * Note: we could cache the value for command and move the status read
-         * out of the lock if there was a way to get notified of user changes
-         * to command register through sysfs. Should be good for shared irqs. */
-        pci_read_config_dword(pdev, PCI_COMMAND, &cmd_status_dword);
-        origcmd = cmd_status_dword;
-        status = cmd_status_dword >> 16;
-
-        /* Check interrupt status register to see whether our device
-         * triggered the interrupt. */
-        if (!(status & PCI_STATUS_INTERRUPT))
-                goto done;
-
-        /* We triggered the interrupt, disable it. */
-        newcmd = origcmd | PCI_COMMAND_INTX_DISABLE;
-        if (newcmd != origcmd)
-                pci_write_config_word(pdev, PCI_COMMAND, newcmd);
 
-        /* UIO core will signal the user process. */
-        ret = IRQ_HANDLED;
-done:
-
-        pci_unblock_user_cfg_access(pdev);
-        return ret;
-}
+        if (!pci_check_and_mask_intx(gdev->pdev))
+                return IRQ_NONE;
 
-/* Verify that the device supports Interrupt Disable bit in command register,
- * per PCI 2.3, by flipping this bit and reading it back: this bit was readonly
- * in PCI 2.2. */
-static int __devinit verify_pci_2_3(struct pci_dev *pdev)
-{
-        u16 orig, new;
-        int err = 0;
-
-        pci_block_user_cfg_access(pdev);
-        pci_read_config_word(pdev, PCI_COMMAND, &orig);
-        pci_write_config_word(pdev, PCI_COMMAND,
-                              orig ^ PCI_COMMAND_INTX_DISABLE);
-        pci_read_config_word(pdev, PCI_COMMAND, &new);
-        /* There's no way to protect against
-         * hardware bugs or detect them reliably, but as long as we know
-         * what the value should be, let's go ahead and check it. */
-        if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) {
-                err = -EBUSY;
-                dev_err(&pdev->dev, "Command changed from 0x%x to 0x%x: "
-                        "driver or HW bug?\n", orig, new);
-                goto err;
-        }
-        if (!((new ^ orig) & PCI_COMMAND_INTX_DISABLE)) {
-                dev_warn(&pdev->dev, "Device does not support "
-                         "disabling interrupts: unable to bind.\n");
-                err = -ENODEV;
-                goto err;
-        }
-        /* Now restore the original value. */
-        pci_write_config_word(pdev, PCI_COMMAND, orig);
-err:
-        pci_unblock_user_cfg_access(pdev);
-        return err;
+        /* UIO core will signal the user process. */
+        return IRQ_HANDLED;
 }
 
 static int __devinit probe(struct pci_dev *pdev,
@@ -138,9 +73,10 @@ static int __devinit probe(struct pci_dev *pdev,
                 return -ENODEV;
         }
 
-        err = verify_pci_2_3(pdev);
-        if (err)
+        if (!pci_intx_mask_supported(pdev)) {
+                err = -ENODEV;
                 goto err_verify;
+        }
 
         gdev = kzalloc(sizeof(struct uio_pci_generic_dev), GFP_KERNEL);
         if (!gdev) {