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authorHeiko Stübner <heiko@sntech.de>2013-12-04 18:54:38 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-12-08 20:16:05 -0500
commit0da3336f19f2a42e9153efa4112d50fd148a8e61 (patch)
treed9e7b69d4e15971b4efb51dfd06c32e7150a0743 /drivers/tty
parentdc1ccc48159d63eca5089e507c82c7d22ef60839 (diff)
serial: samsung: move clock deactivation below uart registration
Commit 60e93575476f (serial: samsung: enable clock before clearing pending interrupts during init) added handling of the controller clock during init. On most systems this clock is also one of the baud_clock sources and possibly used by the earlycon and thus already enabled by the bootloader. Therefore a gap exists between s3c24xx_serial_init_port disabling the clock and an attached console reenabling it, making the transition from earlycon to regular console possibly hang the system - as seen on my S3C2442 based Freerunner today. Therefore move the disabling of the clock from s3c24xx_serial_init_port below the uart port registration, effectively creating an overlap and keeping the clock running non-stop if the console wants to grab this port. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/samsung.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index c1af04d46682..9cd706df3b33 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1209,7 +1209,6 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1209 1209
1210 /* reset the fifos (and setup the uart) */ 1210 /* reset the fifos (and setup the uart) */
1211 s3c24xx_serial_resetport(port, cfg); 1211 s3c24xx_serial_resetport(port, cfg);
1212 clk_disable_unprepare(ourport->clk);
1213 return 0; 1212 return 0;
1214} 1213}
1215 1214
@@ -1287,6 +1286,13 @@ static int s3c24xx_serial_probe(struct platform_device *pdev)
1287 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); 1286 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
1288 platform_set_drvdata(pdev, &ourport->port); 1287 platform_set_drvdata(pdev, &ourport->port);
1289 1288
1289 /*
1290 * Deactivate the clock enabled in s3c24xx_serial_init_port here,
1291 * so that a potential re-enablement through the pm-callback overlaps
1292 * and keeps the clock enabled in this case.
1293 */
1294 clk_disable_unprepare(ourport->clk);
1295
1290#ifdef CONFIG_SAMSUNG_CLOCK 1296#ifdef CONFIG_SAMSUNG_CLOCK
1291 ret = device_create_file(&pdev->dev, &dev_attr_clock_source); 1297 ret = device_create_file(&pdev->dev, &dev_attr_clock_source);
1292 if (ret < 0) 1298 if (ret < 0)