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authorPaul Gortmaker <paul.gortmaker@windriver.com>2012-03-08 19:12:08 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-03-09 15:47:56 -0500
commit0acf519f3f22450ae8f90cdb0f77b046fc731624 (patch)
tree39868d8ce302d85a852ef3bfed414977b2322e6a /drivers/tty
parenta46f5533ecfc7bbdd646d84fdab8656031a715c6 (diff)
serial: delete last unused traces of pausing I/O in 8250
This is the last traces of pausing I/O that we had back some twenty years ago. Probably was only required for 8MHz ISA cards running "on the edge" at 12MHz. Anyway it hasn't been in use for years, so lets just bury it for good. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/8250/8250.c308
1 files changed, 150 insertions, 158 deletions
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 917ab8452746..9674eac5535c 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -486,26 +486,18 @@ serial_out_sync(struct uart_8250_port *up, int offset, int value)
486 (up->port.serial_in(&(up)->port, (offset))) 486 (up->port.serial_in(&(up)->port, (offset)))
487#define serial_out(up, offset, value) \ 487#define serial_out(up, offset, value) \
488 (up->port.serial_out(&(up)->port, (offset), (value))) 488 (up->port.serial_out(&(up)->port, (offset), (value)))
489/*
490 * We used to support using pause I/O for certain machines. We
491 * haven't supported this for a while, but just in case it's badly
492 * needed for certain old 386 machines, I've left these #define's
493 * in....
494 */
495#define serial_inp(up, offset) serial_in(up, offset)
496#define serial_outp(up, offset, value) serial_out(up, offset, value)
497 489
498/* Uart divisor latch read */ 490/* Uart divisor latch read */
499static inline int _serial_dl_read(struct uart_8250_port *up) 491static inline int _serial_dl_read(struct uart_8250_port *up)
500{ 492{
501 return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8; 493 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
502} 494}
503 495
504/* Uart divisor latch write */ 496/* Uart divisor latch write */
505static inline void _serial_dl_write(struct uart_8250_port *up, int value) 497static inline void _serial_dl_write(struct uart_8250_port *up, int value)
506{ 498{
507 serial_outp(up, UART_DLL, value & 0xff); 499 serial_out(up, UART_DLL, value & 0xff);
508 serial_outp(up, UART_DLM, value >> 8 & 0xff); 500 serial_out(up, UART_DLM, value >> 8 & 0xff);
509} 501}
510 502
511#if defined(CONFIG_MIPS_ALCHEMY) 503#if defined(CONFIG_MIPS_ALCHEMY)
@@ -575,10 +567,10 @@ static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
575static void serial8250_clear_fifos(struct uart_8250_port *p) 567static void serial8250_clear_fifos(struct uart_8250_port *p)
576{ 568{
577 if (p->capabilities & UART_CAP_FIFO) { 569 if (p->capabilities & UART_CAP_FIFO) {
578 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO); 570 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
579 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO | 571 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
580 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 572 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
581 serial_outp(p, UART_FCR, 0); 573 serial_out(p, UART_FCR, 0);
582 } 574 }
583} 575}
584 576
@@ -591,15 +583,15 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
591{ 583{
592 if (p->capabilities & UART_CAP_SLEEP) { 584 if (p->capabilities & UART_CAP_SLEEP) {
593 if (p->capabilities & UART_CAP_EFR) { 585 if (p->capabilities & UART_CAP_EFR) {
594 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B); 586 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
595 serial_outp(p, UART_EFR, UART_EFR_ECB); 587 serial_out(p, UART_EFR, UART_EFR_ECB);
596 serial_outp(p, UART_LCR, 0); 588 serial_out(p, UART_LCR, 0);
597 } 589 }
598 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0); 590 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
599 if (p->capabilities & UART_CAP_EFR) { 591 if (p->capabilities & UART_CAP_EFR) {
600 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B); 592 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
601 serial_outp(p, UART_EFR, 0); 593 serial_out(p, UART_EFR, 0);
602 serial_outp(p, UART_LCR, 0); 594 serial_out(p, UART_LCR, 0);
603 } 595 }
604 } 596 }
605} 597}
@@ -614,12 +606,12 @@ static int __enable_rsa(struct uart_8250_port *up)
614 unsigned char mode; 606 unsigned char mode;
615 int result; 607 int result;
616 608
617 mode = serial_inp(up, UART_RSA_MSR); 609 mode = serial_in(up, UART_RSA_MSR);
618 result = mode & UART_RSA_MSR_FIFO; 610 result = mode & UART_RSA_MSR_FIFO;
619 611
620 if (!result) { 612 if (!result) {
621 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); 613 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
622 mode = serial_inp(up, UART_RSA_MSR); 614 mode = serial_in(up, UART_RSA_MSR);
623 result = mode & UART_RSA_MSR_FIFO; 615 result = mode & UART_RSA_MSR_FIFO;
624 } 616 }
625 617
@@ -638,7 +630,7 @@ static void enable_rsa(struct uart_8250_port *up)
638 spin_unlock_irq(&up->port.lock); 630 spin_unlock_irq(&up->port.lock);
639 } 631 }
640 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) 632 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
641 serial_outp(up, UART_RSA_FRR, 0); 633 serial_out(up, UART_RSA_FRR, 0);
642 } 634 }
643} 635}
644 636
@@ -657,12 +649,12 @@ static void disable_rsa(struct uart_8250_port *up)
657 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { 649 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
658 spin_lock_irq(&up->port.lock); 650 spin_lock_irq(&up->port.lock);
659 651
660 mode = serial_inp(up, UART_RSA_MSR); 652 mode = serial_in(up, UART_RSA_MSR);
661 result = !(mode & UART_RSA_MSR_FIFO); 653 result = !(mode & UART_RSA_MSR_FIFO);
662 654
663 if (!result) { 655 if (!result) {
664 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); 656 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
665 mode = serial_inp(up, UART_RSA_MSR); 657 mode = serial_in(up, UART_RSA_MSR);
666 result = !(mode & UART_RSA_MSR_FIFO); 658 result = !(mode & UART_RSA_MSR_FIFO);
667 } 659 }
668 660
@@ -683,28 +675,28 @@ static int size_fifo(struct uart_8250_port *up)
683 unsigned short old_dl; 675 unsigned short old_dl;
684 int count; 676 int count;
685 677
686 old_lcr = serial_inp(up, UART_LCR); 678 old_lcr = serial_in(up, UART_LCR);
687 serial_outp(up, UART_LCR, 0); 679 serial_out(up, UART_LCR, 0);
688 old_fcr = serial_inp(up, UART_FCR); 680 old_fcr = serial_in(up, UART_FCR);
689 old_mcr = serial_inp(up, UART_MCR); 681 old_mcr = serial_in(up, UART_MCR);
690 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | 682 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
691 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 683 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
692 serial_outp(up, UART_MCR, UART_MCR_LOOP); 684 serial_out(up, UART_MCR, UART_MCR_LOOP);
693 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); 685 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
694 old_dl = serial_dl_read(up); 686 old_dl = serial_dl_read(up);
695 serial_dl_write(up, 0x0001); 687 serial_dl_write(up, 0x0001);
696 serial_outp(up, UART_LCR, 0x03); 688 serial_out(up, UART_LCR, 0x03);
697 for (count = 0; count < 256; count++) 689 for (count = 0; count < 256; count++)
698 serial_outp(up, UART_TX, count); 690 serial_out(up, UART_TX, count);
699 mdelay(20);/* FIXME - schedule_timeout */ 691 mdelay(20);/* FIXME - schedule_timeout */
700 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) && 692 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
701 (count < 256); count++) 693 (count < 256); count++)
702 serial_inp(up, UART_RX); 694 serial_in(up, UART_RX);
703 serial_outp(up, UART_FCR, old_fcr); 695 serial_out(up, UART_FCR, old_fcr);
704 serial_outp(up, UART_MCR, old_mcr); 696 serial_out(up, UART_MCR, old_mcr);
705 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); 697 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
706 serial_dl_write(up, old_dl); 698 serial_dl_write(up, old_dl);
707 serial_outp(up, UART_LCR, old_lcr); 699 serial_out(up, UART_LCR, old_lcr);
708 700
709 return count; 701 return count;
710} 702}
@@ -719,20 +711,20 @@ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
719 unsigned char old_dll, old_dlm, old_lcr; 711 unsigned char old_dll, old_dlm, old_lcr;
720 unsigned int id; 712 unsigned int id;
721 713
722 old_lcr = serial_inp(p, UART_LCR); 714 old_lcr = serial_in(p, UART_LCR);
723 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A); 715 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
724 716
725 old_dll = serial_inp(p, UART_DLL); 717 old_dll = serial_in(p, UART_DLL);
726 old_dlm = serial_inp(p, UART_DLM); 718 old_dlm = serial_in(p, UART_DLM);
727 719
728 serial_outp(p, UART_DLL, 0); 720 serial_out(p, UART_DLL, 0);
729 serial_outp(p, UART_DLM, 0); 721 serial_out(p, UART_DLM, 0);
730 722
731 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8; 723 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
732 724
733 serial_outp(p, UART_DLL, old_dll); 725 serial_out(p, UART_DLL, old_dll);
734 serial_outp(p, UART_DLM, old_dlm); 726 serial_out(p, UART_DLM, old_dlm);
735 serial_outp(p, UART_LCR, old_lcr); 727 serial_out(p, UART_LCR, old_lcr);
736 728
737 return id; 729 return id;
738} 730}
@@ -842,11 +834,11 @@ static void autoconfig_8250(struct uart_8250_port *up)
842 up->port.type = PORT_8250; 834 up->port.type = PORT_8250;
843 835
844 scratch = serial_in(up, UART_SCR); 836 scratch = serial_in(up, UART_SCR);
845 serial_outp(up, UART_SCR, 0xa5); 837 serial_out(up, UART_SCR, 0xa5);
846 status1 = serial_in(up, UART_SCR); 838 status1 = serial_in(up, UART_SCR);
847 serial_outp(up, UART_SCR, 0x5a); 839 serial_out(up, UART_SCR, 0x5a);
848 status2 = serial_in(up, UART_SCR); 840 status2 = serial_in(up, UART_SCR);
849 serial_outp(up, UART_SCR, scratch); 841 serial_out(up, UART_SCR, scratch);
850 842
851 if (status1 == 0xa5 && status2 == 0x5a) 843 if (status1 == 0xa5 && status2 == 0x5a)
852 up->port.type = PORT_16450; 844 up->port.type = PORT_16450;
@@ -877,7 +869,7 @@ static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
877 } else { 869 } else {
878 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ 870 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
879 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */ 871 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
880 serial_outp(up, 0x04, status); 872 serial_out(up, 0x04, status);
881 } 873 }
882 return 1; 874 return 1;
883} 875}
@@ -900,9 +892,9 @@ static void autoconfig_16550a(struct uart_8250_port *up)
900 * Check for presence of the EFR when DLAB is set. 892 * Check for presence of the EFR when DLAB is set.
901 * Only ST16C650V1 UARTs pass this test. 893 * Only ST16C650V1 UARTs pass this test.
902 */ 894 */
903 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); 895 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
904 if (serial_in(up, UART_EFR) == 0) { 896 if (serial_in(up, UART_EFR) == 0) {
905 serial_outp(up, UART_EFR, 0xA8); 897 serial_out(up, UART_EFR, 0xA8);
906 if (serial_in(up, UART_EFR) != 0) { 898 if (serial_in(up, UART_EFR) != 0) {
907 DEBUG_AUTOCONF("EFRv1 "); 899 DEBUG_AUTOCONF("EFRv1 ");
908 up->port.type = PORT_16650; 900 up->port.type = PORT_16650;
@@ -910,7 +902,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
910 } else { 902 } else {
911 DEBUG_AUTOCONF("Motorola 8xxx DUART "); 903 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
912 } 904 }
913 serial_outp(up, UART_EFR, 0); 905 serial_out(up, UART_EFR, 0);
914 return; 906 return;
915 } 907 }
916 908
@@ -918,7 +910,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
918 * Maybe it requires 0xbf to be written to the LCR. 910 * Maybe it requires 0xbf to be written to the LCR.
919 * (other ST16C650V2 UARTs, TI16C752A, etc) 911 * (other ST16C650V2 UARTs, TI16C752A, etc)
920 */ 912 */
921 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 913 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
922 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) { 914 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
923 DEBUG_AUTOCONF("EFRv2 "); 915 DEBUG_AUTOCONF("EFRv2 ");
924 autoconfig_has_efr(up); 916 autoconfig_has_efr(up);
@@ -932,23 +924,23 @@ static void autoconfig_16550a(struct uart_8250_port *up)
932 * switch back to bank 2, read it from EXCR1 again and check 924 * switch back to bank 2, read it from EXCR1 again and check
933 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2 925 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
934 */ 926 */
935 serial_outp(up, UART_LCR, 0); 927 serial_out(up, UART_LCR, 0);
936 status1 = serial_in(up, UART_MCR); 928 status1 = serial_in(up, UART_MCR);
937 serial_outp(up, UART_LCR, 0xE0); 929 serial_out(up, UART_LCR, 0xE0);
938 status2 = serial_in(up, 0x02); /* EXCR1 */ 930 status2 = serial_in(up, 0x02); /* EXCR1 */
939 931
940 if (!((status2 ^ status1) & UART_MCR_LOOP)) { 932 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
941 serial_outp(up, UART_LCR, 0); 933 serial_out(up, UART_LCR, 0);
942 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP); 934 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
943 serial_outp(up, UART_LCR, 0xE0); 935 serial_out(up, UART_LCR, 0xE0);
944 status2 = serial_in(up, 0x02); /* EXCR1 */ 936 status2 = serial_in(up, 0x02); /* EXCR1 */
945 serial_outp(up, UART_LCR, 0); 937 serial_out(up, UART_LCR, 0);
946 serial_outp(up, UART_MCR, status1); 938 serial_out(up, UART_MCR, status1);
947 939
948 if ((status2 ^ status1) & UART_MCR_LOOP) { 940 if ((status2 ^ status1) & UART_MCR_LOOP) {
949 unsigned short quot; 941 unsigned short quot;
950 942
951 serial_outp(up, UART_LCR, 0xE0); 943 serial_out(up, UART_LCR, 0xE0);
952 944
953 quot = serial_dl_read(up); 945 quot = serial_dl_read(up);
954 quot <<= 3; 946 quot <<= 3;
@@ -956,7 +948,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
956 if (ns16550a_goto_highspeed(up)) 948 if (ns16550a_goto_highspeed(up))
957 serial_dl_write(up, quot); 949 serial_dl_write(up, quot);
958 950
959 serial_outp(up, UART_LCR, 0); 951 serial_out(up, UART_LCR, 0);
960 952
961 up->port.uartclk = 921600*16; 953 up->port.uartclk = 921600*16;
962 up->port.type = PORT_NS16550A; 954 up->port.type = PORT_NS16550A;
@@ -971,15 +963,15 @@ static void autoconfig_16550a(struct uart_8250_port *up)
971 * Try setting it with and without DLAB set. Cheap clones 963 * Try setting it with and without DLAB set. Cheap clones
972 * set bit 5 without DLAB set. 964 * set bit 5 without DLAB set.
973 */ 965 */
974 serial_outp(up, UART_LCR, 0); 966 serial_out(up, UART_LCR, 0);
975 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 967 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
976 status1 = serial_in(up, UART_IIR) >> 5; 968 status1 = serial_in(up, UART_IIR) >> 5;
977 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 969 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
978 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); 970 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
979 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 971 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
980 status2 = serial_in(up, UART_IIR) >> 5; 972 status2 = serial_in(up, UART_IIR) >> 5;
981 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 973 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
982 serial_outp(up, UART_LCR, 0); 974 serial_out(up, UART_LCR, 0);
983 975
984 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2); 976 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
985 977
@@ -998,13 +990,13 @@ static void autoconfig_16550a(struct uart_8250_port *up)
998 * already a 1 and maybe locked there before we even start start. 990 * already a 1 and maybe locked there before we even start start.
999 */ 991 */
1000 iersave = serial_in(up, UART_IER); 992 iersave = serial_in(up, UART_IER);
1001 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE); 993 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1002 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) { 994 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1003 /* 995 /*
1004 * OK it's in a known zero state, try writing and reading 996 * OK it's in a known zero state, try writing and reading
1005 * without disturbing the current state of the other bits. 997 * without disturbing the current state of the other bits.
1006 */ 998 */
1007 serial_outp(up, UART_IER, iersave | UART_IER_UUE); 999 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1008 if (serial_in(up, UART_IER) & UART_IER_UUE) { 1000 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1009 /* 1001 /*
1010 * It's an Xscale. 1002 * It's an Xscale.
@@ -1022,7 +1014,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
1022 */ 1014 */
1023 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 "); 1015 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1024 } 1016 }
1025 serial_outp(up, UART_IER, iersave); 1017 serial_out(up, UART_IER, iersave);
1026 1018
1027 /* 1019 /*
1028 * Exar uarts have EFR in a weird location 1020 * Exar uarts have EFR in a weird location
@@ -1084,8 +1076,8 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1084 * Note: this is safe as long as MCR bit 4 is clear 1076 * Note: this is safe as long as MCR bit 4 is clear
1085 * and the device is in "PC" mode. 1077 * and the device is in "PC" mode.
1086 */ 1078 */
1087 scratch = serial_inp(up, UART_IER); 1079 scratch = serial_in(up, UART_IER);
1088 serial_outp(up, UART_IER, 0); 1080 serial_out(up, UART_IER, 0);
1089#ifdef __i386__ 1081#ifdef __i386__
1090 outb(0xff, 0x080); 1082 outb(0xff, 0x080);
1091#endif 1083#endif
@@ -1093,13 +1085,13 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1093 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL 1085 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1094 * 16C754B) allow only to modify them if an EFR bit is set. 1086 * 16C754B) allow only to modify them if an EFR bit is set.
1095 */ 1087 */
1096 scratch2 = serial_inp(up, UART_IER) & 0x0f; 1088 scratch2 = serial_in(up, UART_IER) & 0x0f;
1097 serial_outp(up, UART_IER, 0x0F); 1089 serial_out(up, UART_IER, 0x0F);
1098#ifdef __i386__ 1090#ifdef __i386__
1099 outb(0, 0x080); 1091 outb(0, 0x080);
1100#endif 1092#endif
1101 scratch3 = serial_inp(up, UART_IER) & 0x0f; 1093 scratch3 = serial_in(up, UART_IER) & 0x0f;
1102 serial_outp(up, UART_IER, scratch); 1094 serial_out(up, UART_IER, scratch);
1103 if (scratch2 != 0 || scratch3 != 0x0F) { 1095 if (scratch2 != 0 || scratch3 != 0x0F) {
1104 /* 1096 /*
1105 * We failed; there's nothing here 1097 * We failed; there's nothing here
@@ -1123,9 +1115,9 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1123 * that conflicts with COM 1-4 --- we hope! 1115 * that conflicts with COM 1-4 --- we hope!
1124 */ 1116 */
1125 if (!(up->port.flags & UPF_SKIP_TEST)) { 1117 if (!(up->port.flags & UPF_SKIP_TEST)) {
1126 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); 1118 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1127 status1 = serial_inp(up, UART_MSR) & 0xF0; 1119 status1 = serial_in(up, UART_MSR) & 0xF0;
1128 serial_outp(up, UART_MCR, save_mcr); 1120 serial_out(up, UART_MCR, save_mcr);
1129 if (status1 != 0x90) { 1121 if (status1 != 0x90) {
1130 DEBUG_AUTOCONF("LOOP test failed (%02x) ", 1122 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1131 status1); 1123 status1);
@@ -1142,11 +1134,11 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1142 * We also initialise the EFR (if any) to zero for later. The 1134 * We also initialise the EFR (if any) to zero for later. The
1143 * EFR occupies the same register location as the FCR and IIR. 1135 * EFR occupies the same register location as the FCR and IIR.
1144 */ 1136 */
1145 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 1137 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1146 serial_outp(up, UART_EFR, 0); 1138 serial_out(up, UART_EFR, 0);
1147 serial_outp(up, UART_LCR, 0); 1139 serial_out(up, UART_LCR, 0);
1148 1140
1149 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 1141 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1150 scratch = serial_in(up, UART_IIR) >> 6; 1142 scratch = serial_in(up, UART_IIR) >> 6;
1151 1143
1152 DEBUG_AUTOCONF("iir=%d ", scratch); 1144 DEBUG_AUTOCONF("iir=%d ", scratch);
@@ -1183,7 +1175,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1183 } 1175 }
1184#endif 1176#endif
1185 1177
1186 serial_outp(up, UART_LCR, save_lcr); 1178 serial_out(up, UART_LCR, save_lcr);
1187 1179
1188 if (up->capabilities != uart_config[up->port.type].flags) { 1180 if (up->capabilities != uart_config[up->port.type].flags) {
1189 printk(KERN_WARNING 1181 printk(KERN_WARNING
@@ -1204,15 +1196,15 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1204 */ 1196 */
1205#ifdef CONFIG_SERIAL_8250_RSA 1197#ifdef CONFIG_SERIAL_8250_RSA
1206 if (up->port.type == PORT_RSA) 1198 if (up->port.type == PORT_RSA)
1207 serial_outp(up, UART_RSA_FRR, 0); 1199 serial_out(up, UART_RSA_FRR, 0);
1208#endif 1200#endif
1209 serial_outp(up, UART_MCR, save_mcr); 1201 serial_out(up, UART_MCR, save_mcr);
1210 serial8250_clear_fifos(up); 1202 serial8250_clear_fifos(up);
1211 serial_in(up, UART_RX); 1203 serial_in(up, UART_RX);
1212 if (up->capabilities & UART_CAP_UUE) 1204 if (up->capabilities & UART_CAP_UUE)
1213 serial_outp(up, UART_IER, UART_IER_UUE); 1205 serial_out(up, UART_IER, UART_IER_UUE);
1214 else 1206 else
1215 serial_outp(up, UART_IER, 0); 1207 serial_out(up, UART_IER, 0);
1216 1208
1217 out: 1209 out:
1218 spin_unlock_irqrestore(&up->port.lock, flags); 1210 spin_unlock_irqrestore(&up->port.lock, flags);
@@ -1236,31 +1228,31 @@ static void autoconfig_irq(struct uart_8250_port *up)
1236 1228
1237 /* forget possible initially masked and pending IRQ */ 1229 /* forget possible initially masked and pending IRQ */
1238 probe_irq_off(probe_irq_on()); 1230 probe_irq_off(probe_irq_on());
1239 save_mcr = serial_inp(up, UART_MCR); 1231 save_mcr = serial_in(up, UART_MCR);
1240 save_ier = serial_inp(up, UART_IER); 1232 save_ier = serial_in(up, UART_IER);
1241 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2); 1233 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1242 1234
1243 irqs = probe_irq_on(); 1235 irqs = probe_irq_on();
1244 serial_outp(up, UART_MCR, 0); 1236 serial_out(up, UART_MCR, 0);
1245 udelay(10); 1237 udelay(10);
1246 if (up->port.flags & UPF_FOURPORT) { 1238 if (up->port.flags & UPF_FOURPORT) {
1247 serial_outp(up, UART_MCR, 1239 serial_out(up, UART_MCR,
1248 UART_MCR_DTR | UART_MCR_RTS); 1240 UART_MCR_DTR | UART_MCR_RTS);
1249 } else { 1241 } else {
1250 serial_outp(up, UART_MCR, 1242 serial_out(up, UART_MCR,
1251 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2); 1243 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1252 } 1244 }
1253 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */ 1245 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1254 (void)serial_inp(up, UART_LSR); 1246 (void)serial_in(up, UART_LSR);
1255 (void)serial_inp(up, UART_RX); 1247 (void)serial_in(up, UART_RX);
1256 (void)serial_inp(up, UART_IIR); 1248 (void)serial_in(up, UART_IIR);
1257 (void)serial_inp(up, UART_MSR); 1249 (void)serial_in(up, UART_MSR);
1258 serial_outp(up, UART_TX, 0xFF); 1250 serial_out(up, UART_TX, 0xFF);
1259 udelay(20); 1251 udelay(20);
1260 irq = probe_irq_off(irqs); 1252 irq = probe_irq_off(irqs);
1261 1253
1262 serial_outp(up, UART_MCR, save_mcr); 1254 serial_out(up, UART_MCR, save_mcr);
1263 serial_outp(up, UART_IER, save_ier); 1255 serial_out(up, UART_IER, save_ier);
1264 1256
1265 if (up->port.flags & UPF_FOURPORT) 1257 if (up->port.flags & UPF_FOURPORT)
1266 outb_p(save_ICP, ICP); 1258 outb_p(save_ICP, ICP);
@@ -1380,7 +1372,7 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1380 1372
1381 do { 1373 do {
1382 if (likely(lsr & UART_LSR_DR)) 1374 if (likely(lsr & UART_LSR_DR))
1383 ch = serial_inp(up, UART_RX); 1375 ch = serial_in(up, UART_RX);
1384 else 1376 else
1385 /* 1377 /*
1386 * Intel 82571 has a Serial Over Lan device that will 1378 * Intel 82571 has a Serial Over Lan device that will
@@ -1445,7 +1437,7 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1445 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 1437 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1446 1438
1447ignore_char: 1439ignore_char:
1448 lsr = serial_inp(up, UART_LSR); 1440 lsr = serial_in(up, UART_LSR);
1449 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0)); 1441 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1450 spin_unlock(&up->port.lock); 1442 spin_unlock(&up->port.lock);
1451 tty_flip_buffer_push(tty); 1443 tty_flip_buffer_push(tty);
@@ -1460,7 +1452,7 @@ void serial8250_tx_chars(struct uart_8250_port *up)
1460 int count; 1452 int count;
1461 1453
1462 if (up->port.x_char) { 1454 if (up->port.x_char) {
1463 serial_outp(up, UART_TX, up->port.x_char); 1455 serial_out(up, UART_TX, up->port.x_char);
1464 up->port.icount.tx++; 1456 up->port.icount.tx++;
1465 up->port.x_char = 0; 1457 up->port.x_char = 0;
1466 return; 1458 return;
@@ -1532,7 +1524,7 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1532 1524
1533 spin_lock_irqsave(&up->port.lock, flags); 1525 spin_lock_irqsave(&up->port.lock, flags);
1534 1526
1535 status = serial_inp(up, UART_LSR); 1527 status = serial_in(up, UART_LSR);
1536 1528
1537 DEBUG_INTR("status = %x...", status); 1529 DEBUG_INTR("status = %x...", status);
1538 1530
@@ -1894,12 +1886,12 @@ static int serial8250_get_poll_char(struct uart_port *port)
1894{ 1886{
1895 struct uart_8250_port *up = 1887 struct uart_8250_port *up =
1896 container_of(port, struct uart_8250_port, port); 1888 container_of(port, struct uart_8250_port, port);
1897 unsigned char lsr = serial_inp(up, UART_LSR); 1889 unsigned char lsr = serial_in(up, UART_LSR);
1898 1890
1899 if (!(lsr & UART_LSR_DR)) 1891 if (!(lsr & UART_LSR_DR))
1900 return NO_POLL_CHAR; 1892 return NO_POLL_CHAR;
1901 1893
1902 return serial_inp(up, UART_RX); 1894 return serial_in(up, UART_RX);
1903} 1895}
1904 1896
1905 1897
@@ -1959,14 +1951,14 @@ static int serial8250_startup(struct uart_port *port)
1959 if (up->port.type == PORT_16C950) { 1951 if (up->port.type == PORT_16C950) {
1960 /* Wake up and initialize UART */ 1952 /* Wake up and initialize UART */
1961 up->acr = 0; 1953 up->acr = 0;
1962 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 1954 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1963 serial_outp(up, UART_EFR, UART_EFR_ECB); 1955 serial_out(up, UART_EFR, UART_EFR_ECB);
1964 serial_outp(up, UART_IER, 0); 1956 serial_out(up, UART_IER, 0);
1965 serial_outp(up, UART_LCR, 0); 1957 serial_out(up, UART_LCR, 0);
1966 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ 1958 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1967 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 1959 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1968 serial_outp(up, UART_EFR, UART_EFR_ECB); 1960 serial_out(up, UART_EFR, UART_EFR_ECB);
1969 serial_outp(up, UART_LCR, 0); 1961 serial_out(up, UART_LCR, 0);
1970 } 1962 }
1971 1963
1972#ifdef CONFIG_SERIAL_8250_RSA 1964#ifdef CONFIG_SERIAL_8250_RSA
@@ -1986,10 +1978,10 @@ static int serial8250_startup(struct uart_port *port)
1986 /* 1978 /*
1987 * Clear the interrupt registers. 1979 * Clear the interrupt registers.
1988 */ 1980 */
1989 (void) serial_inp(up, UART_LSR); 1981 (void) serial_in(up, UART_LSR);
1990 (void) serial_inp(up, UART_RX); 1982 (void) serial_in(up, UART_RX);
1991 (void) serial_inp(up, UART_IIR); 1983 (void) serial_in(up, UART_IIR);
1992 (void) serial_inp(up, UART_MSR); 1984 (void) serial_in(up, UART_MSR);
1993 1985
1994 /* 1986 /*
1995 * At this point, there's no way the LSR could still be 0xff; 1987 * At this point, there's no way the LSR could still be 0xff;
@@ -1997,7 +1989,7 @@ static int serial8250_startup(struct uart_port *port)
1997 * here. 1989 * here.
1998 */ 1990 */
1999 if (!(up->port.flags & UPF_BUGGY_UART) && 1991 if (!(up->port.flags & UPF_BUGGY_UART) &&
2000 (serial_inp(up, UART_LSR) == 0xff)) { 1992 (serial_in(up, UART_LSR) == 0xff)) {
2001 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n", 1993 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2002 serial_index(&up->port)); 1994 serial_index(&up->port));
2003 return -ENODEV; 1995 return -ENODEV;
@@ -2009,15 +2001,15 @@ static int serial8250_startup(struct uart_port *port)
2009 if (up->port.type == PORT_16850) { 2001 if (up->port.type == PORT_16850) {
2010 unsigned char fctr; 2002 unsigned char fctr;
2011 2003
2012 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 2004 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2013 2005
2014 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX); 2006 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2015 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX); 2007 serial_out(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2016 serial_outp(up, UART_TRG, UART_TRG_96); 2008 serial_out(up, UART_TRG, UART_TRG_96);
2017 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX); 2009 serial_out(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2018 serial_outp(up, UART_TRG, UART_TRG_96); 2010 serial_out(up, UART_TRG, UART_TRG_96);
2019 2011
2020 serial_outp(up, UART_LCR, 0); 2012 serial_out(up, UART_LCR, 0);
2021 } 2013 }
2022 2014
2023 if (up->port.irq) { 2015 if (up->port.irq) {
@@ -2087,7 +2079,7 @@ static int serial8250_startup(struct uart_port *port)
2087 /* 2079 /*
2088 * Now, initialize the UART 2080 * Now, initialize the UART
2089 */ 2081 */
2090 serial_outp(up, UART_LCR, UART_LCR_WLEN8); 2082 serial_out(up, UART_LCR, UART_LCR_WLEN8);
2091 2083
2092 spin_lock_irqsave(&up->port.lock, flags); 2084 spin_lock_irqsave(&up->port.lock, flags);
2093 if (up->port.flags & UPF_FOURPORT) { 2085 if (up->port.flags & UPF_FOURPORT) {
@@ -2120,10 +2112,10 @@ static int serial8250_startup(struct uart_port *port)
2120 * Do a quick test to see if we receive an 2112 * Do a quick test to see if we receive an
2121 * interrupt when we enable the TX irq. 2113 * interrupt when we enable the TX irq.
2122 */ 2114 */
2123 serial_outp(up, UART_IER, UART_IER_THRI); 2115 serial_out(up, UART_IER, UART_IER_THRI);
2124 lsr = serial_in(up, UART_LSR); 2116 lsr = serial_in(up, UART_LSR);
2125 iir = serial_in(up, UART_IIR); 2117 iir = serial_in(up, UART_IIR);
2126 serial_outp(up, UART_IER, 0); 2118 serial_out(up, UART_IER, 0);
2127 2119
2128 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) { 2120 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2129 if (!(up->bugs & UART_BUG_TXEN)) { 2121 if (!(up->bugs & UART_BUG_TXEN)) {
@@ -2143,10 +2135,10 @@ dont_test_tx_en:
2143 * saved flags to avoid getting false values from polling 2135 * saved flags to avoid getting false values from polling
2144 * routines or the previous session. 2136 * routines or the previous session.
2145 */ 2137 */
2146 serial_inp(up, UART_LSR); 2138 serial_in(up, UART_LSR);
2147 serial_inp(up, UART_RX); 2139 serial_in(up, UART_RX);
2148 serial_inp(up, UART_IIR); 2140 serial_in(up, UART_IIR);
2149 serial_inp(up, UART_MSR); 2141 serial_in(up, UART_MSR);
2150 up->lsr_saved_flags = 0; 2142 up->lsr_saved_flags = 0;
2151 up->msr_saved_flags = 0; 2143 up->msr_saved_flags = 0;
2152 2144
@@ -2156,7 +2148,7 @@ dont_test_tx_en:
2156 * anyway, so we don't enable them here. 2148 * anyway, so we don't enable them here.
2157 */ 2149 */
2158 up->ier = UART_IER_RLSI | UART_IER_RDI; 2150 up->ier = UART_IER_RLSI | UART_IER_RDI;
2159 serial_outp(up, UART_IER, up->ier); 2151 serial_out(up, UART_IER, up->ier);
2160 2152
2161 if (up->port.flags & UPF_FOURPORT) { 2153 if (up->port.flags & UPF_FOURPORT) {
2162 unsigned int icp; 2154 unsigned int icp;
@@ -2181,7 +2173,7 @@ static void serial8250_shutdown(struct uart_port *port)
2181 * Disable interrupts from this port 2173 * Disable interrupts from this port
2182 */ 2174 */
2183 up->ier = 0; 2175 up->ier = 0;
2184 serial_outp(up, UART_IER, 0); 2176 serial_out(up, UART_IER, 0);
2185 2177
2186 spin_lock_irqsave(&up->port.lock, flags); 2178 spin_lock_irqsave(&up->port.lock, flags);
2187 if (up->port.flags & UPF_FOURPORT) { 2179 if (up->port.flags & UPF_FOURPORT) {
@@ -2197,7 +2189,7 @@ static void serial8250_shutdown(struct uart_port *port)
2197 /* 2189 /*
2198 * Disable break condition and FIFOs 2190 * Disable break condition and FIFOs
2199 */ 2191 */
2200 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC); 2192 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
2201 serial8250_clear_fifos(up); 2193 serial8250_clear_fifos(up);
2202 2194
2203#ifdef CONFIG_SERIAL_8250_RSA 2195#ifdef CONFIG_SERIAL_8250_RSA
@@ -2374,11 +2366,11 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2374 if (termios->c_cflag & CRTSCTS) 2366 if (termios->c_cflag & CRTSCTS)
2375 efr |= UART_EFR_CTS; 2367 efr |= UART_EFR_CTS;
2376 2368
2377 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 2369 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2378 if (up->port.flags & UPF_EXAR_EFR) 2370 if (up->port.flags & UPF_EXAR_EFR)
2379 serial_outp(up, UART_XR_EFR, efr); 2371 serial_out(up, UART_XR_EFR, efr);
2380 else 2372 else
2381 serial_outp(up, UART_EFR, efr); 2373 serial_out(up, UART_EFR, efr);
2382 } 2374 }
2383 2375
2384#ifdef CONFIG_ARCH_OMAP 2376#ifdef CONFIG_ARCH_OMAP
@@ -2394,9 +2386,9 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2394 2386
2395 if (up->capabilities & UART_NATSEMI) { 2387 if (up->capabilities & UART_NATSEMI) {
2396 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */ 2388 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2397 serial_outp(up, UART_LCR, 0xe0); 2389 serial_out(up, UART_LCR, 0xe0);
2398 } else { 2390 } else {
2399 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 2391 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
2400 } 2392 }
2401 2393
2402 serial_dl_write(up, quot); 2394 serial_dl_write(up, quot);
@@ -2406,16 +2398,16 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2406 * is written without DLAB set, this mode will be disabled. 2398 * is written without DLAB set, this mode will be disabled.
2407 */ 2399 */
2408 if (up->port.type == PORT_16750) 2400 if (up->port.type == PORT_16750)
2409 serial_outp(up, UART_FCR, fcr); 2401 serial_out(up, UART_FCR, fcr);
2410 2402
2411 serial_outp(up, UART_LCR, cval); /* reset DLAB */ 2403 serial_out(up, UART_LCR, cval); /* reset DLAB */
2412 up->lcr = cval; /* Save LCR */ 2404 up->lcr = cval; /* Save LCR */
2413 if (up->port.type != PORT_16750) { 2405 if (up->port.type != PORT_16750) {
2414 if (fcr & UART_FCR_ENABLE_FIFO) { 2406 if (fcr & UART_FCR_ENABLE_FIFO) {
2415 /* emulated UARTs (Lucent Venus 167x) need two steps */ 2407 /* emulated UARTs (Lucent Venus 167x) need two steps */
2416 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 2408 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
2417 } 2409 }
2418 serial_outp(up, UART_FCR, fcr); /* set fcr */ 2410 serial_out(up, UART_FCR, fcr); /* set fcr */
2419 } 2411 }
2420 serial8250_set_mctrl(&up->port, up->port.mctrl); 2412 serial8250_set_mctrl(&up->port, up->port.mctrl);
2421 spin_unlock_irqrestore(&up->port.lock, flags); 2413 spin_unlock_irqrestore(&up->port.lock, flags);
@@ -2997,11 +2989,11 @@ void serial8250_resume_port(int line)
2997 2989
2998 if (up->capabilities & UART_NATSEMI) { 2990 if (up->capabilities & UART_NATSEMI) {
2999 /* Ensure it's still in high speed mode */ 2991 /* Ensure it's still in high speed mode */
3000 serial_outp(up, UART_LCR, 0xE0); 2992 serial_out(up, UART_LCR, 0xE0);
3001 2993
3002 ns16550a_goto_highspeed(up); 2994 ns16550a_goto_highspeed(up);
3003 2995
3004 serial_outp(up, UART_LCR, 0); 2996 serial_out(up, UART_LCR, 0);
3005 up->port.uartclk = 921600*16; 2997 up->port.uartclk = 921600*16;
3006 } 2998 }
3007 uart_resume_port(&serial8250_reg, &up->port); 2999 uart_resume_port(&serial8250_reg, &up->port);