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authorChander Kashyap <chander.kashyap@linaro.org>2013-05-28 09:02:07 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-06-03 13:08:28 -0400
commit60e93575476f90a72146b51283f514da655410a7 (patch)
treea5834d5b67018cf1449d986f60055b60bff3462f /drivers/tty
parentbff09b099b31a31573b3c5943f805f6a08c714f0 (diff)
serial: samsung: enable clock before clearing pending interrupts during init
Ensure that the uart controller clock is enabled prior to writing to the interrupt mask and pending registers in the s3c24xx_serial_init_port function. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/samsung.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 89429410a245..0c8a9fa2be6c 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1166,6 +1166,18 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1166 ourport->tx_irq = ret; 1166 ourport->tx_irq = ret;
1167 1167
1168 ourport->clk = clk_get(&platdev->dev, "uart"); 1168 ourport->clk = clk_get(&platdev->dev, "uart");
1169 if (IS_ERR(ourport->clk)) {
1170 pr_err("%s: Controller clock not found\n",
1171 dev_name(&platdev->dev));
1172 return PTR_ERR(ourport->clk);
1173 }
1174
1175 ret = clk_prepare_enable(ourport->clk);
1176 if (ret) {
1177 pr_err("uart: clock failed to prepare+enable: %d\n", ret);
1178 clk_put(ourport->clk);
1179 return ret;
1180 }
1169 1181
1170 /* Keep all interrupts masked and cleared */ 1182 /* Keep all interrupts masked and cleared */
1171 if (s3c24xx_serial_has_interrupt_mask(port)) { 1183 if (s3c24xx_serial_has_interrupt_mask(port)) {
@@ -1180,6 +1192,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1180 1192
1181 /* reset the fifos (and setup the uart) */ 1193 /* reset the fifos (and setup the uart) */
1182 s3c24xx_serial_resetport(port, cfg); 1194 s3c24xx_serial_resetport(port, cfg);
1195 clk_disable_unprepare(ourport->clk);
1183 return 0; 1196 return 0;
1184} 1197}
1185 1198