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authorBryan O'Donoghue <pure.logic@nexus-software.ie>2014-09-22 20:21:11 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-09-28 21:25:21 -0400
commit1ede7dcca3c4fa15a518ab0473126f9c3e621e4c (patch)
tree5dee7309903d8c31606435b12f6fafb617832680 /drivers/tty
parent13d6ceb4c4fe1e9688e19b15b123b1830c596cf1 (diff)
serial: 8250: Add Quark X1000 to 8250_pci.c
Quark X1000 contains two designware derived 8250 serial ports. Each port has a unique PCI configuration space consisting of BAR0:UART BAR1:DMA respectively. Unlike the standard 8250 the register width is 32 bits for RHR,IER etc The Quark UART has a fundamental clock @ 44.2368 MHz allowing for a bitrate of up to about 2.76 megabits per second. This patch enables standard 8250 mode Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/8250/8250_pci.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 61830b1792eb..14d3e6be8800 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1788,6 +1788,7 @@ pci_wch_ch353_setup(struct serial_private *priv,
1788#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022 1788#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022
1789#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a 1789#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a
1790#define PCI_DEVICE_ID_AMCC_ADDIDATA_APCI7800 0x818e 1790#define PCI_DEVICE_ID_AMCC_ADDIDATA_APCI7800 0x818e
1791#define PCI_DEVICE_ID_INTEL_QRK_UART 0x0936
1791 1792
1792#define PCI_VENDOR_ID_SUNIX 0x1fd4 1793#define PCI_VENDOR_ID_SUNIX 0x1fd4
1793#define PCI_DEVICE_ID_SUNIX_1999 0x1999 1794#define PCI_DEVICE_ID_SUNIX_1999 0x1999
@@ -1898,6 +1899,13 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1898 .subdevice = PCI_ANY_ID, 1899 .subdevice = PCI_ANY_ID,
1899 .setup = byt_serial_setup, 1900 .setup = byt_serial_setup,
1900 }, 1901 },
1902 {
1903 .vendor = PCI_VENDOR_ID_INTEL,
1904 .device = PCI_DEVICE_ID_INTEL_QRK_UART,
1905 .subvendor = PCI_ANY_ID,
1906 .subdevice = PCI_ANY_ID,
1907 .setup = pci_default_setup,
1908 },
1901 /* 1909 /*
1902 * ITE 1910 * ITE
1903 */ 1911 */
@@ -2740,6 +2748,7 @@ enum pci_board_num_t {
2740 pbn_ADDIDATA_PCIe_8_3906250, 2748 pbn_ADDIDATA_PCIe_8_3906250,
2741 pbn_ce4100_1_115200, 2749 pbn_ce4100_1_115200,
2742 pbn_byt, 2750 pbn_byt,
2751 pbn_qrk,
2743 pbn_omegapci, 2752 pbn_omegapci,
2744 pbn_NETMOS9900_2s_115200, 2753 pbn_NETMOS9900_2s_115200,
2745 pbn_brcm_trumanage, 2754 pbn_brcm_trumanage,
@@ -3490,6 +3499,12 @@ static struct pciserial_board pci_boards[] = {
3490 .uart_offset = 0x80, 3499 .uart_offset = 0x80,
3491 .reg_shift = 2, 3500 .reg_shift = 2,
3492 }, 3501 },
3502 [pbn_qrk] = {
3503 .flags = FL_BASE0,
3504 .num_ports = 1,
3505 .base_baud = 2764800,
3506 .reg_shift = 2,
3507 },
3493 [pbn_omegapci] = { 3508 [pbn_omegapci] = {
3494 .flags = FL_BASE0, 3509 .flags = FL_BASE0,
3495 .num_ports = 8, 3510 .num_ports = 8,
@@ -5192,6 +5207,12 @@ static struct pci_device_id serial_pci_tbl[] = {
5192 pbn_byt }, 5207 pbn_byt },
5193 5208
5194 /* 5209 /*
5210 * Intel Quark x1000
5211 */
5212 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_UART,
5213 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
5214 pbn_qrk },
5215 /*
5195 * Cronyx Omega PCI 5216 * Cronyx Omega PCI
5196 */ 5217 */
5197 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_CRONYX_OMEGA, 5218 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_CRONYX_OMEGA,