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authorLinus Torvalds <torvalds@linux-foundation.org>2014-04-01 19:55:57 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-04-01 19:55:57 -0400
commitcb1595563880a81dab6eab9a5ecb4520d2e76077 (patch)
tree042907fc859287a40a454d57c034015742e38cbf /drivers/tty/serial
parentc12e69c6aaf785fd307d05cb6f36ca0e7577ead7 (diff)
parent3a13884abea08a5043b98d9374486ec859d1e03a (diff)
Merge tag 'tty-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver update from Greg KH: "Here's the big tty/serial driver update for 3.15-rc1. Nothing major, a number of serial driver updates and a few tty core fixes as well. All have been in linux-next for a while" * tag 'tty-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (71 commits) tty/serial: omap: empty the RX FIFO at the end of half-duplex TX tty/serial: omap: fix RX interrupt enable/disable in half-duplex TX serial: sh-sci: Neaten dev_<level> uses serial: sh-sci: Replace hardcoded 3 by UART_PM_STATE_OFF serial: sh-sci: Add more register documentation serial: sh-sci: Remove useless casts serial: sh-sci: Replace printk() by pr_*() serial_core: Avoid NULL pointer dereference in uart_close() serial_core: Get a reference for port->tty in uart_remove_one_port() serial: clps711x: Give a chance to perform useful tasks during wait loop serial_core: Grammar s/ports/port's/ serial_core: Spelling s/contro/control/ serial: efm32: properly namespace location property serial: max310x: Add missing #include <linux/uaccess.h> synclink: fix info leak in ioctl serial: 8250: Clean up the locking for -rt serial: 8250_pci: change BayTrail default uartclk serial: 8250_pci: more BayTrail error-free bauds serial: sh-sci: Add missing call to uart_remove_one_port() in failure path serial_core: Unregister console in uart_remove_one_port() ...
Diffstat (limited to 'drivers/tty/serial')
-rw-r--r--drivers/tty/serial/8250/8250_core.c19
-rw-r--r--drivers/tty/serial/8250/8250_pci.c43
-rw-r--r--drivers/tty/serial/Kconfig4
-rw-r--r--drivers/tty/serial/amba-pl011.c21
-rw-r--r--drivers/tty/serial/atmel_serial.c28
-rw-r--r--drivers/tty/serial/bcm63xx_uart.c16
-rw-r--r--drivers/tty/serial/clps711x.c21
-rw-r--r--drivers/tty/serial/crisv10.c112
-rw-r--r--drivers/tty/serial/efm32-uart.c5
-rw-r--r--drivers/tty/serial/fsl_lpuart.c430
-rw-r--r--drivers/tty/serial/imx.c82
-rw-r--r--drivers/tty/serial/max310x.c417
-rw-r--r--drivers/tty/serial/msm_serial.c140
-rw-r--r--drivers/tty/serial/msm_serial.h9
-rw-r--r--drivers/tty/serial/omap-serial.c11
-rw-r--r--drivers/tty/serial/pch_uart.c2
-rw-r--r--drivers/tty/serial/samsung.c40
-rw-r--r--drivers/tty/serial/serial_core.c20
-rw-r--r--drivers/tty/serial/sh-sci.c86
-rw-r--r--drivers/tty/serial/sirfsoc_uart.c195
-rw-r--r--drivers/tty/serial/sirfsoc_uart.h5
21 files changed, 1045 insertions, 661 deletions
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 69932b7556cf..81f909c2101f 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -1694,6 +1694,10 @@ static int serial_link_irq_chain(struct uart_8250_port *up)
1694 1694
1695static void serial_unlink_irq_chain(struct uart_8250_port *up) 1695static void serial_unlink_irq_chain(struct uart_8250_port *up)
1696{ 1696{
1697 /*
1698 * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1699 * but no, we are not going to take a patch that assigns NULL below.
1700 */
1697 struct irq_info *i; 1701 struct irq_info *i;
1698 struct hlist_node *n; 1702 struct hlist_node *n;
1699 struct hlist_head *h; 1703 struct hlist_head *h;
@@ -2882,14 +2886,10 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2882 2886
2883 touch_nmi_watchdog(); 2887 touch_nmi_watchdog();
2884 2888
2885 local_irq_save(flags); 2889 if (port->sysrq || oops_in_progress)
2886 if (port->sysrq) { 2890 locked = spin_trylock_irqsave(&port->lock, flags);
2887 /* serial8250_handle_irq() already took the lock */ 2891 else
2888 locked = 0; 2892 spin_lock_irqsave(&port->lock, flags);
2889 } else if (oops_in_progress) {
2890 locked = spin_trylock(&port->lock);
2891 } else
2892 spin_lock(&port->lock);
2893 2893
2894 /* 2894 /*
2895 * First save the IER then disable the interrupts 2895 * First save the IER then disable the interrupts
@@ -2921,8 +2921,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2921 serial8250_modem_status(up); 2921 serial8250_modem_status(up);
2922 2922
2923 if (locked) 2923 if (locked)
2924 spin_unlock(&port->lock); 2924 spin_unlock_irqrestore(&port->lock, flags);
2925 local_irq_restore(flags);
2926} 2925}
2927 2926
2928static int __init serial8250_console_setup(struct console *co, char *options) 2927static int __init serial8250_console_setup(struct console *co, char *options)
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 0ff3e3624d4c..b14bcba96c25 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1366,23 +1366,44 @@ byt_set_termios(struct uart_port *p, struct ktermios *termios,
1366 struct ktermios *old) 1366 struct ktermios *old)
1367{ 1367{
1368 unsigned int baud = tty_termios_baud_rate(termios); 1368 unsigned int baud = tty_termios_baud_rate(termios);
1369 unsigned int m = 6912; 1369 unsigned int m, n;
1370 unsigned int n = 15625;
1371 u32 reg; 1370 u32 reg;
1372 1371
1373 /* For baud rates 1M, 2M, 3M and 4M the dividers must be adjusted. */ 1372 /*
1374 if (baud == 1000000 || baud == 2000000 || baud == 4000000) { 1373 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
1374 * dividers must be adjusted.
1375 *
1376 * uartclk = (m / n) * 100 MHz, where m <= n
1377 */
1378 switch (baud) {
1379 case 500000:
1380 case 1000000:
1381 case 2000000:
1382 case 4000000:
1375 m = 64; 1383 m = 64;
1376 n = 100; 1384 n = 100;
1377
1378 p->uartclk = 64000000; 1385 p->uartclk = 64000000;
1379 } else if (baud == 3000000) { 1386 break;
1387 case 3500000:
1388 m = 56;
1389 n = 100;
1390 p->uartclk = 56000000;
1391 break;
1392 case 1500000:
1393 case 3000000:
1380 m = 48; 1394 m = 48;
1381 n = 100; 1395 n = 100;
1382
1383 p->uartclk = 48000000; 1396 p->uartclk = 48000000;
1384 } else { 1397 break;
1385 p->uartclk = 44236800; 1398 case 2500000:
1399 m = 40;
1400 n = 100;
1401 p->uartclk = 40000000;
1402 break;
1403 default:
1404 m = 2304;
1405 n = 3125;
1406 p->uartclk = 73728000;
1386 } 1407 }
1387 1408
1388 /* Reset the clock */ 1409 /* Reset the clock */
@@ -3449,6 +3470,10 @@ static struct pciserial_board pci_boards[] = {
3449 .base_baud = 921600, 3470 .base_baud = 921600,
3450 .reg_shift = 2, 3471 .reg_shift = 2,
3451 }, 3472 },
3473 /*
3474 * Intel BayTrail HSUART reference clock is 44.2368 MHz at power-on,
3475 * but is overridden by byt_set_termios.
3476 */
3452 [pbn_byt] = { 3477 [pbn_byt] = {
3453 .flags = FL_BASE0, 3478 .flags = FL_BASE0,
3454 .num_ports = 1, 3479 .num_ports = 1,
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index a3815eaed421..2577d67bacb2 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -289,7 +289,7 @@ config SERIAL_MAX3100
289 MAX3100 chip support 289 MAX3100 chip support
290 290
291config SERIAL_MAX310X 291config SERIAL_MAX310X
292 bool "MAX310X support" 292 tristate "MAX310X support"
293 depends on SPI_MASTER 293 depends on SPI_MASTER
294 select SERIAL_CORE 294 select SERIAL_CORE
295 select REGMAP_SPI if SPI_MASTER 295 select REGMAP_SPI if SPI_MASTER
@@ -708,7 +708,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
708 708
709config SERIAL_SH_SCI 709config SERIAL_SH_SCI
710 tristate "SuperH SCI(F) serial port support" 710 tristate "SuperH SCI(F) serial port support"
711 depends on HAVE_CLK && (SUPERH || ARM || COMPILE_TEST) 711 depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST
712 select SERIAL_CORE 712 select SERIAL_CORE
713 713
714config SERIAL_SH_SCI_NR_UARTS 714config SERIAL_SH_SCI_NR_UARTS
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index d58783d364e3..d4eda24aa68b 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -2154,9 +2154,19 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
2154 amba_ports[i] = uap; 2154 amba_ports[i] = uap;
2155 2155
2156 amba_set_drvdata(dev, uap); 2156 amba_set_drvdata(dev, uap);
2157
2158 if (!amba_reg.state) {
2159 ret = uart_register_driver(&amba_reg);
2160 if (ret < 0) {
2161 pr_err("Failed to register AMBA-PL011 driver\n");
2162 return ret;
2163 }
2164 }
2165
2157 ret = uart_add_one_port(&amba_reg, &uap->port); 2166 ret = uart_add_one_port(&amba_reg, &uap->port);
2158 if (ret) { 2167 if (ret) {
2159 amba_ports[i] = NULL; 2168 amba_ports[i] = NULL;
2169 uart_unregister_driver(&amba_reg);
2160 pl011_dma_remove(uap); 2170 pl011_dma_remove(uap);
2161 } 2171 }
2162 out: 2172 out:
@@ -2175,6 +2185,7 @@ static int pl011_remove(struct amba_device *dev)
2175 amba_ports[i] = NULL; 2185 amba_ports[i] = NULL;
2176 2186
2177 pl011_dma_remove(uap); 2187 pl011_dma_remove(uap);
2188 uart_unregister_driver(&amba_reg);
2178 return 0; 2189 return 0;
2179} 2190}
2180 2191
@@ -2230,22 +2241,14 @@ static struct amba_driver pl011_driver = {
2230 2241
2231static int __init pl011_init(void) 2242static int __init pl011_init(void)
2232{ 2243{
2233 int ret;
2234 printk(KERN_INFO "Serial: AMBA PL011 UART driver\n"); 2244 printk(KERN_INFO "Serial: AMBA PL011 UART driver\n");
2235 2245
2236 ret = uart_register_driver(&amba_reg); 2246 return amba_driver_register(&pl011_driver);
2237 if (ret == 0) {
2238 ret = amba_driver_register(&pl011_driver);
2239 if (ret)
2240 uart_unregister_driver(&amba_reg);
2241 }
2242 return ret;
2243} 2247}
2244 2248
2245static void __exit pl011_exit(void) 2249static void __exit pl011_exit(void)
2246{ 2250{
2247 amba_driver_unregister(&pl011_driver); 2251 amba_driver_unregister(&pl011_driver);
2248 uart_unregister_driver(&amba_reg);
2249} 2252}
2250 2253
2251/* 2254/*
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index a49f10d269b2..b0603e1f7d82 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -115,9 +115,6 @@ static void atmel_stop_rx(struct uart_port *port);
115#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) 115#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
116#define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR) 116#define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
117 117
118static int (*atmel_open_hook)(struct uart_port *);
119static void (*atmel_close_hook)(struct uart_port *);
120
121struct atmel_dma_buffer { 118struct atmel_dma_buffer {
122 unsigned char *buf; 119 unsigned char *buf;
123 dma_addr_t dma_addr; 120 dma_addr_t dma_addr;
@@ -1555,7 +1552,7 @@ static int atmel_startup(struct uart_port *port)
1555 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, 1552 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
1556 tty ? tty->name : "atmel_serial", port); 1553 tty ? tty->name : "atmel_serial", port);
1557 if (retval) { 1554 if (retval) {
1558 printk("atmel_serial: atmel_startup - Can't get irq\n"); 1555 dev_err(port->dev, "atmel_startup - Can't get irq\n");
1559 return retval; 1556 return retval;
1560 } 1557 }
1561 1558
@@ -1575,17 +1572,6 @@ static int atmel_startup(struct uart_port *port)
1575 if (retval < 0) 1572 if (retval < 0)
1576 atmel_set_ops(port); 1573 atmel_set_ops(port);
1577 } 1574 }
1578 /*
1579 * If there is a specific "open" function (to register
1580 * control line interrupts)
1581 */
1582 if (atmel_open_hook) {
1583 retval = atmel_open_hook(port);
1584 if (retval) {
1585 free_irq(port->irq, port);
1586 return retval;
1587 }
1588 }
1589 1575
1590 /* Save current CSR for comparison in atmel_tasklet_func() */ 1576 /* Save current CSR for comparison in atmel_tasklet_func() */
1591 atmel_port->irq_status_prev = UART_GET_CSR(port); 1577 atmel_port->irq_status_prev = UART_GET_CSR(port);
@@ -1684,13 +1670,6 @@ static void atmel_shutdown(struct uart_port *port)
1684 * Free the interrupt 1670 * Free the interrupt
1685 */ 1671 */
1686 free_irq(port->irq, port); 1672 free_irq(port->irq, port);
1687
1688 /*
1689 * If there is a specific "close" function (to unregister
1690 * control line interrupts)
1691 */
1692 if (atmel_close_hook)
1693 atmel_close_hook(port);
1694} 1673}
1695 1674
1696/* 1675/*
@@ -1738,7 +1717,7 @@ static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1738 clk_disable_unprepare(atmel_port->clk); 1717 clk_disable_unprepare(atmel_port->clk);
1739 break; 1718 break;
1740 default: 1719 default:
1741 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); 1720 dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
1742 } 1721 }
1743} 1722}
1744 1723
@@ -1853,13 +1832,10 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1853 mode &= ~ATMEL_US_USMODE; 1832 mode &= ~ATMEL_US_USMODE;
1854 1833
1855 if (atmel_port->rs485.flags & SER_RS485_ENABLED) { 1834 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1856 dev_dbg(port->dev, "Setting UART to RS485\n");
1857 if ((atmel_port->rs485.delay_rts_after_send) > 0) 1835 if ((atmel_port->rs485.delay_rts_after_send) > 0)
1858 UART_PUT_TTGR(port, 1836 UART_PUT_TTGR(port,
1859 atmel_port->rs485.delay_rts_after_send); 1837 atmel_port->rs485.delay_rts_after_send);
1860 mode |= ATMEL_US_USMODE_RS485; 1838 mode |= ATMEL_US_USMODE_RS485;
1861 } else {
1862 dev_dbg(port->dev, "Setting UART to RS232\n");
1863 } 1839 }
1864 1840
1865 /* set the parity, stop bits and data size */ 1841 /* set the parity, stop bits and data size */
diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
index 78e82b017b92..a47421e4627c 100644
--- a/drivers/tty/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
@@ -30,6 +30,8 @@
30#include <linux/serial.h> 30#include <linux/serial.h>
31#include <linux/serial_core.h> 31#include <linux/serial_core.h>
32#include <linux/serial_bcm63xx.h> 32#include <linux/serial_bcm63xx.h>
33#include <linux/io.h>
34#include <linux/of.h>
33 35
34#define BCM63XX_NR_UARTS 2 36#define BCM63XX_NR_UARTS 2
35 37
@@ -588,7 +590,7 @@ static int bcm_uart_request_port(struct uart_port *port)
588{ 590{
589 unsigned int size; 591 unsigned int size;
590 592
591 size = RSET_UART_SIZE; 593 size = UART_REG_SIZE;
592 if (!request_mem_region(port->mapbase, size, "bcm63xx")) { 594 if (!request_mem_region(port->mapbase, size, "bcm63xx")) {
593 dev_err(port->dev, "Memory region busy\n"); 595 dev_err(port->dev, "Memory region busy\n");
594 return -EBUSY; 596 return -EBUSY;
@@ -608,7 +610,7 @@ static int bcm_uart_request_port(struct uart_port *port)
608 */ 610 */
609static void bcm_uart_release_port(struct uart_port *port) 611static void bcm_uart_release_port(struct uart_port *port)
610{ 612{
611 release_mem_region(port->mapbase, RSET_UART_SIZE); 613 release_mem_region(port->mapbase, UART_REG_SIZE);
612 iounmap(port->membase); 614 iounmap(port->membase);
613} 615}
614 616
@@ -805,6 +807,9 @@ static int bcm_uart_probe(struct platform_device *pdev)
805 struct clk *clk; 807 struct clk *clk;
806 int ret; 808 int ret;
807 809
810 if (pdev->dev.of_node)
811 pdev->id = of_alias_get_id(pdev->dev.of_node, "uart");
812
808 if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS) 813 if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS)
809 return -EINVAL; 814 return -EINVAL;
810 815
@@ -856,6 +861,12 @@ static int bcm_uart_remove(struct platform_device *pdev)
856 return 0; 861 return 0;
857} 862}
858 863
864static const struct of_device_id bcm63xx_of_match[] = {
865 { .compatible = "brcm,bcm6345-uart" },
866 { /* sentinel */ }
867};
868MODULE_DEVICE_TABLE(of, bcm63xx_of_match);
869
859/* 870/*
860 * platform driver stuff 871 * platform driver stuff
861 */ 872 */
@@ -865,6 +876,7 @@ static struct platform_driver bcm_uart_platform_driver = {
865 .driver = { 876 .driver = {
866 .owner = THIS_MODULE, 877 .owner = THIS_MODULE,
867 .name = "bcm63xx_uart", 878 .name = "bcm63xx_uart",
879 .of_match_table = bcm63xx_of_match,
868 }, 880 },
869}; 881};
870 882
diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c
index b0eacb83f831..5e6fdb1ea73b 100644
--- a/drivers/tty/serial/clps711x.c
+++ b/drivers/tty/serial/clps711x.c
@@ -368,11 +368,16 @@ static const struct uart_ops uart_clps711x_ops = {
368static void uart_clps711x_console_putchar(struct uart_port *port, int ch) 368static void uart_clps711x_console_putchar(struct uart_port *port, int ch)
369{ 369{
370 struct clps711x_port *s = dev_get_drvdata(port->dev); 370 struct clps711x_port *s = dev_get_drvdata(port->dev);
371 u32 sysflg = 0;
372 371
373 do { 372 /* Wait for FIFO is not full */
373 while (1) {
374 u32 sysflg = 0;
375
374 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); 376 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
375 } while (sysflg & SYSFLG_UTXFF); 377 if (!(sysflg & SYSFLG_UTXFF))
378 break;
379 cond_resched();
380 }
376 381
377 writew(ch, port->membase + UARTDR_OFFSET); 382 writew(ch, port->membase + UARTDR_OFFSET);
378} 383}
@@ -382,14 +387,18 @@ static void uart_clps711x_console_write(struct console *co, const char *c,
382{ 387{
383 struct uart_port *port = clps711x_uart.state[co->index].uart_port; 388 struct uart_port *port = clps711x_uart.state[co->index].uart_port;
384 struct clps711x_port *s = dev_get_drvdata(port->dev); 389 struct clps711x_port *s = dev_get_drvdata(port->dev);
385 u32 sysflg = 0;
386 390
387 uart_console_write(port, c, n, uart_clps711x_console_putchar); 391 uart_console_write(port, c, n, uart_clps711x_console_putchar);
388 392
389 /* Wait for transmitter to become empty */ 393 /* Wait for transmitter to become empty */
390 do { 394 while (1) {
395 u32 sysflg = 0;
396
391 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); 397 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
392 } while (sysflg & SYSFLG_UBUSY); 398 if (!(sysflg & SYSFLG_UBUSY))
399 break;
400 cond_resched();
401 }
393} 402}
394 403
395static int uart_clps711x_console_setup(struct console *co, char *options) 404static int uart_clps711x_console_setup(struct console *co, char *options)
diff --git a/drivers/tty/serial/crisv10.c b/drivers/tty/serial/crisv10.c
index 690bdea0a0c1..d567ac5d3af4 100644
--- a/drivers/tty/serial/crisv10.c
+++ b/drivers/tty/serial/crisv10.c
@@ -286,7 +286,6 @@ static struct e100_serial rs_table[] = {
286#endif 286#endif
287 287
288}, /* ttyS0 */ 288}, /* ttyS0 */
289#ifndef CONFIG_SVINTO_SIM
290 { .baud = DEF_BAUD, 289 { .baud = DEF_BAUD,
291 .ioport = (unsigned char *)R_SERIAL1_CTRL, 290 .ioport = (unsigned char *)R_SERIAL1_CTRL,
292 .irq = 1U << 16, /* uses DMA 8 and 9 */ 291 .irq = 1U << 16, /* uses DMA 8 and 9 */
@@ -447,7 +446,6 @@ static struct e100_serial rs_table[] = {
447 .dma_in_enabled = 0 446 .dma_in_enabled = 0
448#endif 447#endif
449 } /* ttyS3 */ 448 } /* ttyS3 */
450#endif
451}; 449};
452 450
453 451
@@ -1035,7 +1033,6 @@ cflag_to_etrax_baud(unsigned int cflag)
1035static inline void 1033static inline void
1036e100_dtr(struct e100_serial *info, int set) 1034e100_dtr(struct e100_serial *info, int set)
1037{ 1035{
1038#ifndef CONFIG_SVINTO_SIM
1039 unsigned char mask = e100_modem_pins[info->line].dtr_mask; 1036 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1040 1037
1041#ifdef SERIAL_DEBUG_IO 1038#ifdef SERIAL_DEBUG_IO
@@ -1060,7 +1057,6 @@ e100_dtr(struct e100_serial *info, int set)
1060 info->line, *e100_modem_pins[info->line].dtr_shadow, 1057 info->line, *e100_modem_pins[info->line].dtr_shadow,
1061 E100_DTR_GET(info)); 1058 E100_DTR_GET(info));
1062#endif 1059#endif
1063#endif
1064} 1060}
1065 1061
1066/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive 1062/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
@@ -1069,7 +1065,6 @@ e100_dtr(struct e100_serial *info, int set)
1069static inline void 1065static inline void
1070e100_rts(struct e100_serial *info, int set) 1066e100_rts(struct e100_serial *info, int set)
1071{ 1067{
1072#ifndef CONFIG_SVINTO_SIM
1073 unsigned long flags; 1068 unsigned long flags;
1074 local_irq_save(flags); 1069 local_irq_save(flags);
1075 info->rx_ctrl &= ~E100_RTS_MASK; 1070 info->rx_ctrl &= ~E100_RTS_MASK;
@@ -1079,7 +1074,6 @@ e100_rts(struct e100_serial *info, int set)
1079#ifdef SERIAL_DEBUG_IO 1074#ifdef SERIAL_DEBUG_IO
1080 printk("ser%i rts %i\n", info->line, set); 1075 printk("ser%i rts %i\n", info->line, set);
1081#endif 1076#endif
1082#endif
1083} 1077}
1084 1078
1085 1079
@@ -1087,7 +1081,6 @@ e100_rts(struct e100_serial *info, int set)
1087static inline void 1081static inline void
1088e100_ri_out(struct e100_serial *info, int set) 1082e100_ri_out(struct e100_serial *info, int set)
1089{ 1083{
1090#ifndef CONFIG_SVINTO_SIM
1091 /* RI is active low */ 1084 /* RI is active low */
1092 { 1085 {
1093 unsigned char mask = e100_modem_pins[info->line].ri_mask; 1086 unsigned char mask = e100_modem_pins[info->line].ri_mask;
@@ -1099,12 +1092,10 @@ e100_ri_out(struct e100_serial *info, int set)
1099 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow; 1092 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1100 local_irq_restore(flags); 1093 local_irq_restore(flags);
1101 } 1094 }
1102#endif
1103} 1095}
1104static inline void 1096static inline void
1105e100_cd_out(struct e100_serial *info, int set) 1097e100_cd_out(struct e100_serial *info, int set)
1106{ 1098{
1107#ifndef CONFIG_SVINTO_SIM
1108 /* CD is active low */ 1099 /* CD is active low */
1109 { 1100 {
1110 unsigned char mask = e100_modem_pins[info->line].cd_mask; 1101 unsigned char mask = e100_modem_pins[info->line].cd_mask;
@@ -1116,27 +1107,22 @@ e100_cd_out(struct e100_serial *info, int set)
1116 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow; 1107 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1117 local_irq_restore(flags); 1108 local_irq_restore(flags);
1118 } 1109 }
1119#endif
1120} 1110}
1121 1111
1122static inline void 1112static inline void
1123e100_disable_rx(struct e100_serial *info) 1113e100_disable_rx(struct e100_serial *info)
1124{ 1114{
1125#ifndef CONFIG_SVINTO_SIM
1126 /* disable the receiver */ 1115 /* disable the receiver */
1127 info->ioport[REG_REC_CTRL] = 1116 info->ioport[REG_REC_CTRL] =
1128 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable)); 1117 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1129#endif
1130} 1118}
1131 1119
1132static inline void 1120static inline void
1133e100_enable_rx(struct e100_serial *info) 1121e100_enable_rx(struct e100_serial *info)
1134{ 1122{
1135#ifndef CONFIG_SVINTO_SIM
1136 /* enable the receiver */ 1123 /* enable the receiver */
1137 info->ioport[REG_REC_CTRL] = 1124 info->ioport[REG_REC_CTRL] =
1138 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable)); 1125 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1139#endif
1140} 1126}
1141 1127
1142/* the rx DMA uses both the dma_descr and the dma_eop interrupts */ 1128/* the rx DMA uses both the dma_descr and the dma_eop interrupts */
@@ -1554,24 +1540,6 @@ transmit_chars_dma(struct e100_serial *info)
1554 unsigned int c, sentl; 1540 unsigned int c, sentl;
1555 struct etrax_dma_descr *descr; 1541 struct etrax_dma_descr *descr;
1556 1542
1557#ifdef CONFIG_SVINTO_SIM
1558 /* This will output too little if tail is not 0 always since
1559 * we don't reloop to send the other part. Anyway this SHOULD be a
1560 * no-op - transmit_chars_dma would never really be called during sim
1561 * since rs_write does not write into the xmit buffer then.
1562 */
1563 if (info->xmit.tail)
1564 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1565 if (info->xmit.head != info->xmit.tail) {
1566 SIMCOUT(info->xmit.buf + info->xmit.tail,
1567 CIRC_CNT(info->xmit.head,
1568 info->xmit.tail,
1569 SERIAL_XMIT_SIZE));
1570 info->xmit.head = info->xmit.tail; /* move back head */
1571 info->tr_running = 0;
1572 }
1573 return;
1574#endif
1575 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */ 1543 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1576 *info->oclrintradr = 1544 *info->oclrintradr =
1577 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | 1545 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
@@ -1842,13 +1810,6 @@ static void receive_chars_dma(struct e100_serial *info)
1842 struct tty_struct *tty; 1810 struct tty_struct *tty;
1843 unsigned char rstat; 1811 unsigned char rstat;
1844 1812
1845#ifdef CONFIG_SVINTO_SIM
1846 /* No receive in the simulator. Will probably be when the rest of
1847 * the serial interface works, and this piece will just be removed.
1848 */
1849 return;
1850#endif
1851
1852 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */ 1813 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1853 *info->iclrintradr = 1814 *info->iclrintradr =
1854 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | 1815 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
@@ -1934,12 +1895,6 @@ static int start_recv_dma(struct e100_serial *info)
1934static void 1895static void
1935start_receive(struct e100_serial *info) 1896start_receive(struct e100_serial *info)
1936{ 1897{
1937#ifdef CONFIG_SVINTO_SIM
1938 /* No receive in the simulator. Will probably be when the rest of
1939 * the serial interface works, and this piece will just be removed.
1940 */
1941 return;
1942#endif
1943 if (info->uses_dma_in) { 1898 if (info->uses_dma_in) {
1944 /* reset the input dma channel to be sure it works */ 1899 /* reset the input dma channel to be sure it works */
1945 1900
@@ -1972,17 +1927,6 @@ tr_interrupt(int irq, void *dev_id)
1972 int i; 1927 int i;
1973 int handled = 0; 1928 int handled = 0;
1974 1929
1975#ifdef CONFIG_SVINTO_SIM
1976 /* No receive in the simulator. Will probably be when the rest of
1977 * the serial interface works, and this piece will just be removed.
1978 */
1979 {
1980 const char *s = "What? tr_interrupt in simulator??\n";
1981 SIMCOUT(s,strlen(s));
1982 }
1983 return IRQ_HANDLED;
1984#endif
1985
1986 /* find out the line that caused this irq and get it from rs_table */ 1930 /* find out the line that caused this irq and get it from rs_table */
1987 1931
1988 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */ 1932 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
@@ -2021,17 +1965,6 @@ rec_interrupt(int irq, void *dev_id)
2021 int i; 1965 int i;
2022 int handled = 0; 1966 int handled = 0;
2023 1967
2024#ifdef CONFIG_SVINTO_SIM
2025 /* No receive in the simulator. Will probably be when the rest of
2026 * the serial interface works, and this piece will just be removed.
2027 */
2028 {
2029 const char *s = "What? rec_interrupt in simulator??\n";
2030 SIMCOUT(s,strlen(s));
2031 }
2032 return IRQ_HANDLED;
2033#endif
2034
2035 /* find out the line that caused this irq and get it from rs_table */ 1968 /* find out the line that caused this irq and get it from rs_table */
2036 1969
2037 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */ 1970 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
@@ -2173,10 +2106,6 @@ timed_flush_handler(unsigned long ptr)
2173 struct e100_serial *info; 2106 struct e100_serial *info;
2174 int i; 2107 int i;
2175 2108
2176#ifdef CONFIG_SVINTO_SIM
2177 return;
2178#endif
2179
2180 for (i = 0; i < NR_PORTS; i++) { 2109 for (i = 0; i < NR_PORTS; i++) {
2181 info = rs_table + i; 2110 info = rs_table + i;
2182 if (info->uses_dma_in) 2111 if (info->uses_dma_in)
@@ -2729,25 +2658,6 @@ startup(struct e100_serial * info)
2729 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf); 2658 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
2730#endif 2659#endif
2731 2660
2732#ifdef CONFIG_SVINTO_SIM
2733 /* Bits and pieces collected from below. Better to have them
2734 in one ifdef:ed clause than to mix in a lot of ifdefs,
2735 right? */
2736 if (info->port.tty)
2737 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2738
2739 info->xmit.head = info->xmit.tail = 0;
2740 info->first_recv_buffer = info->last_recv_buffer = NULL;
2741 info->recv_cnt = info->max_recv_cnt = 0;
2742
2743 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2744 info->rec_descr[i].buf = NULL;
2745
2746 /* No real action in the simulator, but may set info important
2747 to ioctl. */
2748 change_speed(info);
2749#else
2750
2751 /* 2661 /*
2752 * Clear the FIFO buffers and disable them 2662 * Clear the FIFO buffers and disable them
2753 * (they will be reenabled in change_speed()) 2663 * (they will be reenabled in change_speed())
@@ -2837,8 +2747,6 @@ startup(struct e100_serial * info)
2837 e100_rts(info, 1); 2747 e100_rts(info, 1);
2838 e100_dtr(info, 1); 2748 e100_dtr(info, 1);
2839 2749
2840#endif /* CONFIG_SVINTO_SIM */
2841
2842 info->port.flags |= ASYNC_INITIALIZED; 2750 info->port.flags |= ASYNC_INITIALIZED;
2843 2751
2844 local_irq_restore(flags); 2752 local_irq_restore(flags);
@@ -2857,7 +2765,6 @@ shutdown(struct e100_serial * info)
2857 struct etrax_recv_buffer *buffer; 2765 struct etrax_recv_buffer *buffer;
2858 int i; 2766 int i;
2859 2767
2860#ifndef CONFIG_SVINTO_SIM
2861 /* shut down the transmitter and receiver */ 2768 /* shut down the transmitter and receiver */
2862 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line)); 2769 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
2863 e100_disable_rx(info); 2770 e100_disable_rx(info);
@@ -2882,8 +2789,6 @@ shutdown(struct e100_serial * info)
2882 info->tr_running = 0; 2789 info->tr_running = 0;
2883 } 2790 }
2884 2791
2885#endif /* CONFIG_SVINTO_SIM */
2886
2887 if (!(info->port.flags & ASYNC_INITIALIZED)) 2792 if (!(info->port.flags & ASYNC_INITIALIZED))
2888 return; 2793 return;
2889 2794
@@ -2995,17 +2900,12 @@ change_speed(struct e100_serial *info)
2995 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal); 2900 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2996 r_alt_ser_baudrate_shadow &= ~mask; 2901 r_alt_ser_baudrate_shadow &= ~mask;
2997 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8)); 2902 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
2998#ifndef CONFIG_SVINTO_SIM
2999 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow; 2903 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3000#endif /* CONFIG_SVINTO_SIM */
3001 2904
3002 info->baud = cflag_to_baud(cflag); 2905 info->baud = cflag_to_baud(cflag);
3003#ifndef CONFIG_SVINTO_SIM
3004 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag); 2906 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag);
3005#endif /* CONFIG_SVINTO_SIM */
3006 } 2907 }
3007 2908
3008#ifndef CONFIG_SVINTO_SIM
3009 /* start with default settings and then fill in changes */ 2909 /* start with default settings and then fill in changes */
3010 local_irq_save(flags); 2910 local_irq_save(flags);
3011 /* 8 bit, no/even parity */ 2911 /* 8 bit, no/even parity */
@@ -3073,7 +2973,6 @@ change_speed(struct e100_serial *info)
3073 2973
3074 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff; 2974 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
3075 local_irq_restore(flags); 2975 local_irq_restore(flags);
3076#endif /* !CONFIG_SVINTO_SIM */
3077 2976
3078 update_char_time(info); 2977 update_char_time(info);
3079 2978
@@ -3122,11 +3021,6 @@ static int rs_raw_write(struct tty_struct *tty,
3122 count, info->ioport[REG_STATUS]); 3021 count, info->ioport[REG_STATUS]);
3123#endif 3022#endif
3124 3023
3125#ifdef CONFIG_SVINTO_SIM
3126 /* Really simple. The output is here and now. */
3127 SIMCOUT(buf, count);
3128 return count;
3129#endif
3130 local_save_flags(flags); 3024 local_save_flags(flags);
3131 DFLOW(DEBUG_LOG(info->line, "write count %i ", count)); 3025 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3132 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty))); 3026 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
@@ -3463,7 +3357,6 @@ static int
3463get_lsr_info(struct e100_serial * info, unsigned int *value) 3357get_lsr_info(struct e100_serial * info, unsigned int *value)
3464{ 3358{
3465 unsigned int result = TIOCSER_TEMT; 3359 unsigned int result = TIOCSER_TEMT;
3466#ifndef CONFIG_SVINTO_SIM
3467 unsigned long curr_time = jiffies; 3360 unsigned long curr_time = jiffies;
3468 unsigned long curr_time_usec = GET_JIFFIES_USEC(); 3361 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3469 unsigned long elapsed_usec = 3362 unsigned long elapsed_usec =
@@ -3474,7 +3367,6 @@ get_lsr_info(struct e100_serial * info, unsigned int *value)
3474 elapsed_usec < 2*info->char_time_usec) { 3367 elapsed_usec < 2*info->char_time_usec) {
3475 result = 0; 3368 result = 0;
3476 } 3369 }
3477#endif
3478 3370
3479 if (copy_to_user(value, &result, sizeof(int))) 3371 if (copy_to_user(value, &result, sizeof(int)))
3480 return -EFAULT; 3372 return -EFAULT;
@@ -3804,7 +3696,6 @@ rs_close(struct tty_struct *tty, struct file * filp)
3804 e100_disable_serial_data_irq(info); 3696 e100_disable_serial_data_irq(info);
3805#endif 3697#endif
3806 3698
3807#ifndef CONFIG_SVINTO_SIM
3808 e100_disable_rx(info); 3699 e100_disable_rx(info);
3809 e100_disable_rx_irq(info); 3700 e100_disable_rx_irq(info);
3810 3701
@@ -3816,7 +3707,6 @@ rs_close(struct tty_struct *tty, struct file * filp)
3816 */ 3707 */
3817 rs_wait_until_sent(tty, HZ); 3708 rs_wait_until_sent(tty, HZ);
3818 } 3709 }
3819#endif
3820 3710
3821 shutdown(info); 3711 shutdown(info);
3822 rs_flush_buffer(tty); 3712 rs_flush_buffer(tty);
@@ -4479,7 +4369,6 @@ static int __init rs_init(void)
4479 fast_timer_init(); 4369 fast_timer_init();
4480#endif 4370#endif
4481 4371
4482#ifndef CONFIG_SVINTO_SIM
4483#ifndef CONFIG_ETRAX_KGDB 4372#ifndef CONFIG_ETRAX_KGDB
4484 /* Not needed in simulator. May only complicate stuff. */ 4373 /* Not needed in simulator. May only complicate stuff. */
4485 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */ 4374 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
@@ -4489,7 +4378,6 @@ static int __init rs_init(void)
4489 panic("%s: Failed to request irq8", __func__); 4378 panic("%s: Failed to request irq8", __func__);
4490 4379
4491#endif 4380#endif
4492#endif /* CONFIG_SVINTO_SIM */
4493 4381
4494 return 0; 4382 return 0;
4495} 4383}
diff --git a/drivers/tty/serial/efm32-uart.c b/drivers/tty/serial/efm32-uart.c
index 0eb5b5673ede..028582e924a5 100644
--- a/drivers/tty/serial/efm32-uart.c
+++ b/drivers/tty/serial/efm32-uart.c
@@ -671,7 +671,10 @@ static int efm32_uart_probe_dt(struct platform_device *pdev,
671 if (!np) 671 if (!np)
672 return 1; 672 return 1;
673 673
674 ret = of_property_read_u32(np, "location", &location); 674 ret = of_property_read_u32(np, "efm32,location", &location);
675 if (ret)
676 /* fall back to old and (wrongly) generic property "location" */
677 ret = of_property_read_u32(np, "location", &location);
675 if (!ret) { 678 if (!ret) {
676 if (location > 5) { 679 if (location > 5) {
677 dev_err(&pdev->dev, "invalid location\n"); 680 dev_err(&pdev->dev, "invalid location\n");
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 8978dc9a58b7..c5eb897de9de 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -13,14 +13,19 @@
13#define SUPPORT_SYSRQ 13#define SUPPORT_SYSRQ
14#endif 14#endif
15 15
16#include <linux/module.h> 16#include <linux/clk.h>
17#include <linux/console.h>
18#include <linux/dma-mapping.h>
19#include <linux/dmaengine.h>
20#include <linux/dmapool.h>
17#include <linux/io.h> 21#include <linux/io.h>
18#include <linux/irq.h> 22#include <linux/irq.h>
19#include <linux/clk.h> 23#include <linux/module.h>
20#include <linux/of.h> 24#include <linux/of.h>
21#include <linux/of_device.h> 25#include <linux/of_device.h>
22#include <linux/console.h> 26#include <linux/of_dma.h>
23#include <linux/serial_core.h> 27#include <linux/serial_core.h>
28#include <linux/slab.h>
24#include <linux/tty_flip.h> 29#include <linux/tty_flip.h>
25 30
26/* All registers are 8-bit width */ 31/* All registers are 8-bit width */
@@ -112,6 +117,10 @@
112#define UARTSFIFO_TXOF 0x02 117#define UARTSFIFO_TXOF 0x02
113#define UARTSFIFO_RXUF 0x01 118#define UARTSFIFO_RXUF 0x01
114 119
120#define DMA_MAXBURST 16
121#define DMA_MAXBURST_MASK (DMA_MAXBURST - 1)
122#define FSL_UART_RX_DMA_BUFFER_SIZE 64
123
115#define DRIVER_NAME "fsl-lpuart" 124#define DRIVER_NAME "fsl-lpuart"
116#define DEV_NAME "ttyLP" 125#define DEV_NAME "ttyLP"
117#define UART_NR 6 126#define UART_NR 6
@@ -121,6 +130,24 @@ struct lpuart_port {
121 struct clk *clk; 130 struct clk *clk;
122 unsigned int txfifo_size; 131 unsigned int txfifo_size;
123 unsigned int rxfifo_size; 132 unsigned int rxfifo_size;
133
134 bool lpuart_dma_use;
135 struct dma_chan *dma_tx_chan;
136 struct dma_chan *dma_rx_chan;
137 struct dma_async_tx_descriptor *dma_tx_desc;
138 struct dma_async_tx_descriptor *dma_rx_desc;
139 dma_addr_t dma_tx_buf_bus;
140 dma_addr_t dma_rx_buf_bus;
141 dma_cookie_t dma_tx_cookie;
142 dma_cookie_t dma_rx_cookie;
143 unsigned char *dma_tx_buf_virt;
144 unsigned char *dma_rx_buf_virt;
145 unsigned int dma_tx_bytes;
146 unsigned int dma_rx_bytes;
147 int dma_tx_in_progress;
148 int dma_rx_in_progress;
149 unsigned int dma_rx_timeout;
150 struct timer_list lpuart_timer;
124}; 151};
125 152
126static struct of_device_id lpuart_dt_ids[] = { 153static struct of_device_id lpuart_dt_ids[] = {
@@ -131,6 +158,10 @@ static struct of_device_id lpuart_dt_ids[] = {
131}; 158};
132MODULE_DEVICE_TABLE(of, lpuart_dt_ids); 159MODULE_DEVICE_TABLE(of, lpuart_dt_ids);
133 160
161/* Forward declare this for the dma callbacks*/
162static void lpuart_dma_tx_complete(void *arg);
163static void lpuart_dma_rx_complete(void *arg);
164
134static void lpuart_stop_tx(struct uart_port *port) 165static void lpuart_stop_tx(struct uart_port *port)
135{ 166{
136 unsigned char temp; 167 unsigned char temp;
@@ -152,6 +183,210 @@ static void lpuart_enable_ms(struct uart_port *port)
152{ 183{
153} 184}
154 185
186static void lpuart_copy_rx_to_tty(struct lpuart_port *sport,
187 struct tty_port *tty, int count)
188{
189 int copied;
190
191 sport->port.icount.rx += count;
192
193 if (!tty) {
194 dev_err(sport->port.dev, "No tty port\n");
195 return;
196 }
197
198 dma_sync_single_for_cpu(sport->port.dev, sport->dma_rx_buf_bus,
199 FSL_UART_RX_DMA_BUFFER_SIZE, DMA_FROM_DEVICE);
200 copied = tty_insert_flip_string(tty,
201 ((unsigned char *)(sport->dma_rx_buf_virt)), count);
202
203 if (copied != count) {
204 WARN_ON(1);
205 dev_err(sport->port.dev, "RxData copy to tty layer failed\n");
206 }
207
208 dma_sync_single_for_device(sport->port.dev, sport->dma_rx_buf_bus,
209 FSL_UART_RX_DMA_BUFFER_SIZE, DMA_TO_DEVICE);
210}
211
212static void lpuart_pio_tx(struct lpuart_port *sport)
213{
214 struct circ_buf *xmit = &sport->port.state->xmit;
215 unsigned long flags;
216
217 spin_lock_irqsave(&sport->port.lock, flags);
218
219 while (!uart_circ_empty(xmit) &&
220 readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size) {
221 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR);
222 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
223 sport->port.icount.tx++;
224 }
225
226 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
227 uart_write_wakeup(&sport->port);
228
229 if (uart_circ_empty(xmit))
230 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS,
231 sport->port.membase + UARTCR5);
232
233 spin_unlock_irqrestore(&sport->port.lock, flags);
234}
235
236static int lpuart_dma_tx(struct lpuart_port *sport, unsigned long count)
237{
238 struct circ_buf *xmit = &sport->port.state->xmit;
239 dma_addr_t tx_bus_addr;
240
241 dma_sync_single_for_device(sport->port.dev, sport->dma_tx_buf_bus,
242 UART_XMIT_SIZE, DMA_TO_DEVICE);
243 sport->dma_tx_bytes = count & ~(DMA_MAXBURST_MASK);
244 tx_bus_addr = sport->dma_tx_buf_bus + xmit->tail;
245 sport->dma_tx_desc = dmaengine_prep_slave_single(sport->dma_tx_chan,
246 tx_bus_addr, sport->dma_tx_bytes,
247 DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
248
249 if (!sport->dma_tx_desc) {
250 dev_err(sport->port.dev, "Not able to get desc for tx\n");
251 return -EIO;
252 }
253
254 sport->dma_tx_desc->callback = lpuart_dma_tx_complete;
255 sport->dma_tx_desc->callback_param = sport;
256 sport->dma_tx_in_progress = 1;
257 sport->dma_tx_cookie = dmaengine_submit(sport->dma_tx_desc);
258 dma_async_issue_pending(sport->dma_tx_chan);
259
260 return 0;
261}
262
263static void lpuart_prepare_tx(struct lpuart_port *sport)
264{
265 struct circ_buf *xmit = &sport->port.state->xmit;
266 unsigned long count = CIRC_CNT_TO_END(xmit->head,
267 xmit->tail, UART_XMIT_SIZE);
268
269 if (!count)
270 return;
271
272 if (count < DMA_MAXBURST)
273 writeb(readb(sport->port.membase + UARTCR5) & ~UARTCR5_TDMAS,
274 sport->port.membase + UARTCR5);
275 else {
276 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS,
277 sport->port.membase + UARTCR5);
278 lpuart_dma_tx(sport, count);
279 }
280}
281
282static void lpuart_dma_tx_complete(void *arg)
283{
284 struct lpuart_port *sport = arg;
285 struct circ_buf *xmit = &sport->port.state->xmit;
286 unsigned long flags;
287
288 async_tx_ack(sport->dma_tx_desc);
289
290 spin_lock_irqsave(&sport->port.lock, flags);
291
292 xmit->tail = (xmit->tail + sport->dma_tx_bytes) & (UART_XMIT_SIZE - 1);
293 sport->dma_tx_in_progress = 0;
294
295 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
296 uart_write_wakeup(&sport->port);
297
298 lpuart_prepare_tx(sport);
299
300 spin_unlock_irqrestore(&sport->port.lock, flags);
301}
302
303static int lpuart_dma_rx(struct lpuart_port *sport)
304{
305 dma_sync_single_for_device(sport->port.dev, sport->dma_rx_buf_bus,
306 FSL_UART_RX_DMA_BUFFER_SIZE, DMA_TO_DEVICE);
307 sport->dma_rx_desc = dmaengine_prep_slave_single(sport->dma_rx_chan,
308 sport->dma_rx_buf_bus, FSL_UART_RX_DMA_BUFFER_SIZE,
309 DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT);
310
311 if (!sport->dma_rx_desc) {
312 dev_err(sport->port.dev, "Not able to get desc for rx\n");
313 return -EIO;
314 }
315
316 sport->dma_rx_desc->callback = lpuart_dma_rx_complete;
317 sport->dma_rx_desc->callback_param = sport;
318 sport->dma_rx_in_progress = 1;
319 sport->dma_rx_cookie = dmaengine_submit(sport->dma_rx_desc);
320 dma_async_issue_pending(sport->dma_rx_chan);
321
322 return 0;
323}
324
325static void lpuart_dma_rx_complete(void *arg)
326{
327 struct lpuart_port *sport = arg;
328 struct tty_port *port = &sport->port.state->port;
329 unsigned long flags;
330
331 async_tx_ack(sport->dma_rx_desc);
332
333 spin_lock_irqsave(&sport->port.lock, flags);
334
335 sport->dma_rx_in_progress = 0;
336 lpuart_copy_rx_to_tty(sport, port, FSL_UART_RX_DMA_BUFFER_SIZE);
337 tty_flip_buffer_push(port);
338 lpuart_dma_rx(sport);
339
340 spin_unlock_irqrestore(&sport->port.lock, flags);
341}
342
343static void lpuart_timer_func(unsigned long data)
344{
345 struct lpuart_port *sport = (struct lpuart_port *)data;
346 struct tty_port *port = &sport->port.state->port;
347 struct dma_tx_state state;
348 unsigned long flags;
349 unsigned char temp;
350 int count;
351
352 del_timer(&sport->lpuart_timer);
353 dmaengine_pause(sport->dma_rx_chan);
354 dmaengine_tx_status(sport->dma_rx_chan, sport->dma_rx_cookie, &state);
355 dmaengine_terminate_all(sport->dma_rx_chan);
356 count = FSL_UART_RX_DMA_BUFFER_SIZE - state.residue;
357 async_tx_ack(sport->dma_rx_desc);
358
359 spin_lock_irqsave(&sport->port.lock, flags);
360
361 sport->dma_rx_in_progress = 0;
362 lpuart_copy_rx_to_tty(sport, port, count);
363 tty_flip_buffer_push(port);
364 temp = readb(sport->port.membase + UARTCR5);
365 writeb(temp & ~UARTCR5_RDMAS, sport->port.membase + UARTCR5);
366
367 spin_unlock_irqrestore(&sport->port.lock, flags);
368}
369
370static inline void lpuart_prepare_rx(struct lpuart_port *sport)
371{
372 unsigned long flags;
373 unsigned char temp;
374
375 spin_lock_irqsave(&sport->port.lock, flags);
376
377 init_timer(&sport->lpuart_timer);
378 sport->lpuart_timer.function = lpuart_timer_func;
379 sport->lpuart_timer.data = (unsigned long)sport;
380 sport->lpuart_timer.expires = jiffies + sport->dma_rx_timeout;
381 add_timer(&sport->lpuart_timer);
382
383 lpuart_dma_rx(sport);
384 temp = readb(sport->port.membase + UARTCR5);
385 writeb(temp | UARTCR5_RDMAS, sport->port.membase + UARTCR5);
386
387 spin_unlock_irqrestore(&sport->port.lock, flags);
388}
389
155static inline void lpuart_transmit_buffer(struct lpuart_port *sport) 390static inline void lpuart_transmit_buffer(struct lpuart_port *sport)
156{ 391{
157 struct circ_buf *xmit = &sport->port.state->xmit; 392 struct circ_buf *xmit = &sport->port.state->xmit;
@@ -172,14 +407,21 @@ static inline void lpuart_transmit_buffer(struct lpuart_port *sport)
172 407
173static void lpuart_start_tx(struct uart_port *port) 408static void lpuart_start_tx(struct uart_port *port)
174{ 409{
175 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); 410 struct lpuart_port *sport = container_of(port,
411 struct lpuart_port, port);
412 struct circ_buf *xmit = &sport->port.state->xmit;
176 unsigned char temp; 413 unsigned char temp;
177 414
178 temp = readb(port->membase + UARTCR2); 415 temp = readb(port->membase + UARTCR2);
179 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); 416 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2);
180 417
181 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) 418 if (sport->lpuart_dma_use) {
182 lpuart_transmit_buffer(sport); 419 if (!uart_circ_empty(xmit) && !sport->dma_tx_in_progress)
420 lpuart_prepare_tx(sport);
421 } else {
422 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE)
423 lpuart_transmit_buffer(sport);
424 }
183} 425}
184 426
185static irqreturn_t lpuart_txint(int irq, void *dev_id) 427static irqreturn_t lpuart_txint(int irq, void *dev_id)
@@ -279,12 +521,19 @@ static irqreturn_t lpuart_int(int irq, void *dev_id)
279 521
280 sts = readb(sport->port.membase + UARTSR1); 522 sts = readb(sport->port.membase + UARTSR1);
281 523
282 if (sts & UARTSR1_RDRF) 524 if (sts & UARTSR1_RDRF) {
283 lpuart_rxint(irq, dev_id); 525 if (sport->lpuart_dma_use)
284 526 lpuart_prepare_rx(sport);
527 else
528 lpuart_rxint(irq, dev_id);
529 }
285 if (sts & UARTSR1_TDRE && 530 if (sts & UARTSR1_TDRE &&
286 !(readb(sport->port.membase + UARTCR5) & UARTCR5_TDMAS)) 531 !(readb(sport->port.membase + UARTCR5) & UARTCR5_TDMAS)) {
287 lpuart_txint(irq, dev_id); 532 if (sport->lpuart_dma_use)
533 lpuart_pio_tx(sport);
534 else
535 lpuart_txint(irq, dev_id);
536 }
288 537
289 return IRQ_HANDLED; 538 return IRQ_HANDLED;
290} 539}
@@ -366,13 +615,156 @@ static void lpuart_setup_watermark(struct lpuart_port *sport)
366 writeb(UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH, 615 writeb(UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH,
367 sport->port.membase + UARTCFIFO); 616 sport->port.membase + UARTCFIFO);
368 617
369 writeb(2, sport->port.membase + UARTTWFIFO); 618 writeb(0, sport->port.membase + UARTTWFIFO);
370 writeb(1, sport->port.membase + UARTRWFIFO); 619 writeb(1, sport->port.membase + UARTRWFIFO);
371 620
372 /* Restore cr2 */ 621 /* Restore cr2 */
373 writeb(cr2_saved, sport->port.membase + UARTCR2); 622 writeb(cr2_saved, sport->port.membase + UARTCR2);
374} 623}
375 624
625static int lpuart_dma_tx_request(struct uart_port *port)
626{
627 struct lpuart_port *sport = container_of(port,
628 struct lpuart_port, port);
629 struct dma_chan *tx_chan;
630 struct dma_slave_config dma_tx_sconfig;
631 dma_addr_t dma_bus;
632 unsigned char *dma_buf;
633 int ret;
634
635 tx_chan = dma_request_slave_channel(sport->port.dev, "tx");
636
637 if (!tx_chan) {
638 dev_err(sport->port.dev, "Dma tx channel request failed!\n");
639 return -ENODEV;
640 }
641
642 dma_bus = dma_map_single(tx_chan->device->dev,
643 sport->port.state->xmit.buf,
644 UART_XMIT_SIZE, DMA_TO_DEVICE);
645
646 if (dma_mapping_error(tx_chan->device->dev, dma_bus)) {
647 dev_err(sport->port.dev, "dma_map_single tx failed\n");
648 dma_release_channel(tx_chan);
649 return -ENOMEM;
650 }
651
652 dma_buf = sport->port.state->xmit.buf;
653 dma_tx_sconfig.dst_addr = sport->port.mapbase + UARTDR;
654 dma_tx_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
655 dma_tx_sconfig.dst_maxburst = DMA_MAXBURST;
656 dma_tx_sconfig.direction = DMA_MEM_TO_DEV;
657 ret = dmaengine_slave_config(tx_chan, &dma_tx_sconfig);
658
659 if (ret < 0) {
660 dev_err(sport->port.dev,
661 "Dma slave config failed, err = %d\n", ret);
662 dma_release_channel(tx_chan);
663 return ret;
664 }
665
666 sport->dma_tx_chan = tx_chan;
667 sport->dma_tx_buf_virt = dma_buf;
668 sport->dma_tx_buf_bus = dma_bus;
669 sport->dma_tx_in_progress = 0;
670
671 return 0;
672}
673
674static int lpuart_dma_rx_request(struct uart_port *port)
675{
676 struct lpuart_port *sport = container_of(port,
677 struct lpuart_port, port);
678 struct dma_chan *rx_chan;
679 struct dma_slave_config dma_rx_sconfig;
680 dma_addr_t dma_bus;
681 unsigned char *dma_buf;
682 int ret;
683
684 rx_chan = dma_request_slave_channel(sport->port.dev, "rx");
685
686 if (!rx_chan) {
687 dev_err(sport->port.dev, "Dma rx channel request failed!\n");
688 return -ENODEV;
689 }
690
691 dma_buf = devm_kzalloc(sport->port.dev,
692 FSL_UART_RX_DMA_BUFFER_SIZE, GFP_KERNEL);
693
694 if (!dma_buf) {
695 dev_err(sport->port.dev, "Dma rx alloc failed\n");
696 dma_release_channel(rx_chan);
697 return -ENOMEM;
698 }
699
700 dma_bus = dma_map_single(rx_chan->device->dev, dma_buf,
701 FSL_UART_RX_DMA_BUFFER_SIZE, DMA_FROM_DEVICE);
702
703 if (dma_mapping_error(rx_chan->device->dev, dma_bus)) {
704 dev_err(sport->port.dev, "dma_map_single rx failed\n");
705 dma_release_channel(rx_chan);
706 return -ENOMEM;
707 }
708
709 dma_rx_sconfig.src_addr = sport->port.mapbase + UARTDR;
710 dma_rx_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
711 dma_rx_sconfig.src_maxburst = 1;
712 dma_rx_sconfig.direction = DMA_DEV_TO_MEM;
713 ret = dmaengine_slave_config(rx_chan, &dma_rx_sconfig);
714
715 if (ret < 0) {
716 dev_err(sport->port.dev,
717 "Dma slave config failed, err = %d\n", ret);
718 dma_release_channel(rx_chan);
719 return ret;
720 }
721
722 sport->dma_rx_chan = rx_chan;
723 sport->dma_rx_buf_virt = dma_buf;
724 sport->dma_rx_buf_bus = dma_bus;
725 sport->dma_rx_in_progress = 0;
726
727 sport->dma_rx_timeout = (sport->port.timeout - HZ / 50) *
728 FSL_UART_RX_DMA_BUFFER_SIZE * 3 /
729 sport->rxfifo_size / 2;
730
731 if (sport->dma_rx_timeout < msecs_to_jiffies(20))
732 sport->dma_rx_timeout = msecs_to_jiffies(20);
733
734 return 0;
735}
736
737static void lpuart_dma_tx_free(struct uart_port *port)
738{
739 struct lpuart_port *sport = container_of(port,
740 struct lpuart_port, port);
741 struct dma_chan *dma_chan;
742
743 dma_unmap_single(sport->port.dev, sport->dma_tx_buf_bus,
744 UART_XMIT_SIZE, DMA_TO_DEVICE);
745 dma_chan = sport->dma_tx_chan;
746 sport->dma_tx_chan = NULL;
747 sport->dma_tx_buf_bus = 0;
748 sport->dma_tx_buf_virt = NULL;
749 dma_release_channel(dma_chan);
750}
751
752static void lpuart_dma_rx_free(struct uart_port *port)
753{
754 struct lpuart_port *sport = container_of(port,
755 struct lpuart_port, port);
756 struct dma_chan *dma_chan;
757
758 dma_unmap_single(sport->port.dev, sport->dma_rx_buf_bus,
759 FSL_UART_RX_DMA_BUFFER_SIZE, DMA_FROM_DEVICE);
760
761 dma_chan = sport->dma_rx_chan;
762 sport->dma_rx_chan = NULL;
763 sport->dma_rx_buf_bus = 0;
764 sport->dma_rx_buf_virt = NULL;
765 dma_release_channel(dma_chan);
766}
767
376static int lpuart_startup(struct uart_port *port) 768static int lpuart_startup(struct uart_port *port)
377{ 769{
378 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); 770 struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
@@ -380,6 +772,15 @@ static int lpuart_startup(struct uart_port *port)
380 unsigned long flags; 772 unsigned long flags;
381 unsigned char temp; 773 unsigned char temp;
382 774
775 /*whether use dma support by dma request results*/
776 if (lpuart_dma_tx_request(port) || lpuart_dma_rx_request(port)) {
777 sport->lpuart_dma_use = false;
778 } else {
779 sport->lpuart_dma_use = true;
780 temp = readb(port->membase + UARTCR5);
781 writeb(temp | UARTCR5_TDMAS, port->membase + UARTCR5);
782 }
783
383 ret = devm_request_irq(port->dev, port->irq, lpuart_int, 0, 784 ret = devm_request_irq(port->dev, port->irq, lpuart_int, 0,
384 DRIVER_NAME, sport); 785 DRIVER_NAME, sport);
385 if (ret) 786 if (ret)
@@ -414,6 +815,11 @@ static void lpuart_shutdown(struct uart_port *port)
414 spin_unlock_irqrestore(&port->lock, flags); 815 spin_unlock_irqrestore(&port->lock, flags);
415 816
416 devm_free_irq(port->dev, port->irq, sport); 817 devm_free_irq(port->dev, port->irq, sport);
818
819 if (sport->lpuart_dma_use) {
820 lpuart_dma_tx_free(port);
821 lpuart_dma_rx_free(port);
822 }
417} 823}
418 824
419static void 825static void
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index d799140e53b6..3b6c1a2e25de 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -496,8 +496,7 @@ static void dma_tx_callback(void *data)
496 496
497 dev_dbg(sport->port.dev, "we finish the TX DMA.\n"); 497 dev_dbg(sport->port.dev, "we finish the TX DMA.\n");
498 498
499 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 499 uart_write_wakeup(&sport->port);
500 uart_write_wakeup(&sport->port);
501 500
502 if (waitqueue_active(&sport->dma_wait)) { 501 if (waitqueue_active(&sport->dma_wait)) {
503 wake_up(&sport->dma_wait); 502 wake_up(&sport->dma_wait);
@@ -1117,25 +1116,25 @@ static int imx_startup(struct uart_port *port)
1117 */ 1116 */
1118 if (sport->txirq > 0) { 1117 if (sport->txirq > 0) {
1119 retval = request_irq(sport->rxirq, imx_rxint, 0, 1118 retval = request_irq(sport->rxirq, imx_rxint, 0,
1120 DRIVER_NAME, sport); 1119 dev_name(port->dev), sport);
1121 if (retval) 1120 if (retval)
1122 goto error_out1; 1121 goto error_out1;
1123 1122
1124 retval = request_irq(sport->txirq, imx_txint, 0, 1123 retval = request_irq(sport->txirq, imx_txint, 0,
1125 DRIVER_NAME, sport); 1124 dev_name(port->dev), sport);
1126 if (retval) 1125 if (retval)
1127 goto error_out2; 1126 goto error_out2;
1128 1127
1129 /* do not use RTS IRQ on IrDA */ 1128 /* do not use RTS IRQ on IrDA */
1130 if (!USE_IRDA(sport)) { 1129 if (!USE_IRDA(sport)) {
1131 retval = request_irq(sport->rtsirq, imx_rtsint, 0, 1130 retval = request_irq(sport->rtsirq, imx_rtsint, 0,
1132 DRIVER_NAME, sport); 1131 dev_name(port->dev), sport);
1133 if (retval) 1132 if (retval)
1134 goto error_out3; 1133 goto error_out3;
1135 } 1134 }
1136 } else { 1135 } else {
1137 retval = request_irq(sport->port.irq, imx_int, 0, 1136 retval = request_irq(sport->port.irq, imx_int, 0,
1138 DRIVER_NAME, sport); 1137 dev_name(port->dev), sport);
1139 if (retval) { 1138 if (retval) {
1140 free_irq(sport->port.irq, sport); 1139 free_irq(sport->port.irq, sport);
1141 goto error_out1; 1140 goto error_out1;
@@ -1470,44 +1469,13 @@ static const char *imx_type(struct uart_port *port)
1470} 1469}
1471 1470
1472/* 1471/*
1473 * Release the memory region(s) being used by 'port'.
1474 */
1475static void imx_release_port(struct uart_port *port)
1476{
1477 struct platform_device *pdev = to_platform_device(port->dev);
1478 struct resource *mmres;
1479
1480 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1481 release_mem_region(mmres->start, resource_size(mmres));
1482}
1483
1484/*
1485 * Request the memory region(s) being used by 'port'.
1486 */
1487static int imx_request_port(struct uart_port *port)
1488{
1489 struct platform_device *pdev = to_platform_device(port->dev);
1490 struct resource *mmres;
1491 void *ret;
1492
1493 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1494 if (!mmres)
1495 return -ENODEV;
1496
1497 ret = request_mem_region(mmres->start, resource_size(mmres), "imx-uart");
1498
1499 return ret ? 0 : -EBUSY;
1500}
1501
1502/*
1503 * Configure/autoconfigure the port. 1472 * Configure/autoconfigure the port.
1504 */ 1473 */
1505static void imx_config_port(struct uart_port *port, int flags) 1474static void imx_config_port(struct uart_port *port, int flags)
1506{ 1475{
1507 struct imx_port *sport = (struct imx_port *)port; 1476 struct imx_port *sport = (struct imx_port *)port;
1508 1477
1509 if (flags & UART_CONFIG_TYPE && 1478 if (flags & UART_CONFIG_TYPE)
1510 imx_request_port(&sport->port) == 0)
1511 sport->port.type = PORT_IMX; 1479 sport->port.type = PORT_IMX;
1512} 1480}
1513 1481
@@ -1617,8 +1585,6 @@ static struct uart_ops imx_pops = {
1617 .flush_buffer = imx_flush_buffer, 1585 .flush_buffer = imx_flush_buffer,
1618 .set_termios = imx_set_termios, 1586 .set_termios = imx_set_termios,
1619 .type = imx_type, 1587 .type = imx_type,
1620 .release_port = imx_release_port,
1621 .request_port = imx_request_port,
1622 .config_port = imx_config_port, 1588 .config_port = imx_config_port,
1623 .verify_port = imx_verify_port, 1589 .verify_port = imx_verify_port,
1624#if defined(CONFIG_CONSOLE_POLL) 1590#if defined(CONFIG_CONSOLE_POLL)
@@ -1935,7 +1901,6 @@ static void serial_imx_probe_pdata(struct imx_port *sport,
1935static int serial_imx_probe(struct platform_device *pdev) 1901static int serial_imx_probe(struct platform_device *pdev)
1936{ 1902{
1937 struct imx_port *sport; 1903 struct imx_port *sport;
1938 struct imxuart_platform_data *pdata;
1939 void __iomem *base; 1904 void __iomem *base;
1940 int ret = 0; 1905 int ret = 0;
1941 struct resource *res; 1906 struct resource *res;
@@ -1951,12 +1916,9 @@ static int serial_imx_probe(struct platform_device *pdev)
1951 return ret; 1916 return ret;
1952 1917
1953 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1918 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1954 if (!res) 1919 base = devm_ioremap_resource(&pdev->dev, res);
1955 return -ENODEV; 1920 if (IS_ERR(base))
1956 1921 return PTR_ERR(base);
1957 base = devm_ioremap(&pdev->dev, res->start, PAGE_SIZE);
1958 if (!base)
1959 return -ENOMEM;
1960 1922
1961 sport->port.dev = &pdev->dev; 1923 sport->port.dev = &pdev->dev;
1962 sport->port.mapbase = res->start; 1924 sport->port.mapbase = res->start;
@@ -1992,38 +1954,16 @@ static int serial_imx_probe(struct platform_device *pdev)
1992 1954
1993 imx_ports[sport->port.line] = sport; 1955 imx_ports[sport->port.line] = sport;
1994 1956
1995 pdata = dev_get_platdata(&pdev->dev);
1996 if (pdata && pdata->init) {
1997 ret = pdata->init(pdev);
1998 if (ret)
1999 return ret;
2000 }
2001
2002 ret = uart_add_one_port(&imx_reg, &sport->port);
2003 if (ret)
2004 goto deinit;
2005 platform_set_drvdata(pdev, sport); 1957 platform_set_drvdata(pdev, sport);
2006 1958
2007 return 0; 1959 return uart_add_one_port(&imx_reg, &sport->port);
2008deinit:
2009 if (pdata && pdata->exit)
2010 pdata->exit(pdev);
2011 return ret;
2012} 1960}
2013 1961
2014static int serial_imx_remove(struct platform_device *pdev) 1962static int serial_imx_remove(struct platform_device *pdev)
2015{ 1963{
2016 struct imxuart_platform_data *pdata;
2017 struct imx_port *sport = platform_get_drvdata(pdev); 1964 struct imx_port *sport = platform_get_drvdata(pdev);
2018 1965
2019 pdata = dev_get_platdata(&pdev->dev); 1966 return uart_remove_one_port(&imx_reg, &sport->port);
2020
2021 uart_remove_one_port(&imx_reg, &sport->port);
2022
2023 if (pdata && pdata->exit)
2024 pdata->exit(pdev);
2025
2026 return 0;
2027} 1967}
2028 1968
2029static struct platform_driver serial_imx_driver = { 1969static struct platform_driver serial_imx_driver = {
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index 8d71e4047bb3..2a99d0c61b9e 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Maxim (Dallas) MAX3107/8/9, MAX14830 serial driver 2 * Maxim (Dallas) MAX3107/8/9, MAX14830 serial driver
3 * 3 *
4 * Copyright (C) 2012-2013 Alexander Shiyan <shc_work@mail.ru> 4 * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
5 * 5 *
6 * Based on max3100.c, by Christian Pellegrin <chripell@evolware.org> 6 * Based on max3100.c, by Christian Pellegrin <chripell@evolware.org>
7 * Based on max3110.c, by Feng Tang <feng.tang@intel.com> 7 * Based on max3110.c, by Feng Tang <feng.tang@intel.com>
@@ -13,19 +13,21 @@
13 * (at your option) any later version. 13 * (at your option) any later version.
14 */ 14 */
15 15
16#include <linux/module.h> 16#include <linux/bitops.h>
17#include <linux/clk.h>
17#include <linux/delay.h> 18#include <linux/delay.h>
18#include <linux/device.h> 19#include <linux/device.h>
19#include <linux/bitops.h> 20#include <linux/gpio.h>
21#include <linux/module.h>
22#include <linux/of.h>
23#include <linux/of_device.h>
24#include <linux/regmap.h>
20#include <linux/serial_core.h> 25#include <linux/serial_core.h>
21#include <linux/serial.h> 26#include <linux/serial.h>
22#include <linux/tty.h> 27#include <linux/tty.h>
23#include <linux/tty_flip.h> 28#include <linux/tty_flip.h>
24#include <linux/regmap.h>
25#include <linux/gpio.h>
26#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
27 30#include <linux/uaccess.h>
28#include <linux/platform_data/max310x.h>
29 31
30#define MAX310X_NAME "max310x" 32#define MAX310X_NAME "max310x"
31#define MAX310X_MAJOR 204 33#define MAX310X_MAJOR 204
@@ -161,10 +163,6 @@
161/* IRDA register bits */ 163/* IRDA register bits */
162#define MAX310X_IRDA_IRDAEN_BIT (1 << 0) /* IRDA mode enable */ 164#define MAX310X_IRDA_IRDAEN_BIT (1 << 0) /* IRDA mode enable */
163#define MAX310X_IRDA_SIR_BIT (1 << 1) /* SIR mode enable */ 165#define MAX310X_IRDA_SIR_BIT (1 << 1) /* SIR mode enable */
164#define MAX310X_IRDA_SHORTIR_BIT (1 << 2) /* Short SIR mode enable */
165#define MAX310X_IRDA_MIR_BIT (1 << 3) /* MIR mode enable */
166#define MAX310X_IRDA_RXINV_BIT (1 << 4) /* RX logic inversion enable */
167#define MAX310X_IRDA_TXINV_BIT (1 << 5) /* TX logic inversion enable */
168 166
169/* Flow control trigger level register masks */ 167/* Flow control trigger level register masks */
170#define MAX310X_FLOWLVL_HALT_MASK (0x000f) /* Flow control halt level */ 168#define MAX310X_FLOWLVL_HALT_MASK (0x000f) /* Flow control halt level */
@@ -220,26 +218,6 @@
220 * XOFF2 218 * XOFF2
221 */ 219 */
222 220
223/* GPIO configuration register bits */
224#define MAX310X_GPIOCFG_GP0OUT_BIT (1 << 0) /* GPIO 0 output enable */
225#define MAX310X_GPIOCFG_GP1OUT_BIT (1 << 1) /* GPIO 1 output enable */
226#define MAX310X_GPIOCFG_GP2OUT_BIT (1 << 2) /* GPIO 2 output enable */
227#define MAX310X_GPIOCFG_GP3OUT_BIT (1 << 3) /* GPIO 3 output enable */
228#define MAX310X_GPIOCFG_GP0OD_BIT (1 << 4) /* GPIO 0 open-drain enable */
229#define MAX310X_GPIOCFG_GP1OD_BIT (1 << 5) /* GPIO 1 open-drain enable */
230#define MAX310X_GPIOCFG_GP2OD_BIT (1 << 6) /* GPIO 2 open-drain enable */
231#define MAX310X_GPIOCFG_GP3OD_BIT (1 << 7) /* GPIO 3 open-drain enable */
232
233/* GPIO DATA register bits */
234#define MAX310X_GPIODATA_GP0OUT_BIT (1 << 0) /* GPIO 0 output value */
235#define MAX310X_GPIODATA_GP1OUT_BIT (1 << 1) /* GPIO 1 output value */
236#define MAX310X_GPIODATA_GP2OUT_BIT (1 << 2) /* GPIO 2 output value */
237#define MAX310X_GPIODATA_GP3OUT_BIT (1 << 3) /* GPIO 3 output value */
238#define MAX310X_GPIODATA_GP0IN_BIT (1 << 4) /* GPIO 0 input value */
239#define MAX310X_GPIODATA_GP1IN_BIT (1 << 5) /* GPIO 1 input value */
240#define MAX310X_GPIODATA_GP2IN_BIT (1 << 6) /* GPIO 2 input value */
241#define MAX310X_GPIODATA_GP3IN_BIT (1 << 7) /* GPIO 3 input value */
242
243/* PLL configuration register masks */ 221/* PLL configuration register masks */
244#define MAX310X_PLLCFG_PREDIV_MASK (0x3f) /* PLL predivision value */ 222#define MAX310X_PLLCFG_PREDIV_MASK (0x3f) /* PLL predivision value */
245#define MAX310X_PLLCFG_PLLFACTOR_MASK (0xc0) /* PLL multiplication factor */ 223#define MAX310X_PLLCFG_PLLFACTOR_MASK (0xc0) /* PLL multiplication factor */
@@ -283,16 +261,15 @@ struct max310x_devtype {
283struct max310x_one { 261struct max310x_one {
284 struct uart_port port; 262 struct uart_port port;
285 struct work_struct tx_work; 263 struct work_struct tx_work;
264 struct work_struct md_work;
286}; 265};
287 266
288struct max310x_port { 267struct max310x_port {
289 struct uart_driver uart; 268 struct uart_driver uart;
290 struct max310x_devtype *devtype; 269 struct max310x_devtype *devtype;
291 struct regmap *regmap; 270 struct regmap *regmap;
292 struct regmap_config regcfg;
293 struct mutex mutex; 271 struct mutex mutex;
294 struct max310x_pdata *pdata; 272 struct clk *clk;
295 int gpio_used;
296#ifdef CONFIG_GPIOLIB 273#ifdef CONFIG_GPIOLIB
297 struct gpio_chip gpio; 274 struct gpio_chip gpio;
298#endif 275#endif
@@ -504,25 +481,33 @@ static bool max310x_reg_precious(struct device *dev, unsigned int reg)
504 return false; 481 return false;
505} 482}
506 483
507static void max310x_set_baud(struct uart_port *port, int baud) 484static int max310x_set_baud(struct uart_port *port, int baud)
508{ 485{
509 unsigned int mode = 0, div = port->uartclk / baud; 486 unsigned int mode = 0, clk = port->uartclk, div = clk / baud;
510 487
511 if (!(div / 16)) { 488 /* Check for minimal value for divider */
489 if (div < 16)
490 div = 16;
491
492 if (clk % baud && (div / 16) < 0x8000) {
512 /* Mode x2 */ 493 /* Mode x2 */
513 mode = MAX310X_BRGCFG_2XMODE_BIT; 494 mode = MAX310X_BRGCFG_2XMODE_BIT;
514 div = (port->uartclk * 2) / baud; 495 clk = port->uartclk * 2;
515 } 496 div = clk / baud;
516 497
517 if (!(div / 16)) { 498 if (clk % baud && (div / 16) < 0x8000) {
518 /* Mode x4 */ 499 /* Mode x4 */
519 mode = MAX310X_BRGCFG_4XMODE_BIT; 500 mode = MAX310X_BRGCFG_4XMODE_BIT;
520 div = (port->uartclk * 4) / baud; 501 clk = port->uartclk * 4;
502 div = clk / baud;
503 }
521 } 504 }
522 505
523 max310x_port_write(port, MAX310X_BRGDIVMSB_REG, (div / 16) >> 8); 506 max310x_port_write(port, MAX310X_BRGDIVMSB_REG, (div / 16) >> 8);
524 max310x_port_write(port, MAX310X_BRGDIVLSB_REG, div / 16); 507 max310x_port_write(port, MAX310X_BRGDIVLSB_REG, div / 16);
525 max310x_port_write(port, MAX310X_BRGCFG_REG, (div % 16) | mode); 508 max310x_port_write(port, MAX310X_BRGCFG_REG, (div % 16) | mode);
509
510 return DIV_ROUND_CLOSEST(clk, div);
526} 511}
527 512
528static int max310x_update_best_err(unsigned long f, long *besterr) 513static int max310x_update_best_err(unsigned long f, long *besterr)
@@ -538,18 +523,19 @@ static int max310x_update_best_err(unsigned long f, long *besterr)
538 return 1; 523 return 1;
539} 524}
540 525
541static int max310x_set_ref_clk(struct max310x_port *s) 526static int max310x_set_ref_clk(struct max310x_port *s, unsigned long freq,
527 bool xtal)
542{ 528{
543 unsigned int div, clksrc, pllcfg = 0; 529 unsigned int div, clksrc, pllcfg = 0;
544 long besterr = -1; 530 long besterr = -1;
545 unsigned long fdiv, fmul, bestfreq = s->pdata->frequency; 531 unsigned long fdiv, fmul, bestfreq = freq;
546 532
547 /* First, update error without PLL */ 533 /* First, update error without PLL */
548 max310x_update_best_err(s->pdata->frequency, &besterr); 534 max310x_update_best_err(freq, &besterr);
549 535
550 /* Try all possible PLL dividers */ 536 /* Try all possible PLL dividers */
551 for (div = 1; (div <= 63) && besterr; div++) { 537 for (div = 1; (div <= 63) && besterr; div++) {
552 fdiv = DIV_ROUND_CLOSEST(s->pdata->frequency, div); 538 fdiv = DIV_ROUND_CLOSEST(freq, div);
553 539
554 /* Try multiplier 6 */ 540 /* Try multiplier 6 */
555 fmul = fdiv * 6; 541 fmul = fdiv * 6;
@@ -582,10 +568,7 @@ static int max310x_set_ref_clk(struct max310x_port *s)
582 } 568 }
583 569
584 /* Configure clock source */ 570 /* Configure clock source */
585 if (s->pdata->driver_flags & MAX310X_EXT_CLK) 571 clksrc = xtal ? MAX310X_CLKSRC_CRYST_BIT : MAX310X_CLKSRC_EXTCLK_BIT;
586 clksrc = MAX310X_CLKSRC_EXTCLK_BIT;
587 else
588 clksrc = MAX310X_CLKSRC_CRYST_BIT;
589 572
590 /* Configure PLL */ 573 /* Configure PLL */
591 if (pllcfg) { 574 if (pllcfg) {
@@ -597,7 +580,7 @@ static int max310x_set_ref_clk(struct max310x_port *s)
597 regmap_write(s->regmap, MAX310X_CLKSRC_REG, clksrc); 580 regmap_write(s->regmap, MAX310X_CLKSRC_REG, clksrc);
598 581
599 /* Wait for crystal */ 582 /* Wait for crystal */
600 if (pllcfg && !(s->pdata->driver_flags & MAX310X_EXT_CLK)) 583 if (pllcfg && xtal)
601 msleep(10); 584 msleep(10);
602 585
603 return (int)bestfreq; 586 return (int)bestfreq;
@@ -782,11 +765,21 @@ static unsigned int max310x_get_mctrl(struct uart_port *port)
782 return TIOCM_DSR | TIOCM_CAR; 765 return TIOCM_DSR | TIOCM_CAR;
783} 766}
784 767
768static void max310x_md_proc(struct work_struct *ws)
769{
770 struct max310x_one *one = container_of(ws, struct max310x_one, md_work);
771
772 max310x_port_update(&one->port, MAX310X_MODE2_REG,
773 MAX310X_MODE2_LOOPBACK_BIT,
774 (one->port.mctrl & TIOCM_LOOP) ?
775 MAX310X_MODE2_LOOPBACK_BIT : 0);
776}
777
785static void max310x_set_mctrl(struct uart_port *port, unsigned int mctrl) 778static void max310x_set_mctrl(struct uart_port *port, unsigned int mctrl)
786{ 779{
787 /* DCD and DSR are not wired and CTS/RTS is hadnled automatically 780 struct max310x_one *one = container_of(port, struct max310x_one, port);
788 * so do nothing 781
789 */ 782 schedule_work(&one->md_work);
790} 783}
791 784
792static void max310x_break_ctl(struct uart_port *port, int break_state) 785static void max310x_break_ctl(struct uart_port *port, int break_state)
@@ -875,40 +868,76 @@ static void max310x_set_termios(struct uart_port *port,
875 port->uartclk / 4); 868 port->uartclk / 4);
876 869
877 /* Setup baudrate generator */ 870 /* Setup baudrate generator */
878 max310x_set_baud(port, baud); 871 baud = max310x_set_baud(port, baud);
879 872
880 /* Update timeout according to new baud rate */ 873 /* Update timeout according to new baud rate */
881 uart_update_timeout(port, termios->c_cflag, baud); 874 uart_update_timeout(port, termios->c_cflag, baud);
882} 875}
883 876
877static int max310x_ioctl(struct uart_port *port, unsigned int cmd,
878 unsigned long arg)
879{
880#if defined(TIOCSRS485) && defined(TIOCGRS485)
881 struct serial_rs485 rs485;
882 unsigned int val;
883
884 switch (cmd) {
885 case TIOCSRS485:
886 if (copy_from_user(&rs485, (void __user *)arg, sizeof(rs485)))
887 return -EFAULT;
888 if (rs485.delay_rts_before_send > 0x0f ||
889 rs485.delay_rts_after_send > 0x0f)
890 return -ERANGE;
891 val = (rs485.delay_rts_before_send << 4) |
892 rs485.delay_rts_after_send;
893 max310x_port_write(port, MAX310X_HDPIXDELAY_REG, val);
894 if (rs485.flags & SER_RS485_ENABLED) {
895 max310x_port_update(port, MAX310X_MODE1_REG,
896 MAX310X_MODE1_TRNSCVCTRL_BIT,
897 MAX310X_MODE1_TRNSCVCTRL_BIT);
898 max310x_port_update(port, MAX310X_MODE2_REG,
899 MAX310X_MODE2_ECHOSUPR_BIT,
900 MAX310X_MODE2_ECHOSUPR_BIT);
901 } else {
902 max310x_port_update(port, MAX310X_MODE1_REG,
903 MAX310X_MODE1_TRNSCVCTRL_BIT, 0);
904 max310x_port_update(port, MAX310X_MODE2_REG,
905 MAX310X_MODE2_ECHOSUPR_BIT, 0);
906 }
907 return 0;
908 case TIOCGRS485:
909 memset(&rs485, 0, sizeof(rs485));
910 val = max310x_port_read(port, MAX310X_MODE1_REG);
911 rs485.flags = (val & MAX310X_MODE1_TRNSCVCTRL_BIT) ?
912 SER_RS485_ENABLED : 0;
913 rs485.flags |= SER_RS485_RTS_ON_SEND;
914 val = max310x_port_read(port, MAX310X_HDPIXDELAY_REG);
915 rs485.delay_rts_before_send = val >> 4;
916 rs485.delay_rts_after_send = val & 0x0f;
917 if (copy_to_user((void __user *)arg, &rs485, sizeof(rs485)))
918 return -EFAULT;
919 return 0;
920 default:
921 break;
922 }
923#endif
924
925 return -ENOIOCTLCMD;
926}
927
884static int max310x_startup(struct uart_port *port) 928static int max310x_startup(struct uart_port *port)
885{ 929{
886 unsigned int val, line = port->line;
887 struct max310x_port *s = dev_get_drvdata(port->dev); 930 struct max310x_port *s = dev_get_drvdata(port->dev);
931 unsigned int val;
888 932
889 s->devtype->power(port, 1); 933 s->devtype->power(port, 1);
890 934
891 /* Configure baud rate, 9600 as default */
892 max310x_set_baud(port, 9600);
893
894 /* Configure LCR register, 8N1 mode by default */
895 max310x_port_write(port, MAX310X_LCR_REG, MAX310X_LCR_WORD_LEN_8);
896
897 /* Configure MODE1 register */ 935 /* Configure MODE1 register */
898 max310x_port_update(port, MAX310X_MODE1_REG, 936 max310x_port_update(port, MAX310X_MODE1_REG,
899 MAX310X_MODE1_TRNSCVCTRL_BIT, 937 MAX310X_MODE1_TRNSCVCTRL_BIT, 0);
900 (s->pdata->uart_flags[line] & MAX310X_AUTO_DIR_CTRL) 938
901 ? MAX310X_MODE1_TRNSCVCTRL_BIT : 0); 939 /* Configure MODE2 register & Reset FIFOs*/
902 940 val = MAX310X_MODE2_RXEMPTINV_BIT | MAX310X_MODE2_FIFORST_BIT;
903 /* Configure MODE2 register */
904 val = MAX310X_MODE2_RXEMPTINV_BIT;
905 if (s->pdata->uart_flags[line] & MAX310X_LOOPBACK)
906 val |= MAX310X_MODE2_LOOPBACK_BIT;
907 if (s->pdata->uart_flags[line] & MAX310X_ECHO_SUPRESS)
908 val |= MAX310X_MODE2_ECHOSUPR_BIT;
909
910 /* Reset FIFOs */
911 val |= MAX310X_MODE2_FIFORST_BIT;
912 max310x_port_write(port, MAX310X_MODE2_REG, val); 941 max310x_port_write(port, MAX310X_MODE2_REG, val);
913 max310x_port_update(port, MAX310X_MODE2_REG, 942 max310x_port_update(port, MAX310X_MODE2_REG,
914 MAX310X_MODE2_FIFORST_BIT, 0); 943 MAX310X_MODE2_FIFORST_BIT, 0);
@@ -989,6 +1018,7 @@ static const struct uart_ops max310x_ops = {
989 .release_port = max310x_null_void, 1018 .release_port = max310x_null_void,
990 .config_port = max310x_config_port, 1019 .config_port = max310x_config_port,
991 .verify_port = max310x_verify_port, 1020 .verify_port = max310x_verify_port,
1021 .ioctl = max310x_ioctl,
992}; 1022};
993 1023
994static int __maybe_unused max310x_suspend(struct device *dev) 1024static int __maybe_unused max310x_suspend(struct device *dev)
@@ -1017,6 +1047,8 @@ static int __maybe_unused max310x_resume(struct device *dev)
1017 return 0; 1047 return 0;
1018} 1048}
1019 1049
1050static SIMPLE_DEV_PM_OPS(max310x_pm_ops, max310x_suspend, max310x_resume);
1051
1020#ifdef CONFIG_GPIOLIB 1052#ifdef CONFIG_GPIOLIB
1021static int max310x_gpio_get(struct gpio_chip *chip, unsigned offset) 1053static int max310x_gpio_get(struct gpio_chip *chip, unsigned offset)
1022{ 1054{
@@ -1063,23 +1095,16 @@ static int max310x_gpio_direction_output(struct gpio_chip *chip,
1063} 1095}
1064#endif 1096#endif
1065 1097
1066static int max310x_probe(struct device *dev, int is_spi, 1098static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
1067 struct max310x_devtype *devtype, int irq) 1099 struct regmap *regmap, int irq, unsigned long flags)
1068{ 1100{
1101 int i, ret, fmin, fmax, freq, uartclk;
1102 struct clk *clk_osc, *clk_xtal;
1069 struct max310x_port *s; 1103 struct max310x_port *s;
1070 struct max310x_pdata *pdata = dev_get_platdata(dev); 1104 bool xtal = false;
1071 int i, ret, uartclk;
1072
1073 /* Check for IRQ */
1074 if (irq <= 0) {
1075 dev_err(dev, "No IRQ specified\n");
1076 return -ENOTSUPP;
1077 }
1078 1105
1079 if (!pdata) { 1106 if (IS_ERR(regmap))
1080 dev_err(dev, "No platform data supplied\n"); 1107 return PTR_ERR(regmap);
1081 return -EINVAL;
1082 }
1083 1108
1084 /* Alloc port structure */ 1109 /* Alloc port structure */
1085 s = devm_kzalloc(dev, sizeof(*s) + 1110 s = devm_kzalloc(dev, sizeof(*s) +
@@ -1089,52 +1114,44 @@ static int max310x_probe(struct device *dev, int is_spi,
1089 return -ENOMEM; 1114 return -ENOMEM;
1090 } 1115 }
1091 1116
1092 /* Check input frequency */ 1117 clk_osc = devm_clk_get(dev, "osc");
1093 if ((pdata->driver_flags & MAX310X_EXT_CLK) && 1118 clk_xtal = devm_clk_get(dev, "xtal");
1094 ((pdata->frequency < 500000) || (pdata->frequency > 35000000))) 1119 if (!IS_ERR(clk_osc)) {
1095 goto err_freq; 1120 s->clk = clk_osc;
1096 /* Check frequency for quartz */ 1121 fmin = 500000;
1097 if (!(pdata->driver_flags & MAX310X_EXT_CLK) && 1122 fmax = 35000000;
1098 ((pdata->frequency < 1000000) || (pdata->frequency > 4000000))) 1123 } else if (!IS_ERR(clk_xtal)) {
1099 goto err_freq; 1124 s->clk = clk_xtal;
1100 1125 fmin = 1000000;
1101 s->pdata = pdata; 1126 fmax = 4000000;
1102 s->devtype = devtype; 1127 xtal = true;
1103 dev_set_drvdata(dev, s); 1128 } else if (PTR_ERR(clk_osc) == -EPROBE_DEFER ||
1104 1129 PTR_ERR(clk_xtal) == -EPROBE_DEFER) {
1105 mutex_init(&s->mutex); 1130 return -EPROBE_DEFER;
1131 } else {
1132 dev_err(dev, "Cannot get clock\n");
1133 return -EINVAL;
1134 }
1106 1135
1107 /* Setup regmap */ 1136 ret = clk_prepare_enable(s->clk);
1108 s->regcfg.reg_bits = 8; 1137 if (ret)
1109 s->regcfg.val_bits = 8; 1138 return ret;
1110 s->regcfg.read_flag_mask = 0x00;
1111 s->regcfg.write_flag_mask = 0x80;
1112 s->regcfg.cache_type = REGCACHE_RBTREE;
1113 s->regcfg.writeable_reg = max310x_reg_writeable;
1114 s->regcfg.volatile_reg = max310x_reg_volatile;
1115 s->regcfg.precious_reg = max310x_reg_precious;
1116 s->regcfg.max_register = devtype->nr * 0x20 - 1;
1117
1118 if (IS_ENABLED(CONFIG_SPI_MASTER) && is_spi) {
1119 struct spi_device *spi = to_spi_device(dev);
1120
1121 s->regmap = devm_regmap_init_spi(spi, &s->regcfg);
1122 } else
1123 return -ENOTSUPP;
1124 1139
1125 if (IS_ERR(s->regmap)) { 1140 freq = clk_get_rate(s->clk);
1126 dev_err(dev, "Failed to initialize register map\n"); 1141 /* Check frequency limits */
1127 return PTR_ERR(s->regmap); 1142 if (freq < fmin || freq > fmax) {
1143 ret = -ERANGE;
1144 goto out_clk;
1128 } 1145 }
1129 1146
1130 /* Board specific configure */ 1147 s->regmap = regmap;
1131 if (s->pdata->init) 1148 s->devtype = devtype;
1132 s->pdata->init(); 1149 dev_set_drvdata(dev, s);
1133 1150
1134 /* Check device to ensure we are talking to what we expect */ 1151 /* Check device to ensure we are talking to what we expect */
1135 ret = devtype->detect(dev); 1152 ret = devtype->detect(dev);
1136 if (ret) 1153 if (ret)
1137 return ret; 1154 goto out_clk;
1138 1155
1139 for (i = 0; i < devtype->nr; i++) { 1156 for (i = 0; i < devtype->nr; i++) {
1140 unsigned int offs = i << 5; 1157 unsigned int offs = i << 5;
@@ -1156,7 +1173,7 @@ static int max310x_probe(struct device *dev, int is_spi,
1156 MAX310X_MODE1_AUTOSLEEP_BIT); 1173 MAX310X_MODE1_AUTOSLEEP_BIT);
1157 } 1174 }
1158 1175
1159 uartclk = max310x_set_ref_clk(s); 1176 uartclk = max310x_set_ref_clk(s, freq, xtal);
1160 dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk); 1177 dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);
1161 1178
1162 /* Register UART driver */ 1179 /* Register UART driver */
@@ -1168,9 +1185,28 @@ static int max310x_probe(struct device *dev, int is_spi,
1168 ret = uart_register_driver(&s->uart); 1185 ret = uart_register_driver(&s->uart);
1169 if (ret) { 1186 if (ret) {
1170 dev_err(dev, "Registering UART driver failed\n"); 1187 dev_err(dev, "Registering UART driver failed\n");
1171 return ret; 1188 goto out_clk;
1172 } 1189 }
1173 1190
1191#ifdef CONFIG_GPIOLIB
1192 /* Setup GPIO cotroller */
1193 s->gpio.owner = THIS_MODULE;
1194 s->gpio.dev = dev;
1195 s->gpio.label = dev_name(dev);
1196 s->gpio.direction_input = max310x_gpio_direction_input;
1197 s->gpio.get = max310x_gpio_get;
1198 s->gpio.direction_output= max310x_gpio_direction_output;
1199 s->gpio.set = max310x_gpio_set;
1200 s->gpio.base = -1;
1201 s->gpio.ngpio = devtype->nr * 4;
1202 s->gpio.can_sleep = 1;
1203 ret = gpiochip_add(&s->gpio);
1204 if (ret)
1205 goto out_uart;
1206#endif
1207
1208 mutex_init(&s->mutex);
1209
1174 for (i = 0; i < devtype->nr; i++) { 1210 for (i = 0; i < devtype->nr; i++) {
1175 /* Initialize port data */ 1211 /* Initialize port data */
1176 s->p[i].port.line = i; 1212 s->p[i].port.line = i;
@@ -1178,8 +1214,7 @@ static int max310x_probe(struct device *dev, int is_spi,
1178 s->p[i].port.irq = irq; 1214 s->p[i].port.irq = irq;
1179 s->p[i].port.type = PORT_MAX310X; 1215 s->p[i].port.type = PORT_MAX310X;
1180 s->p[i].port.fifosize = MAX310X_FIFO_SIZE; 1216 s->p[i].port.fifosize = MAX310X_FIFO_SIZE;
1181 s->p[i].port.flags = UPF_SKIP_TEST | UPF_FIXED_TYPE | 1217 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
1182 UPF_LOW_LATENCY;
1183 s->p[i].port.iotype = UPIO_PORT; 1218 s->p[i].port.iotype = UPIO_PORT;
1184 s->p[i].port.iobase = i * 0x20; 1219 s->p[i].port.iobase = i * 0x20;
1185 s->p[i].port.membase = (void __iomem *)~0; 1220 s->p[i].port.membase = (void __iomem *)~0;
@@ -1195,48 +1230,35 @@ static int max310x_probe(struct device *dev, int is_spi,
1195 MAX310X_MODE1_IRQSEL_BIT); 1230 MAX310X_MODE1_IRQSEL_BIT);
1196 /* Initialize queue for start TX */ 1231 /* Initialize queue for start TX */
1197 INIT_WORK(&s->p[i].tx_work, max310x_wq_proc); 1232 INIT_WORK(&s->p[i].tx_work, max310x_wq_proc);
1233 /* Initialize queue for changing mode */
1234 INIT_WORK(&s->p[i].md_work, max310x_md_proc);
1198 /* Register port */ 1235 /* Register port */
1199 uart_add_one_port(&s->uart, &s->p[i].port); 1236 uart_add_one_port(&s->uart, &s->p[i].port);
1200 /* Go to suspend mode */ 1237 /* Go to suspend mode */
1201 devtype->power(&s->p[i].port, 0); 1238 devtype->power(&s->p[i].port, 0);
1202 } 1239 }
1203 1240
1204#ifdef CONFIG_GPIOLIB
1205 /* Setup GPIO cotroller */
1206 if (s->pdata->gpio_base) {
1207 s->gpio.owner = THIS_MODULE;
1208 s->gpio.dev = dev;
1209 s->gpio.label = dev_name(dev);
1210 s->gpio.direction_input = max310x_gpio_direction_input;
1211 s->gpio.get = max310x_gpio_get;
1212 s->gpio.direction_output= max310x_gpio_direction_output;
1213 s->gpio.set = max310x_gpio_set;
1214 s->gpio.base = s->pdata->gpio_base;
1215 s->gpio.ngpio = devtype->nr * 4;
1216 s->gpio.can_sleep = 1;
1217 if (!gpiochip_add(&s->gpio))
1218 s->gpio_used = 1;
1219 } else
1220 dev_info(dev, "GPIO support not enabled\n");
1221#endif
1222
1223 /* Setup interrupt */ 1241 /* Setup interrupt */
1224 ret = devm_request_threaded_irq(dev, irq, NULL, max310x_ist, 1242 ret = devm_request_threaded_irq(dev, irq, NULL, max310x_ist,
1225 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 1243 IRQF_ONESHOT | flags, dev_name(dev), s);
1226 dev_name(dev), s); 1244 if (!ret)
1227 if (ret) { 1245 return 0;
1228 dev_err(dev, "Unable to reguest IRQ %i\n", irq); 1246
1247 dev_err(dev, "Unable to reguest IRQ %i\n", irq);
1248
1249 mutex_destroy(&s->mutex);
1250
1229#ifdef CONFIG_GPIOLIB 1251#ifdef CONFIG_GPIOLIB
1230 if (s->gpio_used) 1252 WARN_ON(gpiochip_remove(&s->gpio));
1231 WARN_ON(gpiochip_remove(&s->gpio)); 1253
1254out_uart:
1232#endif 1255#endif
1233 } 1256 uart_unregister_driver(&s->uart);
1234 1257
1235 return ret; 1258out_clk:
1259 clk_disable_unprepare(s->clk);
1236 1260
1237err_freq: 1261 return ret;
1238 dev_err(dev, "Frequency parameter incorrect\n");
1239 return -EINVAL;
1240} 1262}
1241 1263
1242static int max310x_remove(struct device *dev) 1264static int max310x_remove(struct device *dev)
@@ -1244,30 +1266,51 @@ static int max310x_remove(struct device *dev)
1244 struct max310x_port *s = dev_get_drvdata(dev); 1266 struct max310x_port *s = dev_get_drvdata(dev);
1245 int i, ret = 0; 1267 int i, ret = 0;
1246 1268
1269#ifdef CONFIG_GPIOLIB
1270 ret = gpiochip_remove(&s->gpio);
1271 if (ret)
1272 return ret;
1273#endif
1274
1247 for (i = 0; i < s->uart.nr; i++) { 1275 for (i = 0; i < s->uart.nr; i++) {
1248 cancel_work_sync(&s->p[i].tx_work); 1276 cancel_work_sync(&s->p[i].tx_work);
1277 cancel_work_sync(&s->p[i].md_work);
1249 uart_remove_one_port(&s->uart, &s->p[i].port); 1278 uart_remove_one_port(&s->uart, &s->p[i].port);
1250 s->devtype->power(&s->p[i].port, 0); 1279 s->devtype->power(&s->p[i].port, 0);
1251 } 1280 }
1252 1281
1282 mutex_destroy(&s->mutex);
1253 uart_unregister_driver(&s->uart); 1283 uart_unregister_driver(&s->uart);
1254 1284 clk_disable_unprepare(s->clk);
1255#ifdef CONFIG_GPIOLIB
1256 if (s->gpio_used)
1257 ret = gpiochip_remove(&s->gpio);
1258#endif
1259
1260 if (s->pdata->exit)
1261 s->pdata->exit();
1262 1285
1263 return ret; 1286 return ret;
1264} 1287}
1265 1288
1289static const struct of_device_id __maybe_unused max310x_dt_ids[] = {
1290 { .compatible = "maxim,max3107", .data = &max3107_devtype, },
1291 { .compatible = "maxim,max3108", .data = &max3108_devtype, },
1292 { .compatible = "maxim,max3109", .data = &max3109_devtype, },
1293 { .compatible = "maxim,max14830", .data = &max14830_devtype },
1294 { }
1295};
1296MODULE_DEVICE_TABLE(of, max310x_dt_ids);
1297
1298static struct regmap_config regcfg = {
1299 .reg_bits = 8,
1300 .val_bits = 8,
1301 .write_flag_mask = 0x80,
1302 .cache_type = REGCACHE_RBTREE,
1303 .writeable_reg = max310x_reg_writeable,
1304 .volatile_reg = max310x_reg_volatile,
1305 .precious_reg = max310x_reg_precious,
1306};
1307
1266#ifdef CONFIG_SPI_MASTER 1308#ifdef CONFIG_SPI_MASTER
1267static int max310x_spi_probe(struct spi_device *spi) 1309static int max310x_spi_probe(struct spi_device *spi)
1268{ 1310{
1269 struct max310x_devtype *devtype = 1311 struct max310x_devtype *devtype;
1270 (struct max310x_devtype *)spi_get_device_id(spi)->driver_data; 1312 unsigned long flags = 0;
1313 struct regmap *regmap;
1271 int ret; 1314 int ret;
1272 1315
1273 /* Setup SPI bus */ 1316 /* Setup SPI bus */
@@ -1275,12 +1318,25 @@ static int max310x_spi_probe(struct spi_device *spi)
1275 spi->mode = spi->mode ? : SPI_MODE_0; 1318 spi->mode = spi->mode ? : SPI_MODE_0;
1276 spi->max_speed_hz = spi->max_speed_hz ? : 26000000; 1319 spi->max_speed_hz = spi->max_speed_hz ? : 26000000;
1277 ret = spi_setup(spi); 1320 ret = spi_setup(spi);
1278 if (ret) { 1321 if (ret)
1279 dev_err(&spi->dev, "SPI setup failed\n");
1280 return ret; 1322 return ret;
1323
1324 if (spi->dev.of_node) {
1325 const struct of_device_id *of_id =
1326 of_match_device(max310x_dt_ids, &spi->dev);
1327
1328 devtype = (struct max310x_devtype *)of_id->data;
1329 } else {
1330 const struct spi_device_id *id_entry = spi_get_device_id(spi);
1331
1332 devtype = (struct max310x_devtype *)id_entry->driver_data;
1333 flags = IRQF_TRIGGER_FALLING;
1281 } 1334 }
1282 1335
1283 return max310x_probe(&spi->dev, 1, devtype, spi->irq); 1336 regcfg.max_register = devtype->nr * 0x20 - 1;
1337 regmap = devm_regmap_init_spi(spi, &regcfg);
1338
1339 return max310x_probe(&spi->dev, devtype, regmap, spi->irq, flags);
1284} 1340}
1285 1341
1286static int max310x_spi_remove(struct spi_device *spi) 1342static int max310x_spi_remove(struct spi_device *spi)
@@ -1288,8 +1344,6 @@ static int max310x_spi_remove(struct spi_device *spi)
1288 return max310x_remove(&spi->dev); 1344 return max310x_remove(&spi->dev);
1289} 1345}
1290 1346
1291static SIMPLE_DEV_PM_OPS(max310x_pm_ops, max310x_suspend, max310x_resume);
1292
1293static const struct spi_device_id max310x_id_table[] = { 1347static const struct spi_device_id max310x_id_table[] = {
1294 { "max3107", (kernel_ulong_t)&max3107_devtype, }, 1348 { "max3107", (kernel_ulong_t)&max3107_devtype, },
1295 { "max3108", (kernel_ulong_t)&max3108_devtype, }, 1349 { "max3108", (kernel_ulong_t)&max3108_devtype, },
@@ -1301,9 +1355,10 @@ MODULE_DEVICE_TABLE(spi, max310x_id_table);
1301 1355
1302static struct spi_driver max310x_uart_driver = { 1356static struct spi_driver max310x_uart_driver = {
1303 .driver = { 1357 .driver = {
1304 .name = MAX310X_NAME, 1358 .name = MAX310X_NAME,
1305 .owner = THIS_MODULE, 1359 .owner = THIS_MODULE,
1306 .pm = &max310x_pm_ops, 1360 .of_match_table = of_match_ptr(max310x_dt_ids),
1361 .pm = &max310x_pm_ops,
1307 }, 1362 },
1308 .probe = max310x_spi_probe, 1363 .probe = max310x_spi_probe,
1309 .remove = max310x_spi_remove, 1364 .remove = max310x_spi_remove,
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index b5d779cd3c2b..053b98eb46c8 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -39,6 +39,13 @@
39 39
40#include "msm_serial.h" 40#include "msm_serial.h"
41 41
42enum {
43 UARTDM_1P1 = 1,
44 UARTDM_1P2,
45 UARTDM_1P3,
46 UARTDM_1P4,
47};
48
42struct msm_port { 49struct msm_port {
43 struct uart_port uart; 50 struct uart_port uart;
44 char name[16]; 51 char name[16];
@@ -309,6 +316,8 @@ static unsigned int msm_get_mctrl(struct uart_port *port)
309 316
310static void msm_reset(struct uart_port *port) 317static void msm_reset(struct uart_port *port)
311{ 318{
319 struct msm_port *msm_port = UART_TO_MSM(port);
320
312 /* reset everything */ 321 /* reset everything */
313 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR); 322 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR);
314 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR); 323 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR);
@@ -316,6 +325,10 @@ static void msm_reset(struct uart_port *port)
316 msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR); 325 msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR);
317 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); 326 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);
318 msm_write(port, UART_CR_CMD_SET_RFR, UART_CR); 327 msm_write(port, UART_CR_CMD_SET_RFR, UART_CR);
328
329 /* Disable DM modes */
330 if (msm_port->is_uartdm)
331 msm_write(port, 0, UARTDM_DMEN);
319} 332}
320 333
321static void msm_set_mctrl(struct uart_port *port, unsigned int mctrl) 334static void msm_set_mctrl(struct uart_port *port, unsigned int mctrl)
@@ -711,6 +724,117 @@ static void msm_power(struct uart_port *port, unsigned int state,
711 } 724 }
712} 725}
713 726
727#ifdef CONFIG_CONSOLE_POLL
728static int msm_poll_init(struct uart_port *port)
729{
730 struct msm_port *msm_port = UART_TO_MSM(port);
731
732 /* Enable single character mode on RX FIFO */
733 if (msm_port->is_uartdm >= UARTDM_1P4)
734 msm_write(port, UARTDM_DMEN_RX_SC_ENABLE, UARTDM_DMEN);
735
736 return 0;
737}
738
739static int msm_poll_get_char_single(struct uart_port *port)
740{
741 struct msm_port *msm_port = UART_TO_MSM(port);
742 unsigned int rf_reg = msm_port->is_uartdm ? UARTDM_RF : UART_RF;
743
744 if (!(msm_read(port, UART_SR) & UART_SR_RX_READY))
745 return NO_POLL_CHAR;
746 else
747 return msm_read(port, rf_reg) & 0xff;
748}
749
750static int msm_poll_get_char_dm_1p3(struct uart_port *port)
751{
752 int c;
753 static u32 slop;
754 static int count;
755 unsigned char *sp = (unsigned char *)&slop;
756
757 /* Check if a previous read had more than one char */
758 if (count) {
759 c = sp[sizeof(slop) - count];
760 count--;
761 /* Or if FIFO is empty */
762 } else if (!(msm_read(port, UART_SR) & UART_SR_RX_READY)) {
763 /*
764 * If RX packing buffer has less than a word, force stale to
765 * push contents into RX FIFO
766 */
767 count = msm_read(port, UARTDM_RXFS);
768 count = (count >> UARTDM_RXFS_BUF_SHIFT) & UARTDM_RXFS_BUF_MASK;
769 if (count) {
770 msm_write(port, UART_CR_CMD_FORCE_STALE, UART_CR);
771 slop = msm_read(port, UARTDM_RF);
772 c = sp[0];
773 count--;
774 } else {
775 c = NO_POLL_CHAR;
776 }
777 /* FIFO has a word */
778 } else {
779 slop = msm_read(port, UARTDM_RF);
780 c = sp[0];
781 count = sizeof(slop) - 1;
782 }
783
784 return c;
785}
786
787static int msm_poll_get_char(struct uart_port *port)
788{
789 u32 imr;
790 int c;
791 struct msm_port *msm_port = UART_TO_MSM(port);
792
793 /* Disable all interrupts */
794 imr = msm_read(port, UART_IMR);
795 msm_write(port, 0, UART_IMR);
796
797 if (msm_port->is_uartdm == UARTDM_1P3)
798 c = msm_poll_get_char_dm_1p3(port);
799 else
800 c = msm_poll_get_char_single(port);
801
802 /* Enable interrupts */
803 msm_write(port, imr, UART_IMR);
804
805 return c;
806}
807
808static void msm_poll_put_char(struct uart_port *port, unsigned char c)
809{
810 u32 imr;
811 struct msm_port *msm_port = UART_TO_MSM(port);
812
813 /* Disable all interrupts */
814 imr = msm_read(port, UART_IMR);
815 msm_write(port, 0, UART_IMR);
816
817 if (msm_port->is_uartdm)
818 reset_dm_count(port, 1);
819
820 /* Wait until FIFO is empty */
821 while (!(msm_read(port, UART_SR) & UART_SR_TX_READY))
822 cpu_relax();
823
824 /* Write a character */
825 msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : UART_TF);
826
827 /* Wait until FIFO is empty */
828 while (!(msm_read(port, UART_SR) & UART_SR_TX_READY))
829 cpu_relax();
830
831 /* Enable interrupts */
832 msm_write(port, imr, UART_IMR);
833
834 return;
835}
836#endif
837
714static struct uart_ops msm_uart_pops = { 838static struct uart_ops msm_uart_pops = {
715 .tx_empty = msm_tx_empty, 839 .tx_empty = msm_tx_empty,
716 .set_mctrl = msm_set_mctrl, 840 .set_mctrl = msm_set_mctrl,
@@ -729,6 +853,11 @@ static struct uart_ops msm_uart_pops = {
729 .config_port = msm_config_port, 853 .config_port = msm_config_port,
730 .verify_port = msm_verify_port, 854 .verify_port = msm_verify_port,
731 .pm = msm_power, 855 .pm = msm_power,
856#ifdef CONFIG_CONSOLE_POLL
857 .poll_init = msm_poll_init,
858 .poll_get_char = msm_poll_get_char,
859 .poll_put_char = msm_poll_put_char,
860#endif
732}; 861};
733 862
734static struct msm_port msm_uart_ports[] = { 863static struct msm_port msm_uart_ports[] = {
@@ -900,7 +1029,10 @@ static struct uart_driver msm_uart_driver = {
900static atomic_t msm_uart_next_id = ATOMIC_INIT(0); 1029static atomic_t msm_uart_next_id = ATOMIC_INIT(0);
901 1030
902static const struct of_device_id msm_uartdm_table[] = { 1031static const struct of_device_id msm_uartdm_table[] = {
903 { .compatible = "qcom,msm-uartdm" }, 1032 { .compatible = "qcom,msm-uartdm-v1.1", .data = (void *)UARTDM_1P1 },
1033 { .compatible = "qcom,msm-uartdm-v1.2", .data = (void *)UARTDM_1P2 },
1034 { .compatible = "qcom,msm-uartdm-v1.3", .data = (void *)UARTDM_1P3 },
1035 { .compatible = "qcom,msm-uartdm-v1.4", .data = (void *)UARTDM_1P4 },
904 { } 1036 { }
905}; 1037};
906 1038
@@ -909,6 +1041,7 @@ static int __init msm_serial_probe(struct platform_device *pdev)
909 struct msm_port *msm_port; 1041 struct msm_port *msm_port;
910 struct resource *resource; 1042 struct resource *resource;
911 struct uart_port *port; 1043 struct uart_port *port;
1044 const struct of_device_id *id;
912 int irq; 1045 int irq;
913 1046
914 if (pdev->id == -1) 1047 if (pdev->id == -1)
@@ -923,8 +1056,9 @@ static int __init msm_serial_probe(struct platform_device *pdev)
923 port->dev = &pdev->dev; 1056 port->dev = &pdev->dev;
924 msm_port = UART_TO_MSM(port); 1057 msm_port = UART_TO_MSM(port);
925 1058
926 if (of_match_device(msm_uartdm_table, &pdev->dev)) 1059 id = of_match_device(msm_uartdm_table, &pdev->dev);
927 msm_port->is_uartdm = 1; 1060 if (id)
1061 msm_port->is_uartdm = (unsigned long)id->data;
928 else 1062 else
929 msm_port->is_uartdm = 0; 1063 msm_port->is_uartdm = 0;
930 1064
diff --git a/drivers/tty/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h
index 469fda50ac63..1e9b68b6f9eb 100644
--- a/drivers/tty/serial/msm_serial.h
+++ b/drivers/tty/serial/msm_serial.h
@@ -59,6 +59,7 @@
59#define UART_CR_CMD_RESET_RFR (14 << 4) 59#define UART_CR_CMD_RESET_RFR (14 << 4)
60#define UART_CR_CMD_PROTECTION_EN (16 << 4) 60#define UART_CR_CMD_PROTECTION_EN (16 << 4)
61#define UART_CR_CMD_STALE_EVENT_ENABLE (80 << 4) 61#define UART_CR_CMD_STALE_EVENT_ENABLE (80 << 4)
62#define UART_CR_CMD_FORCE_STALE (4 << 8)
62#define UART_CR_CMD_RESET_TX_READY (3 << 8) 63#define UART_CR_CMD_RESET_TX_READY (3 << 8)
63#define UART_CR_TX_DISABLE (1 << 3) 64#define UART_CR_TX_DISABLE (1 << 3)
64#define UART_CR_TX_ENABLE (1 << 2) 65#define UART_CR_TX_ENABLE (1 << 2)
@@ -113,6 +114,14 @@
113#define GSBI_PROTOCOL_UART 0x40 114#define GSBI_PROTOCOL_UART 0x40
114#define GSBI_PROTOCOL_IDLE 0x0 115#define GSBI_PROTOCOL_IDLE 0x0
115 116
117#define UARTDM_RXFS 0x50
118#define UARTDM_RXFS_BUF_SHIFT 0x7
119#define UARTDM_RXFS_BUF_MASK 0x7
120
121#define UARTDM_DMEN 0x3C
122#define UARTDM_DMEN_RX_SC_ENABLE BIT(5)
123#define UARTDM_DMEN_TX_SC_ENABLE BIT(4)
124
116#define UARTDM_DMRX 0x34 125#define UARTDM_DMRX 0x34
117#define UARTDM_NCF_TX 0x40 126#define UARTDM_NCF_TX 0x40
118#define UARTDM_RX_TOTAL_SNAP 0x38 127#define UARTDM_RX_TOTAL_SNAP 0x38
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 77f035158d6c..dd8b1a5458ff 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -342,7 +342,14 @@ static void serial_omap_stop_tx(struct uart_port *port)
342 342
343 if ((up->rs485.flags & SER_RS485_ENABLED) && 343 if ((up->rs485.flags & SER_RS485_ENABLED) &&
344 !(up->rs485.flags & SER_RS485_RX_DURING_TX)) { 344 !(up->rs485.flags & SER_RS485_RX_DURING_TX)) {
345 up->ier = UART_IER_RLSI | UART_IER_RDI; 345 /*
346 * Empty the RX FIFO, we are not interested in anything
347 * received during the half-duplex transmission.
348 */
349 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_RCVR);
350 /* Re-enable RX interrupts */
351 up->ier |= UART_IER_RLSI | UART_IER_RDI;
352 up->port.read_status_mask |= UART_LSR_DR;
346 serial_out(up, UART_IER, up->ier); 353 serial_out(up, UART_IER, up->ier);
347 } 354 }
348 355
@@ -355,7 +362,7 @@ static void serial_omap_stop_rx(struct uart_port *port)
355 struct uart_omap_port *up = to_uart_omap_port(port); 362 struct uart_omap_port *up = to_uart_omap_port(port);
356 363
357 pm_runtime_get_sync(up->dev); 364 pm_runtime_get_sync(up->dev);
358 up->ier &= ~UART_IER_RLSI; 365 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
359 up->port.read_status_mask &= ~UART_LSR_DR; 366 up->port.read_status_mask &= ~UART_LSR_DR;
360 serial_out(up, UART_IER, up->ier); 367 serial_out(up, UART_IER, up->ier);
361 pm_runtime_mark_last_busy(up->dev); 368 pm_runtime_mark_last_busy(up->dev);
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 8fa1134e0051..0931b3fe9edf 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -1762,7 +1762,9 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1762 int fifosize; 1762 int fifosize;
1763 int port_type; 1763 int port_type;
1764 struct pch_uart_driver_data *board; 1764 struct pch_uart_driver_data *board;
1765#ifdef CONFIG_DEBUG_FS
1765 char name[32]; /* for debugfs file name */ 1766 char name[32]; /* for debugfs file name */
1767#endif
1766 1768
1767 board = &drv_dat[id->driver_data]; 1769 board = &drv_dat[id->driver_data];
1768 port_type = board->port_type; 1770 port_type = board->port_type;
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 9cd706df3b33..23f459600738 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1282,6 +1282,14 @@ static int s3c24xx_serial_probe(struct platform_device *pdev)
1282 if (ret < 0) 1282 if (ret < 0)
1283 goto probe_err; 1283 goto probe_err;
1284 1284
1285 if (!s3c24xx_uart_drv.state) {
1286 ret = uart_register_driver(&s3c24xx_uart_drv);
1287 if (ret < 0) {
1288 pr_err("Failed to register Samsung UART driver\n");
1289 return ret;
1290 }
1291 }
1292
1285 dbg("%s: adding port\n", __func__); 1293 dbg("%s: adding port\n", __func__);
1286 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); 1294 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
1287 platform_set_drvdata(pdev, &ourport->port); 1295 platform_set_drvdata(pdev, &ourport->port);
@@ -1321,6 +1329,8 @@ static int s3c24xx_serial_remove(struct platform_device *dev)
1321 uart_remove_one_port(&s3c24xx_uart_drv, port); 1329 uart_remove_one_port(&s3c24xx_uart_drv, port);
1322 } 1330 }
1323 1331
1332 uart_unregister_driver(&s3c24xx_uart_drv);
1333
1324 return 0; 1334 return 0;
1325} 1335}
1326 1336
@@ -1820,35 +1830,7 @@ static struct platform_driver samsung_serial_driver = {
1820 }, 1830 },
1821}; 1831};
1822 1832
1823/* module initialisation code */ 1833module_platform_driver(samsung_serial_driver);
1824
1825static int __init s3c24xx_serial_modinit(void)
1826{
1827 int ret;
1828
1829 ret = uart_register_driver(&s3c24xx_uart_drv);
1830 if (ret < 0) {
1831 pr_err("Failed to register Samsung UART driver\n");
1832 return ret;
1833 }
1834
1835 ret = platform_driver_register(&samsung_serial_driver);
1836 if (ret < 0) {
1837 pr_err("Failed to register platform driver\n");
1838 uart_unregister_driver(&s3c24xx_uart_drv);
1839 }
1840
1841 return ret;
1842}
1843
1844static void __exit s3c24xx_serial_modexit(void)
1845{
1846 platform_driver_unregister(&samsung_serial_driver);
1847 uart_unregister_driver(&s3c24xx_uart_drv);
1848}
1849
1850module_init(s3c24xx_serial_modinit);
1851module_exit(s3c24xx_serial_modexit);
1852 1834
1853MODULE_ALIAS("platform:samsung-uart"); 1835MODULE_ALIAS("platform:samsung-uart");
1854MODULE_DESCRIPTION("Samsung SoC Serial port driver"); 1836MODULE_DESCRIPTION("Samsung SoC Serial port driver");
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index ece2049bd270..2cf5649a6dc0 100644
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -1319,9 +1319,9 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1319 uport = state->uart_port; 1319 uport = state->uart_port;
1320 port = &state->port; 1320 port = &state->port;
1321 1321
1322 pr_debug("uart_close(%d) called\n", uport->line); 1322 pr_debug("uart_close(%d) called\n", uport ? uport->line : -1);
1323 1323
1324 if (tty_port_close_start(port, tty, filp) == 0) 1324 if (!port->count || tty_port_close_start(port, tty, filp) == 0)
1325 return; 1325 return;
1326 1326
1327 /* 1327 /*
@@ -1762,7 +1762,7 @@ uart_get_console(struct uart_port *ports, int nr, struct console *co)
1762} 1762}
1763 1763
1764/** 1764/**
1765 * uart_parse_options - Parse serial port baud/parity/bits/flow contro. 1765 * uart_parse_options - Parse serial port baud/parity/bits/flow control.
1766 * @options: pointer to option string 1766 * @options: pointer to option string
1767 * @baud: pointer to an 'int' variable for the baud rate. 1767 * @baud: pointer to an 'int' variable for the baud rate.
1768 * @parity: pointer to an 'int' variable for the parity. 1768 * @parity: pointer to an 'int' variable for the parity.
@@ -2609,7 +2609,7 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *uport)
2609 2609
2610 /* 2610 /*
2611 * Register the port whether it's detected or not. This allows 2611 * Register the port whether it's detected or not. This allows
2612 * setserial to be used to alter this ports parameters. 2612 * setserial to be used to alter this port's parameters.
2613 */ 2613 */
2614 tty_dev = tty_port_register_device_attr(port, drv->tty_driver, 2614 tty_dev = tty_port_register_device_attr(port, drv->tty_driver,
2615 uport->line, uport->dev, port, tty_dev_attr_groups); 2615 uport->line, uport->dev, port, tty_dev_attr_groups);
@@ -2645,6 +2645,7 @@ int uart_remove_one_port(struct uart_driver *drv, struct uart_port *uport)
2645{ 2645{
2646 struct uart_state *state = drv->state + uport->line; 2646 struct uart_state *state = drv->state + uport->line;
2647 struct tty_port *port = &state->port; 2647 struct tty_port *port = &state->port;
2648 struct tty_struct *tty;
2648 int ret = 0; 2649 int ret = 0;
2649 2650
2650 BUG_ON(in_interrupt()); 2651 BUG_ON(in_interrupt());
@@ -2673,8 +2674,17 @@ int uart_remove_one_port(struct uart_driver *drv, struct uart_port *uport)
2673 */ 2674 */
2674 tty_unregister_device(drv->tty_driver, uport->line); 2675 tty_unregister_device(drv->tty_driver, uport->line);
2675 2676
2676 if (port->tty) 2677 tty = tty_port_tty_get(port);
2678 if (tty) {
2677 tty_vhangup(port->tty); 2679 tty_vhangup(port->tty);
2680 tty_kref_put(tty);
2681 }
2682
2683 /*
2684 * If the port is used as a console, unregister it
2685 */
2686 if (uart_console(uport))
2687 unregister_console(uport->cons);
2678 2688
2679 /* 2689 /*
2680 * Free the port IO and memory resources, if any. 2690 * Free the port IO and memory resources, if any.
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 7e0b62602632..88236da0ddf7 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -428,7 +428,7 @@ static int sci_probe_regmap(struct plat_sci_port *cfg)
428 cfg->regtype = SCIx_HSCIF_REGTYPE; 428 cfg->regtype = SCIx_HSCIF_REGTYPE;
429 break; 429 break;
430 default: 430 default:
431 printk(KERN_ERR "Can't probe register map for given port\n"); 431 pr_err("Can't probe register map for given port\n");
432 return -EINVAL; 432 return -EINVAL;
433 } 433 }
434 434
@@ -788,7 +788,7 @@ static int sci_handle_errors(struct uart_port *port)
788 if (tty_insert_flip_char(tport, 0, TTY_OVERRUN)) 788 if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
789 copied++; 789 copied++;
790 790
791 dev_notice(port->dev, "overrun error"); 791 dev_notice(port->dev, "overrun error\n");
792 } 792 }
793 793
794 if (status & SCxSR_FER(port)) { 794 if (status & SCxSR_FER(port)) {
@@ -830,7 +830,7 @@ static int sci_handle_errors(struct uart_port *port)
830 if (tty_insert_flip_char(tport, 0, TTY_PARITY)) 830 if (tty_insert_flip_char(tport, 0, TTY_PARITY))
831 copied++; 831 copied++;
832 832
833 dev_notice(port->dev, "parity error"); 833 dev_notice(port->dev, "parity error\n");
834 } 834 }
835 835
836 if (copied) 836 if (copied)
@@ -911,7 +911,7 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
911 /* Disable future Rx interrupts */ 911 /* Disable future Rx interrupts */
912 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { 912 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
913 disable_irq_nosync(irq); 913 disable_irq_nosync(irq);
914 scr |= 0x4000; 914 scr |= SCSCR_RDRQE;
915 } else { 915 } else {
916 scr &= ~SCSCR_RIE; 916 scr &= ~SCSCR_RIE;
917 } 917 }
@@ -1199,7 +1199,9 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
1199 */ 1199 */
1200 reg = sci_getreg(port, SCFCR); 1200 reg = sci_getreg(port, SCFCR);
1201 if (reg->size) 1201 if (reg->size)
1202 serial_port_out(port, SCFCR, serial_port_in(port, SCFCR) | 1); 1202 serial_port_out(port, SCFCR,
1203 serial_port_in(port, SCFCR) |
1204 SCFCR_LOOP);
1203 } 1205 }
1204} 1206}
1205 1207
@@ -1289,7 +1291,8 @@ static void sci_dma_rx_complete(void *arg)
1289 unsigned long flags; 1291 unsigned long flags;
1290 int count; 1292 int count;
1291 1293
1292 dev_dbg(port->dev, "%s(%d) active #%d\n", __func__, port->line, s->active_rx); 1294 dev_dbg(port->dev, "%s(%d) active #%d\n",
1295 __func__, port->line, s->active_rx);
1293 1296
1294 spin_lock_irqsave(&port->lock, flags); 1297 spin_lock_irqsave(&port->lock, flags);
1295 1298
@@ -1365,8 +1368,8 @@ static void sci_submit_rx(struct sci_port *s)
1365 sci_rx_dma_release(s, true); 1368 sci_rx_dma_release(s, true);
1366 return; 1369 return;
1367 } 1370 }
1368 dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__, 1371 dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n",
1369 s->cookie_rx[i], i); 1372 __func__, s->cookie_rx[i], i);
1370 } 1373 }
1371 1374
1372 s->active_rx = s->cookie_rx[0]; 1375 s->active_rx = s->cookie_rx[0];
@@ -1425,8 +1428,8 @@ static void work_fn_rx(struct work_struct *work)
1425 1428
1426 s->active_rx = s->cookie_rx[!new]; 1429 s->active_rx = s->cookie_rx[!new];
1427 1430
1428 dev_dbg(port->dev, "%s: cookie %d #%d, new active #%d\n", __func__, 1431 dev_dbg(port->dev, "%s: cookie %d #%d, new active #%d\n",
1429 s->cookie_rx[new], new, s->active_rx); 1432 __func__, s->cookie_rx[new], new, s->active_rx);
1430} 1433}
1431 1434
1432static void work_fn_tx(struct work_struct *work) 1435static void work_fn_tx(struct work_struct *work)
@@ -1479,8 +1482,8 @@ static void work_fn_tx(struct work_struct *work)
1479 return; 1482 return;
1480 } 1483 }
1481 1484
1482 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", __func__, 1485 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n",
1483 xmit->buf, xmit->tail, xmit->head, s->cookie_tx); 1486 __func__, xmit->buf, xmit->tail, xmit->head, s->cookie_tx);
1484 1487
1485 dma_async_issue_pending(chan); 1488 dma_async_issue_pending(chan);
1486} 1489}
@@ -1495,9 +1498,9 @@ static void sci_start_tx(struct uart_port *port)
1495 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { 1498 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1496 u16 new, scr = serial_port_in(port, SCSCR); 1499 u16 new, scr = serial_port_in(port, SCSCR);
1497 if (s->chan_tx) 1500 if (s->chan_tx)
1498 new = scr | 0x8000; 1501 new = scr | SCSCR_TDRQE;
1499 else 1502 else
1500 new = scr & ~0x8000; 1503 new = scr & ~SCSCR_TDRQE;
1501 if (new != scr) 1504 if (new != scr)
1502 serial_port_out(port, SCSCR, new); 1505 serial_port_out(port, SCSCR, new);
1503 } 1506 }
@@ -1524,7 +1527,7 @@ static void sci_stop_tx(struct uart_port *port)
1524 ctrl = serial_port_in(port, SCSCR); 1527 ctrl = serial_port_in(port, SCSCR);
1525 1528
1526 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) 1529 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1527 ctrl &= ~0x8000; 1530 ctrl &= ~SCSCR_TDRQE;
1528 1531
1529 ctrl &= ~SCSCR_TIE; 1532 ctrl &= ~SCSCR_TIE;
1530 1533
@@ -1538,7 +1541,7 @@ static void sci_start_rx(struct uart_port *port)
1538 ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port); 1541 ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port);
1539 1542
1540 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) 1543 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1541 ctrl &= ~0x4000; 1544 ctrl &= ~SCSCR_RDRQE;
1542 1545
1543 serial_port_out(port, SCSCR, ctrl); 1546 serial_port_out(port, SCSCR, ctrl);
1544} 1547}
@@ -1550,7 +1553,7 @@ static void sci_stop_rx(struct uart_port *port)
1550 ctrl = serial_port_in(port, SCSCR); 1553 ctrl = serial_port_in(port, SCSCR);
1551 1554
1552 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) 1555 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1553 ctrl &= ~0x4000; 1556 ctrl &= ~SCSCR_RDRQE;
1554 1557
1555 ctrl &= ~port_rx_irq_mask(port); 1558 ctrl &= ~port_rx_irq_mask(port);
1556 1559
@@ -1599,8 +1602,8 @@ static bool filter(struct dma_chan *chan, void *slave)
1599{ 1602{
1600 struct sh_dmae_slave *param = slave; 1603 struct sh_dmae_slave *param = slave;
1601 1604
1602 dev_dbg(chan->device->dev, "%s: slave ID %d\n", __func__, 1605 dev_dbg(chan->device->dev, "%s: slave ID %d\n",
1603 param->shdma_slave.slave_id); 1606 __func__, param->shdma_slave.slave_id);
1604 1607
1605 chan->private = &param->shdma_slave; 1608 chan->private = &param->shdma_slave;
1606 return true; 1609 return true;
@@ -1613,7 +1616,7 @@ static void rx_timer_fn(unsigned long arg)
1613 u16 scr = serial_port_in(port, SCSCR); 1616 u16 scr = serial_port_in(port, SCSCR);
1614 1617
1615 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { 1618 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1616 scr &= ~0x4000; 1619 scr &= ~SCSCR_RDRQE;
1617 enable_irq(s->irqs[SCIx_RXI_IRQ]); 1620 enable_irq(s->irqs[SCIx_RXI_IRQ]);
1618 } 1621 }
1619 serial_port_out(port, SCSCR, scr | SCSCR_RIE); 1622 serial_port_out(port, SCSCR, scr | SCSCR_RIE);
@@ -1629,8 +1632,7 @@ static void sci_request_dma(struct uart_port *port)
1629 dma_cap_mask_t mask; 1632 dma_cap_mask_t mask;
1630 int nent; 1633 int nent;
1631 1634
1632 dev_dbg(port->dev, "%s: port %d\n", __func__, 1635 dev_dbg(port->dev, "%s: port %d\n", __func__, port->line);
1633 port->line);
1634 1636
1635 if (s->cfg->dma_slave_tx <= 0 || s->cfg->dma_slave_rx <= 0) 1637 if (s->cfg->dma_slave_tx <= 0 || s->cfg->dma_slave_rx <= 0)
1636 return; 1638 return;
@@ -1658,7 +1660,8 @@ static void sci_request_dma(struct uart_port *port)
1658 if (!nent) 1660 if (!nent)
1659 sci_tx_dma_release(s, false); 1661 sci_tx_dma_release(s, false);
1660 else 1662 else
1661 dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n", __func__, 1663 dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n",
1664 __func__,
1662 sg_dma_len(&s->sg_tx), port->state->xmit.buf, 1665 sg_dma_len(&s->sg_tx), port->state->xmit.buf,
1663 &sg_dma_address(&s->sg_tx)); 1666 &sg_dma_address(&s->sg_tx));
1664 1667
@@ -1870,13 +1873,13 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1870 smr_val = serial_port_in(port, SCSMR) & 3; 1873 smr_val = serial_port_in(port, SCSMR) & 3;
1871 1874
1872 if ((termios->c_cflag & CSIZE) == CS7) 1875 if ((termios->c_cflag & CSIZE) == CS7)
1873 smr_val |= 0x40; 1876 smr_val |= SCSMR_CHR;
1874 if (termios->c_cflag & PARENB) 1877 if (termios->c_cflag & PARENB)
1875 smr_val |= 0x20; 1878 smr_val |= SCSMR_PE;
1876 if (termios->c_cflag & PARODD) 1879 if (termios->c_cflag & PARODD)
1877 smr_val |= 0x30; 1880 smr_val |= SCSMR_PE | SCSMR_ODD;
1878 if (termios->c_cflag & CSTOPB) 1881 if (termios->c_cflag & CSTOPB)
1879 smr_val |= 0x08; 1882 smr_val |= SCSMR_STOP;
1880 1883
1881 uart_update_timeout(port, termios->c_cflag, baud); 1884 uart_update_timeout(port, termios->c_cflag, baud);
1882 1885
@@ -1884,7 +1887,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1884 __func__, smr_val, cks, t, s->cfg->scscr); 1887 __func__, smr_val, cks, t, s->cfg->scscr);
1885 1888
1886 if (t >= 0) { 1889 if (t >= 0) {
1887 serial_port_out(port, SCSMR, (smr_val & ~3) | cks); 1890 serial_port_out(port, SCSMR, (smr_val & ~SCSMR_CKS) | cks);
1888 serial_port_out(port, SCBRR, t); 1891 serial_port_out(port, SCBRR, t);
1889 reg = sci_getreg(port, HSSRR); 1892 reg = sci_getreg(port, HSSRR);
1890 if (reg->size) 1893 if (reg->size)
@@ -1932,8 +1935,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1932 if (s->chan_rx) { 1935 if (s->chan_rx) {
1933 s->rx_timeout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 / 1936 s->rx_timeout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 /
1934 port->fifosize / 2; 1937 port->fifosize / 2;
1935 dev_dbg(port->dev, 1938 dev_dbg(port->dev, "DMA Rx t-out %ums, tty t-out %u jiffies\n",
1936 "DMA Rx t-out %ums, tty t-out %u jiffies\n",
1937 s->rx_timeout * 1000 / HZ, port->timeout); 1939 s->rx_timeout * 1000 / HZ, port->timeout);
1938 if (s->rx_timeout < msecs_to_jiffies(20)) 1940 if (s->rx_timeout < msecs_to_jiffies(20))
1939 s->rx_timeout = msecs_to_jiffies(20); 1941 s->rx_timeout = msecs_to_jiffies(20);
@@ -1952,7 +1954,7 @@ static void sci_pm(struct uart_port *port, unsigned int state,
1952 struct sci_port *sci_port = to_sci_port(port); 1954 struct sci_port *sci_port = to_sci_port(port);
1953 1955
1954 switch (state) { 1956 switch (state) {
1955 case 3: 1957 case UART_PM_STATE_OFF:
1956 sci_port_disable(sci_port); 1958 sci_port_disable(sci_port);
1957 break; 1959 break;
1958 default: 1960 default:
@@ -2017,7 +2019,7 @@ static int sci_remap_port(struct uart_port *port)
2017 * need to do any remapping, just cast the cookie 2019 * need to do any remapping, just cast the cookie
2018 * directly. 2020 * directly.
2019 */ 2021 */
2020 port->membase = (void __iomem *)port->mapbase; 2022 port->membase = (void __iomem *)(uintptr_t)port->mapbase;
2021 } 2023 }
2022 2024
2023 return 0; 2025 return 0;
@@ -2388,8 +2390,7 @@ static inline int sci_probe_earlyprintk(struct platform_device *pdev)
2388 2390
2389#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ 2391#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
2390 2392
2391static char banner[] __initdata = 2393static const char banner[] __initconst = "SuperH (H)SCI(F) driver initialized";
2392 KERN_INFO "SuperH (H)SCI(F) driver initialized\n";
2393 2394
2394static struct uart_driver sci_uart_driver = { 2395static struct uart_driver sci_uart_driver = {
2395 .owner = THIS_MODULE, 2396 .owner = THIS_MODULE,
@@ -2423,25 +2424,25 @@ struct sci_port_info {
2423static const struct of_device_id of_sci_match[] = { 2424static const struct of_device_id of_sci_match[] = {
2424 { 2425 {
2425 .compatible = "renesas,scif", 2426 .compatible = "renesas,scif",
2426 .data = (void *)&(const struct sci_port_info) { 2427 .data = &(const struct sci_port_info) {
2427 .type = PORT_SCIF, 2428 .type = PORT_SCIF,
2428 .regtype = SCIx_SH4_SCIF_REGTYPE, 2429 .regtype = SCIx_SH4_SCIF_REGTYPE,
2429 }, 2430 },
2430 }, { 2431 }, {
2431 .compatible = "renesas,scifa", 2432 .compatible = "renesas,scifa",
2432 .data = (void *)&(const struct sci_port_info) { 2433 .data = &(const struct sci_port_info) {
2433 .type = PORT_SCIFA, 2434 .type = PORT_SCIFA,
2434 .regtype = SCIx_SCIFA_REGTYPE, 2435 .regtype = SCIx_SCIFA_REGTYPE,
2435 }, 2436 },
2436 }, { 2437 }, {
2437 .compatible = "renesas,scifb", 2438 .compatible = "renesas,scifb",
2438 .data = (void *)&(const struct sci_port_info) { 2439 .data = &(const struct sci_port_info) {
2439 .type = PORT_SCIFB, 2440 .type = PORT_SCIFB,
2440 .regtype = SCIx_SCIFB_REGTYPE, 2441 .regtype = SCIx_SCIFB_REGTYPE,
2441 }, 2442 },
2442 }, { 2443 }, {
2443 .compatible = "renesas,hscif", 2444 .compatible = "renesas,hscif",
2444 .data = (void *)&(const struct sci_port_info) { 2445 .data = &(const struct sci_port_info) {
2445 .type = PORT_HSCIF, 2446 .type = PORT_HSCIF,
2446 .regtype = SCIx_HSCIF_REGTYPE, 2447 .regtype = SCIx_HSCIF_REGTYPE,
2447 }, 2448 },
@@ -2501,11 +2502,9 @@ static int sci_probe_single(struct platform_device *dev,
2501 2502
2502 /* Sanity check */ 2503 /* Sanity check */
2503 if (unlikely(index >= SCI_NPORTS)) { 2504 if (unlikely(index >= SCI_NPORTS)) {
2504 dev_notice(&dev->dev, "Attempting to register port " 2505 dev_notice(&dev->dev, "Attempting to register port %d when only %d are available\n",
2505 "%d when only %d are available.\n",
2506 index+1, SCI_NPORTS); 2506 index+1, SCI_NPORTS);
2507 dev_notice(&dev->dev, "Consider bumping " 2507 dev_notice(&dev->dev, "Consider bumping CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
2508 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
2509 return -EINVAL; 2508 return -EINVAL;
2510 } 2509 }
2511 2510
@@ -2563,6 +2562,7 @@ static int sci_probe(struct platform_device *dev)
2563 ret = cpufreq_register_notifier(&sp->freq_transition, 2562 ret = cpufreq_register_notifier(&sp->freq_transition,
2564 CPUFREQ_TRANSITION_NOTIFIER); 2563 CPUFREQ_TRANSITION_NOTIFIER);
2565 if (unlikely(ret < 0)) { 2564 if (unlikely(ret < 0)) {
2565 uart_remove_one_port(&sci_uart_driver, &sp->port);
2566 sci_cleanup_single(sp); 2566 sci_cleanup_single(sp);
2567 return ret; 2567 return ret;
2568 } 2568 }
@@ -2614,7 +2614,7 @@ static int __init sci_init(void)
2614{ 2614{
2615 int ret; 2615 int ret;
2616 2616
2617 printk(banner); 2617 pr_info("%s\n", banner);
2618 2618
2619 ret = uart_register_driver(&sci_uart_driver); 2619 ret = uart_register_driver(&sci_uart_driver);
2620 if (likely(ret == 0)) { 2620 if (likely(ret == 0)) {
diff --git a/drivers/tty/serial/sirfsoc_uart.c b/drivers/tty/serial/sirfsoc_uart.c
index b7bfe24d4ebc..68b0fd4b9a6a 100644
--- a/drivers/tty/serial/sirfsoc_uart.c
+++ b/drivers/tty/serial/sirfsoc_uart.c
@@ -24,7 +24,6 @@
24#include <linux/dmaengine.h> 24#include <linux/dmaengine.h>
25#include <linux/dma-direction.h> 25#include <linux/dma-direction.h>
26#include <linux/dma-mapping.h> 26#include <linux/dma-mapping.h>
27#include <linux/sirfsoc_dma.h>
28#include <asm/irq.h> 27#include <asm/irq.h>
29#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
30 29
@@ -173,7 +172,7 @@ static void sirfsoc_uart_stop_tx(struct uart_port *port)
173 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg; 172 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg;
174 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en; 173 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
175 174
176 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) { 175 if (sirfport->tx_dma_chan) {
177 if (sirfport->tx_dma_state == TX_DMA_RUNNING) { 176 if (sirfport->tx_dma_state == TX_DMA_RUNNING) {
178 dmaengine_pause(sirfport->tx_dma_chan); 177 dmaengine_pause(sirfport->tx_dma_chan);
179 sirfport->tx_dma_state = TX_DMA_PAUSE; 178 sirfport->tx_dma_state = TX_DMA_PAUSE;
@@ -288,7 +287,7 @@ static void sirfsoc_uart_start_tx(struct uart_port *port)
288 struct sirfsoc_uart_port *sirfport = to_sirfport(port); 287 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
289 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg; 288 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg;
290 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en; 289 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
291 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) 290 if (sirfport->tx_dma_chan)
292 sirfsoc_uart_tx_with_dma(sirfport); 291 sirfsoc_uart_tx_with_dma(sirfport);
293 else { 292 else {
294 sirfsoc_uart_pio_tx_chars(sirfport, 1); 293 sirfsoc_uart_pio_tx_chars(sirfport, 1);
@@ -310,7 +309,7 @@ static void sirfsoc_uart_stop_rx(struct uart_port *port)
310 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en; 309 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
311 310
312 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0); 311 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0);
313 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) { 312 if (sirfport->rx_dma_chan) {
314 if (!sirfport->is_marco) 313 if (!sirfport->is_marco)
315 wr_regl(port, ureg->sirfsoc_int_en_reg, 314 wr_regl(port, ureg->sirfsoc_int_en_reg,
316 rd_regl(port, ureg->sirfsoc_int_en_reg) & 315 rd_regl(port, ureg->sirfsoc_int_en_reg) &
@@ -675,7 +674,7 @@ recv_char:
675 uart_handle_cts_change(port, cts_status); 674 uart_handle_cts_change(port, cts_status);
676 wake_up_interruptible(&state->port.delta_msr_wait); 675 wake_up_interruptible(&state->port.delta_msr_wait);
677 } 676 }
678 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) { 677 if (sirfport->rx_dma_chan) {
679 if (intr_status & uint_st->sirfsoc_rx_timeout) 678 if (intr_status & uint_st->sirfsoc_rx_timeout)
680 sirfsoc_uart_handle_rx_tmo(sirfport); 679 sirfsoc_uart_handle_rx_tmo(sirfport);
681 if (intr_status & uint_st->sirfsoc_rx_done) 680 if (intr_status & uint_st->sirfsoc_rx_done)
@@ -686,7 +685,7 @@ recv_char:
686 SIRFSOC_UART_IO_RX_MAX_CNT); 685 SIRFSOC_UART_IO_RX_MAX_CNT);
687 } 686 }
688 if (intr_status & uint_st->sirfsoc_txfifo_empty) { 687 if (intr_status & uint_st->sirfsoc_txfifo_empty) {
689 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) 688 if (sirfport->tx_dma_chan)
690 sirfsoc_uart_tx_with_dma(sirfport); 689 sirfsoc_uart_tx_with_dma(sirfport);
691 else { 690 else {
692 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 691 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
@@ -778,7 +777,7 @@ static void sirfsoc_uart_start_rx(struct uart_port *port)
778 wr_regl(port, ureg->sirfsoc_rx_fifo_op, SIRFUART_FIFO_RESET); 777 wr_regl(port, ureg->sirfsoc_rx_fifo_op, SIRFUART_FIFO_RESET);
779 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0); 778 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0);
780 wr_regl(port, ureg->sirfsoc_rx_fifo_op, SIRFUART_FIFO_START); 779 wr_regl(port, ureg->sirfsoc_rx_fifo_op, SIRFUART_FIFO_START);
781 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) 780 if (sirfport->rx_dma_chan)
782 sirfsoc_uart_start_next_rx_dma(port); 781 sirfsoc_uart_start_next_rx_dma(port);
783 else { 782 else {
784 if (!sirfport->is_marco) 783 if (!sirfport->is_marco)
@@ -1014,11 +1013,11 @@ static void sirfsoc_uart_set_termios(struct uart_port *port,
1014 (sample_div_reg & SIRFSOC_USP_ASYNC_DIV2_MASK) << 1013 (sample_div_reg & SIRFSOC_USP_ASYNC_DIV2_MASK) <<
1015 SIRFSOC_USP_ASYNC_DIV2_OFFSET); 1014 SIRFSOC_USP_ASYNC_DIV2_OFFSET);
1016 } 1015 }
1017 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) 1016 if (sirfport->tx_dma_chan)
1018 wr_regl(port, ureg->sirfsoc_tx_dma_io_ctrl, SIRFUART_DMA_MODE); 1017 wr_regl(port, ureg->sirfsoc_tx_dma_io_ctrl, SIRFUART_DMA_MODE);
1019 else 1018 else
1020 wr_regl(port, ureg->sirfsoc_tx_dma_io_ctrl, SIRFUART_IO_MODE); 1019 wr_regl(port, ureg->sirfsoc_tx_dma_io_ctrl, SIRFUART_IO_MODE);
1021 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) 1020 if (sirfport->rx_dma_chan)
1022 wr_regl(port, ureg->sirfsoc_rx_dma_io_ctrl, SIRFUART_DMA_MODE); 1021 wr_regl(port, ureg->sirfsoc_rx_dma_io_ctrl, SIRFUART_DMA_MODE);
1023 else 1022 else
1024 wr_regl(port, ureg->sirfsoc_rx_dma_io_ctrl, SIRFUART_IO_MODE); 1023 wr_regl(port, ureg->sirfsoc_rx_dma_io_ctrl, SIRFUART_IO_MODE);
@@ -1049,93 +1048,6 @@ static void sirfsoc_uart_pm(struct uart_port *port, unsigned int state,
1049 clk_disable_unprepare(sirfport->clk); 1048 clk_disable_unprepare(sirfport->clk);
1050} 1049}
1051 1050
1052static unsigned int sirfsoc_uart_init_tx_dma(struct uart_port *port)
1053{
1054 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
1055 dma_cap_mask_t dma_mask;
1056 struct dma_slave_config tx_slv_cfg = {
1057 .dst_maxburst = 2,
1058 };
1059
1060 dma_cap_zero(dma_mask);
1061 dma_cap_set(DMA_SLAVE, dma_mask);
1062 sirfport->tx_dma_chan = dma_request_channel(dma_mask,
1063 (dma_filter_fn)sirfsoc_dma_filter_id,
1064 (void *)sirfport->tx_dma_no);
1065 if (!sirfport->tx_dma_chan) {
1066 dev_err(port->dev, "Uart Request Dma Channel Fail %d\n",
1067 sirfport->tx_dma_no);
1068 return -EPROBE_DEFER;
1069 }
1070 dmaengine_slave_config(sirfport->tx_dma_chan, &tx_slv_cfg);
1071
1072 return 0;
1073}
1074
1075static unsigned int sirfsoc_uart_init_rx_dma(struct uart_port *port)
1076{
1077 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
1078 dma_cap_mask_t dma_mask;
1079 int ret;
1080 int i, j;
1081 struct dma_slave_config slv_cfg = {
1082 .src_maxburst = 2,
1083 };
1084
1085 dma_cap_zero(dma_mask);
1086 dma_cap_set(DMA_SLAVE, dma_mask);
1087 sirfport->rx_dma_chan = dma_request_channel(dma_mask,
1088 (dma_filter_fn)sirfsoc_dma_filter_id,
1089 (void *)sirfport->rx_dma_no);
1090 if (!sirfport->rx_dma_chan) {
1091 dev_err(port->dev, "Uart Request Dma Channel Fail %d\n",
1092 sirfport->rx_dma_no);
1093 ret = -EPROBE_DEFER;
1094 goto request_err;
1095 }
1096 for (i = 0; i < SIRFSOC_RX_LOOP_BUF_CNT; i++) {
1097 sirfport->rx_dma_items[i].xmit.buf =
1098 dma_alloc_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1099 &sirfport->rx_dma_items[i].dma_addr, GFP_KERNEL);
1100 if (!sirfport->rx_dma_items[i].xmit.buf) {
1101 dev_err(port->dev, "Uart alloc bufa failed\n");
1102 ret = -ENOMEM;
1103 goto alloc_coherent_err;
1104 }
1105 sirfport->rx_dma_items[i].xmit.head =
1106 sirfport->rx_dma_items[i].xmit.tail = 0;
1107 }
1108 dmaengine_slave_config(sirfport->rx_dma_chan, &slv_cfg);
1109
1110 return 0;
1111alloc_coherent_err:
1112 for (j = 0; j < i; j++)
1113 dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1114 sirfport->rx_dma_items[j].xmit.buf,
1115 sirfport->rx_dma_items[j].dma_addr);
1116 dma_release_channel(sirfport->rx_dma_chan);
1117request_err:
1118 return ret;
1119}
1120
1121static void sirfsoc_uart_uninit_tx_dma(struct sirfsoc_uart_port *sirfport)
1122{
1123 dmaengine_terminate_all(sirfport->tx_dma_chan);
1124 dma_release_channel(sirfport->tx_dma_chan);
1125}
1126
1127static void sirfsoc_uart_uninit_rx_dma(struct sirfsoc_uart_port *sirfport)
1128{
1129 int i;
1130 struct uart_port *port = &sirfport->port;
1131 dmaengine_terminate_all(sirfport->rx_dma_chan);
1132 dma_release_channel(sirfport->rx_dma_chan);
1133 for (i = 0; i < SIRFSOC_RX_LOOP_BUF_CNT; i++)
1134 dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1135 sirfport->rx_dma_items[i].xmit.buf,
1136 sirfport->rx_dma_items[i].dma_addr);
1137}
1138
1139static int sirfsoc_uart_startup(struct uart_port *port) 1051static int sirfsoc_uart_startup(struct uart_port *port)
1140{ 1052{
1141 struct sirfsoc_uart_port *sirfport = to_sirfport(port); 1053 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
@@ -1174,18 +1086,12 @@ static int sirfsoc_uart_startup(struct uart_port *port)
1174 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0); 1086 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0);
1175 wr_regl(port, ureg->sirfsoc_tx_fifo_ctrl, SIRFUART_FIFO_THD(port)); 1087 wr_regl(port, ureg->sirfsoc_tx_fifo_ctrl, SIRFUART_FIFO_THD(port));
1176 wr_regl(port, ureg->sirfsoc_rx_fifo_ctrl, SIRFUART_FIFO_THD(port)); 1088 wr_regl(port, ureg->sirfsoc_rx_fifo_ctrl, SIRFUART_FIFO_THD(port));
1177 1089 if (sirfport->rx_dma_chan)
1178 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) {
1179 ret = sirfsoc_uart_init_rx_dma(port);
1180 if (ret)
1181 goto init_rx_err;
1182 wr_regl(port, ureg->sirfsoc_rx_fifo_level_chk, 1090 wr_regl(port, ureg->sirfsoc_rx_fifo_level_chk,
1183 SIRFUART_RX_FIFO_CHK_SC(port->line, 0x4) | 1091 SIRFUART_RX_FIFO_CHK_SC(port->line, 0x4) |
1184 SIRFUART_RX_FIFO_CHK_LC(port->line, 0xe) | 1092 SIRFUART_RX_FIFO_CHK_LC(port->line, 0xe) |
1185 SIRFUART_RX_FIFO_CHK_HC(port->line, 0x1b)); 1093 SIRFUART_RX_FIFO_CHK_HC(port->line, 0x1b));
1186 } 1094 if (sirfport->tx_dma_chan) {
1187 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) {
1188 sirfsoc_uart_init_tx_dma(port);
1189 sirfport->tx_dma_state = TX_DMA_IDLE; 1095 sirfport->tx_dma_state = TX_DMA_IDLE;
1190 wr_regl(port, ureg->sirfsoc_tx_fifo_level_chk, 1096 wr_regl(port, ureg->sirfsoc_tx_fifo_level_chk,
1191 SIRFUART_TX_FIFO_CHK_SC(port->line, 0x1b) | 1097 SIRFUART_TX_FIFO_CHK_SC(port->line, 0x1b) |
@@ -1232,12 +1138,8 @@ static void sirfsoc_uart_shutdown(struct uart_port *port)
1232 gpio_set_value(sirfport->rts_gpio, 1); 1138 gpio_set_value(sirfport->rts_gpio, 1);
1233 free_irq(gpio_to_irq(sirfport->cts_gpio), sirfport); 1139 free_irq(gpio_to_irq(sirfport->cts_gpio), sirfport);
1234 } 1140 }
1235 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) 1141 if (sirfport->tx_dma_chan)
1236 sirfsoc_uart_uninit_rx_dma(sirfport);
1237 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) {
1238 sirfsoc_uart_uninit_tx_dma(sirfport);
1239 sirfport->tx_dma_state = TX_DMA_IDLE; 1142 sirfport->tx_dma_state = TX_DMA_IDLE;
1240 }
1241} 1143}
1242 1144
1243static const char *sirfsoc_uart_type(struct uart_port *port) 1145static const char *sirfsoc_uart_type(struct uart_port *port)
@@ -1313,8 +1215,8 @@ sirfsoc_uart_console_setup(struct console *co, char *options)
1313 port->cons = co; 1215 port->cons = co;
1314 1216
1315 /* default console tx/rx transfer using io mode */ 1217 /* default console tx/rx transfer using io mode */
1316 sirfport->rx_dma_no = UNVALID_DMA_CHAN; 1218 sirfport->rx_dma_chan = NULL;
1317 sirfport->tx_dma_no = UNVALID_DMA_CHAN; 1219 sirfport->tx_dma_chan = NULL;
1318 return uart_set_options(port, co, baud, parity, bits, flow); 1220 return uart_set_options(port, co, baud, parity, bits, flow);
1319} 1221}
1320 1222
@@ -1382,6 +1284,13 @@ static int sirfsoc_uart_probe(struct platform_device *pdev)
1382 struct uart_port *port; 1284 struct uart_port *port;
1383 struct resource *res; 1285 struct resource *res;
1384 int ret; 1286 int ret;
1287 int i, j;
1288 struct dma_slave_config slv_cfg = {
1289 .src_maxburst = 2,
1290 };
1291 struct dma_slave_config tx_slv_cfg = {
1292 .dst_maxburst = 2,
1293 };
1385 const struct of_device_id *match; 1294 const struct of_device_id *match;
1386 1295
1387 match = of_match_node(sirfsoc_uart_ids, pdev->dev.of_node); 1296 match = of_match_node(sirfsoc_uart_ids, pdev->dev.of_node);
@@ -1402,27 +1311,10 @@ static int sirfsoc_uart_probe(struct platform_device *pdev)
1402 1311
1403 sirfport->hw_flow_ctrl = of_property_read_bool(pdev->dev.of_node, 1312 sirfport->hw_flow_ctrl = of_property_read_bool(pdev->dev.of_node,
1404 "sirf,uart-has-rtscts"); 1313 "sirf,uart-has-rtscts");
1405 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart")) { 1314 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart"))
1406 sirfport->uart_reg->uart_type = SIRF_REAL_UART; 1315 sirfport->uart_reg->uart_type = SIRF_REAL_UART;
1407 if (of_property_read_u32(pdev->dev.of_node,
1408 "sirf,uart-dma-rx-channel",
1409 &sirfport->rx_dma_no))
1410 sirfport->rx_dma_no = UNVALID_DMA_CHAN;
1411 if (of_property_read_u32(pdev->dev.of_node,
1412 "sirf,uart-dma-tx-channel",
1413 &sirfport->tx_dma_no))
1414 sirfport->tx_dma_no = UNVALID_DMA_CHAN;
1415 }
1416 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) { 1316 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) {
1417 sirfport->uart_reg->uart_type = SIRF_USP_UART; 1317 sirfport->uart_reg->uart_type = SIRF_USP_UART;
1418 if (of_property_read_u32(pdev->dev.of_node,
1419 "sirf,usp-dma-rx-channel",
1420 &sirfport->rx_dma_no))
1421 sirfport->rx_dma_no = UNVALID_DMA_CHAN;
1422 if (of_property_read_u32(pdev->dev.of_node,
1423 "sirf,usp-dma-tx-channel",
1424 &sirfport->tx_dma_no))
1425 sirfport->tx_dma_no = UNVALID_DMA_CHAN;
1426 if (!sirfport->hw_flow_ctrl) 1318 if (!sirfport->hw_flow_ctrl)
1427 goto usp_no_flow_control; 1319 goto usp_no_flow_control;
1428 if (of_find_property(pdev->dev.of_node, "cts-gpios", NULL)) 1320 if (of_find_property(pdev->dev.of_node, "cts-gpios", NULL))
@@ -1515,8 +1407,32 @@ usp_no_flow_control:
1515 goto port_err; 1407 goto port_err;
1516 } 1408 }
1517 1409
1518 return 0; 1410 sirfport->rx_dma_chan = dma_request_slave_channel(port->dev, "rx");
1411 for (i = 0; sirfport->rx_dma_chan && i < SIRFSOC_RX_LOOP_BUF_CNT; i++) {
1412 sirfport->rx_dma_items[i].xmit.buf =
1413 dma_alloc_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1414 &sirfport->rx_dma_items[i].dma_addr, GFP_KERNEL);
1415 if (!sirfport->rx_dma_items[i].xmit.buf) {
1416 dev_err(port->dev, "Uart alloc bufa failed\n");
1417 ret = -ENOMEM;
1418 goto alloc_coherent_err;
1419 }
1420 sirfport->rx_dma_items[i].xmit.head =
1421 sirfport->rx_dma_items[i].xmit.tail = 0;
1422 }
1423 if (sirfport->rx_dma_chan)
1424 dmaengine_slave_config(sirfport->rx_dma_chan, &slv_cfg);
1425 sirfport->tx_dma_chan = dma_request_slave_channel(port->dev, "tx");
1426 if (sirfport->tx_dma_chan)
1427 dmaengine_slave_config(sirfport->tx_dma_chan, &tx_slv_cfg);
1519 1428
1429 return 0;
1430alloc_coherent_err:
1431 for (j = 0; j < i; j++)
1432 dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1433 sirfport->rx_dma_items[j].xmit.buf,
1434 sirfport->rx_dma_items[j].dma_addr);
1435 dma_release_channel(sirfport->rx_dma_chan);
1520port_err: 1436port_err:
1521 clk_put(sirfport->clk); 1437 clk_put(sirfport->clk);
1522err: 1438err:
@@ -1529,6 +1445,19 @@ static int sirfsoc_uart_remove(struct platform_device *pdev)
1529 struct uart_port *port = &sirfport->port; 1445 struct uart_port *port = &sirfport->port;
1530 clk_put(sirfport->clk); 1446 clk_put(sirfport->clk);
1531 uart_remove_one_port(&sirfsoc_uart_drv, port); 1447 uart_remove_one_port(&sirfsoc_uart_drv, port);
1448 if (sirfport->rx_dma_chan) {
1449 int i;
1450 dmaengine_terminate_all(sirfport->rx_dma_chan);
1451 dma_release_channel(sirfport->rx_dma_chan);
1452 for (i = 0; i < SIRFSOC_RX_LOOP_BUF_CNT; i++)
1453 dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1454 sirfport->rx_dma_items[i].xmit.buf,
1455 sirfport->rx_dma_items[i].dma_addr);
1456 }
1457 if (sirfport->tx_dma_chan) {
1458 dmaengine_terminate_all(sirfport->tx_dma_chan);
1459 dma_release_channel(sirfport->tx_dma_chan);
1460 }
1532 return 0; 1461 return 0;
1533} 1462}
1534 1463
diff --git a/drivers/tty/serial/sirfsoc_uart.h b/drivers/tty/serial/sirfsoc_uart.h
index b7d679c0881b..8a6eddad2f3c 100644
--- a/drivers/tty/serial/sirfsoc_uart.h
+++ b/drivers/tty/serial/sirfsoc_uart.h
@@ -392,9 +392,6 @@ struct sirfsoc_uart_register sirfsoc_uart = {
392/* Indicate how many buffers used */ 392/* Indicate how many buffers used */
393#define SIRFSOC_RX_LOOP_BUF_CNT 2 393#define SIRFSOC_RX_LOOP_BUF_CNT 2
394 394
395/* Indicate if DMA channel valid */
396#define IS_DMA_CHAN_VALID(x) ((x) != -1)
397#define UNVALID_DMA_CHAN -1
398/* For Fast Baud Rate Calculation */ 395/* For Fast Baud Rate Calculation */
399struct sirfsoc_baudrate_to_regv { 396struct sirfsoc_baudrate_to_regv {
400 unsigned int baud_rate; 397 unsigned int baud_rate;
@@ -423,8 +420,6 @@ struct sirfsoc_uart_port {
423 /* for SiRFmarco, there are SET/CLR for UART_INT_EN */ 420 /* for SiRFmarco, there are SET/CLR for UART_INT_EN */
424 bool is_marco; 421 bool is_marco;
425 struct sirfsoc_uart_register *uart_reg; 422 struct sirfsoc_uart_register *uart_reg;
426 int rx_dma_no;
427 int tx_dma_no;
428 struct dma_chan *rx_dma_chan; 423 struct dma_chan *rx_dma_chan;
429 struct dma_chan *tx_dma_chan; 424 struct dma_chan *tx_dma_chan;
430 dma_addr_t tx_dma_addr; 425 dma_addr_t tx_dma_addr;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 05:00:55 -0500