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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-20 14:24:39 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-20 14:24:39 -0400
commit843ec558f91b8e8fdb6efc908f2c0506407cc750 (patch)
tree1866dccbc298390fc8686875942324075fd83f9d /drivers/tty/serial
parent71e7ff2578c3bc67fd893a9ba7f69fd563f271de (diff)
parentfb8ebec00b04f921ea1614a7303f1a8e5e9e47c5 (diff)
Merge tag 'tty-3.3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull TTY/serial patches from Greg KH: "tty and serial merge for 3.4-rc1 Here's the big serial and tty merge for the 3.4-rc1 tree. There's loads of fixes and reworks in here from Jiri for the tty layer, and a number of patches from Alan to help try to wrestle the vt layer into a sane model. Other than that, lots of driver updates and fixes, and other minor stuff, all detailed in the shortlog." * tag 'tty-3.3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (132 commits) serial: pxa: add clk_prepare/clk_unprepare calls TTY: Wrong unicode value copied in con_set_unimap() serial: PL011: clear pending interrupts serial: bfin-uart: Don't access tty circular buffer in TX DMA interrupt after it is reset. vt: NULL dereference in vt_do_kdsk_ioctl() tty: serial: vt8500: fix annotations for probe/remove serial: remove back and forth conversions in serial_out_sync serial: use serial_port_in/out vs serial_in/out in 8250 serial: introduce generic port in/out helpers serial: reduce number of indirections in 8250 code serial: delete useless void casts in 8250.c serial: make 8250's serial_in shareable to other drivers. serial: delete last unused traces of pausing I/O in 8250 pch_uart: Add module parameter descriptions pch_uart: Use existing default_baud in setup_console pch_uart: Add user_uartclk parameter pch_uart: Add Fish River Island II uart clock quirks pch_uart: Use uartclk instead of base_baud mpc5200b/uart: select more tolerant uart prescaler on low baudrates tty: moxa: fix bit test in moxa_start() ...
Diffstat (limited to 'drivers/tty/serial')
-rw-r--r--drivers/tty/serial/21285.c4
-rw-r--r--drivers/tty/serial/68328serial.c9
-rw-r--r--drivers/tty/serial/8250/8250.c744
-rw-r--r--drivers/tty/serial/8250/8250.h10
-rw-r--r--drivers/tty/serial/Kconfig13
-rw-r--r--drivers/tty/serial/Makefile3
-rw-r--r--drivers/tty/serial/altera_uart.c47
-rw-r--r--drivers/tty/serial/amba-pl011.c32
-rw-r--r--drivers/tty/serial/bfin_uart.c8
-rw-r--r--drivers/tty/serial/crisv10.c15
-rw-r--r--drivers/tty/serial/efm32-uart.c830
-rw-r--r--drivers/tty/serial/ifx6x60.c3
-rw-r--r--drivers/tty/serial/ioc4_serial.c3
-rw-r--r--drivers/tty/serial/m32r_sio.c12
-rw-r--r--drivers/tty/serial/m32r_sio.h1
-rw-r--r--drivers/tty/serial/mpc52xx_uart.c9
-rw-r--r--drivers/tty/serial/msm_smd_tty.c1
-rw-r--r--drivers/tty/serial/mux.c3
-rw-r--r--drivers/tty/serial/omap-serial.c6
-rw-r--r--drivers/tty/serial/pch_uart.c172
-rw-r--r--drivers/tty/serial/pmac_zilog.c2
-rw-r--r--drivers/tty/serial/pxa.c8
-rw-r--r--drivers/tty/serial/samsung.c2
-rw-r--r--drivers/tty/serial/serial_core.c1
-rw-r--r--drivers/tty/serial/sn_console.c4
-rw-r--r--drivers/tty/serial/suncore.c2
-rw-r--r--drivers/tty/serial/suncore.h33
-rw-r--r--drivers/tty/serial/sunhv.c3
-rw-r--r--drivers/tty/serial/sunsab.c2
-rw-r--r--drivers/tty/serial/sunsu.c3
-rw-r--r--drivers/tty/serial/sunzilog.c12
-rw-r--r--drivers/tty/serial/ucc_uart.c2
-rw-r--r--drivers/tty/serial/vr41xx_siu.c4
-rw-r--r--drivers/tty/serial/vt8500_serial.c4
34 files changed, 1449 insertions, 558 deletions
diff --git a/drivers/tty/serial/21285.c b/drivers/tty/serial/21285.c
index 1b37626e8f13..f899996b4363 100644
--- a/drivers/tty/serial/21285.c
+++ b/drivers/tty/serial/21285.c
@@ -331,7 +331,7 @@ static int serial21285_verify_port(struct uart_port *port, struct serial_struct
331 int ret = 0; 331 int ret = 0;
332 if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285) 332 if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
333 ret = -EINVAL; 333 ret = -EINVAL;
334 if (ser->irq != NO_IRQ) 334 if (ser->irq <= 0)
335 ret = -EINVAL; 335 ret = -EINVAL;
336 if (ser->baud_base != port->uartclk / 16) 336 if (ser->baud_base != port->uartclk / 16)
337 ret = -EINVAL; 337 ret = -EINVAL;
@@ -360,7 +360,7 @@ static struct uart_ops serial21285_ops = {
360static struct uart_port serial21285_port = { 360static struct uart_port serial21285_port = {
361 .mapbase = 0x42000160, 361 .mapbase = 0x42000160,
362 .iotype = UPIO_MEM, 362 .iotype = UPIO_MEM,
363 .irq = NO_IRQ, 363 .irq = 0,
364 .fifosize = 16, 364 .fifosize = 16,
365 .ops = &serial21285_ops, 365 .ops = &serial21285_ops,
366 .flags = UPF_BOOT_AUTOCONF, 366 .flags = UPF_BOOT_AUTOCONF,
diff --git a/drivers/tty/serial/68328serial.c b/drivers/tty/serial/68328serial.c
index a88ef9782a4f..7398390e7e65 100644
--- a/drivers/tty/serial/68328serial.c
+++ b/drivers/tty/serial/68328serial.c
@@ -1190,14 +1190,9 @@ static int block_til_ready(struct tty_struct *tty, struct file * filp,
1190int rs_open(struct tty_struct *tty, struct file * filp) 1190int rs_open(struct tty_struct *tty, struct file * filp)
1191{ 1191{
1192 struct m68k_serial *info; 1192 struct m68k_serial *info;
1193 int retval, line; 1193 int retval;
1194
1195 line = tty->index;
1196
1197 if (line >= NR_PORTS || line < 0) /* we have exactly one */
1198 return -ENODEV;
1199 1194
1200 info = &m68k_soft[line]; 1195 info = &m68k_soft[tty->index];
1201 1196
1202 if (serial_paranoia_check(info, tty->name, "rs_open")) 1197 if (serial_paranoia_check(info, tty->name, "rs_open"))
1203 return -ENODEV; 1198 return -ENODEV;
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 9b7336fcfbb3..5b149b466ec8 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -38,16 +38,15 @@
38#include <linux/nmi.h> 38#include <linux/nmi.h>
39#include <linux/mutex.h> 39#include <linux/mutex.h>
40#include <linux/slab.h> 40#include <linux/slab.h>
41#ifdef CONFIG_SPARC
42#include <linux/sunserialcore.h>
43#endif
41 44
42#include <asm/io.h> 45#include <asm/io.h>
43#include <asm/irq.h> 46#include <asm/irq.h>
44 47
45#include "8250.h" 48#include "8250.h"
46 49
47#ifdef CONFIG_SPARC
48#include "../suncore.h"
49#endif
50
51/* 50/*
52 * Configuration: 51 * Configuration:
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option 52 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
@@ -86,13 +85,6 @@ static unsigned int skip_txen_test; /* force skip of txen test at init time */
86#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 85#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
87 86
88 87
89/*
90 * We default to IRQ0 for the "no irq" hack. Some
91 * machine types want others as well - they're free
92 * to redefine this in their header file.
93 */
94#define is_real_interrupt(irq) ((irq) != 0)
95
96#ifdef CONFIG_SERIAL_8250_DETECT_IRQ 88#ifdef CONFIG_SERIAL_8250_DETECT_IRQ
97#define CONFIG_SERIAL_DETECT_IRQ 1 89#define CONFIG_SERIAL_DETECT_IRQ 1
98#endif 90#endif
@@ -475,9 +467,8 @@ static void set_io_from_upio(struct uart_port *p)
475} 467}
476 468
477static void 469static void
478serial_out_sync(struct uart_8250_port *up, int offset, int value) 470serial_port_out_sync(struct uart_port *p, int offset, int value)
479{ 471{
480 struct uart_port *p = &up->port;
481 switch (p->iotype) { 472 switch (p->iotype) {
482 case UPIO_MEM: 473 case UPIO_MEM:
483 case UPIO_MEM32: 474 case UPIO_MEM32:
@@ -490,30 +481,17 @@ serial_out_sync(struct uart_8250_port *up, int offset, int value)
490 } 481 }
491} 482}
492 483
493#define serial_in(up, offset) \
494 (up->port.serial_in(&(up)->port, (offset)))
495#define serial_out(up, offset, value) \
496 (up->port.serial_out(&(up)->port, (offset), (value)))
497/*
498 * We used to support using pause I/O for certain machines. We
499 * haven't supported this for a while, but just in case it's badly
500 * needed for certain old 386 machines, I've left these #define's
501 * in....
502 */
503#define serial_inp(up, offset) serial_in(up, offset)
504#define serial_outp(up, offset, value) serial_out(up, offset, value)
505
506/* Uart divisor latch read */ 484/* Uart divisor latch read */
507static inline int _serial_dl_read(struct uart_8250_port *up) 485static inline int _serial_dl_read(struct uart_8250_port *up)
508{ 486{
509 return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8; 487 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
510} 488}
511 489
512/* Uart divisor latch write */ 490/* Uart divisor latch write */
513static inline void _serial_dl_write(struct uart_8250_port *up, int value) 491static inline void _serial_dl_write(struct uart_8250_port *up, int value)
514{ 492{
515 serial_outp(up, UART_DLL, value & 0xff); 493 serial_out(up, UART_DLL, value & 0xff);
516 serial_outp(up, UART_DLM, value >> 8 & 0xff); 494 serial_out(up, UART_DLM, value >> 8 & 0xff);
517} 495}
518 496
519#if defined(CONFIG_MIPS_ALCHEMY) 497#if defined(CONFIG_MIPS_ALCHEMY)
@@ -583,10 +561,10 @@ static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
583static void serial8250_clear_fifos(struct uart_8250_port *p) 561static void serial8250_clear_fifos(struct uart_8250_port *p)
584{ 562{
585 if (p->capabilities & UART_CAP_FIFO) { 563 if (p->capabilities & UART_CAP_FIFO) {
586 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO); 564 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
587 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO | 565 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
588 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 566 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
589 serial_outp(p, UART_FCR, 0); 567 serial_out(p, UART_FCR, 0);
590 } 568 }
591} 569}
592 570
@@ -599,15 +577,15 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
599{ 577{
600 if (p->capabilities & UART_CAP_SLEEP) { 578 if (p->capabilities & UART_CAP_SLEEP) {
601 if (p->capabilities & UART_CAP_EFR) { 579 if (p->capabilities & UART_CAP_EFR) {
602 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B); 580 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
603 serial_outp(p, UART_EFR, UART_EFR_ECB); 581 serial_out(p, UART_EFR, UART_EFR_ECB);
604 serial_outp(p, UART_LCR, 0); 582 serial_out(p, UART_LCR, 0);
605 } 583 }
606 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0); 584 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
607 if (p->capabilities & UART_CAP_EFR) { 585 if (p->capabilities & UART_CAP_EFR) {
608 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B); 586 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
609 serial_outp(p, UART_EFR, 0); 587 serial_out(p, UART_EFR, 0);
610 serial_outp(p, UART_LCR, 0); 588 serial_out(p, UART_LCR, 0);
611 } 589 }
612 } 590 }
613} 591}
@@ -622,12 +600,12 @@ static int __enable_rsa(struct uart_8250_port *up)
622 unsigned char mode; 600 unsigned char mode;
623 int result; 601 int result;
624 602
625 mode = serial_inp(up, UART_RSA_MSR); 603 mode = serial_in(up, UART_RSA_MSR);
626 result = mode & UART_RSA_MSR_FIFO; 604 result = mode & UART_RSA_MSR_FIFO;
627 605
628 if (!result) { 606 if (!result) {
629 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); 607 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
630 mode = serial_inp(up, UART_RSA_MSR); 608 mode = serial_in(up, UART_RSA_MSR);
631 result = mode & UART_RSA_MSR_FIFO; 609 result = mode & UART_RSA_MSR_FIFO;
632 } 610 }
633 611
@@ -646,7 +624,7 @@ static void enable_rsa(struct uart_8250_port *up)
646 spin_unlock_irq(&up->port.lock); 624 spin_unlock_irq(&up->port.lock);
647 } 625 }
648 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) 626 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
649 serial_outp(up, UART_RSA_FRR, 0); 627 serial_out(up, UART_RSA_FRR, 0);
650 } 628 }
651} 629}
652 630
@@ -665,12 +643,12 @@ static void disable_rsa(struct uart_8250_port *up)
665 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { 643 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
666 spin_lock_irq(&up->port.lock); 644 spin_lock_irq(&up->port.lock);
667 645
668 mode = serial_inp(up, UART_RSA_MSR); 646 mode = serial_in(up, UART_RSA_MSR);
669 result = !(mode & UART_RSA_MSR_FIFO); 647 result = !(mode & UART_RSA_MSR_FIFO);
670 648
671 if (!result) { 649 if (!result) {
672 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); 650 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
673 mode = serial_inp(up, UART_RSA_MSR); 651 mode = serial_in(up, UART_RSA_MSR);
674 result = !(mode & UART_RSA_MSR_FIFO); 652 result = !(mode & UART_RSA_MSR_FIFO);
675 } 653 }
676 654
@@ -691,28 +669,28 @@ static int size_fifo(struct uart_8250_port *up)
691 unsigned short old_dl; 669 unsigned short old_dl;
692 int count; 670 int count;
693 671
694 old_lcr = serial_inp(up, UART_LCR); 672 old_lcr = serial_in(up, UART_LCR);
695 serial_outp(up, UART_LCR, 0); 673 serial_out(up, UART_LCR, 0);
696 old_fcr = serial_inp(up, UART_FCR); 674 old_fcr = serial_in(up, UART_FCR);
697 old_mcr = serial_inp(up, UART_MCR); 675 old_mcr = serial_in(up, UART_MCR);
698 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | 676 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
699 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 677 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
700 serial_outp(up, UART_MCR, UART_MCR_LOOP); 678 serial_out(up, UART_MCR, UART_MCR_LOOP);
701 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); 679 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
702 old_dl = serial_dl_read(up); 680 old_dl = serial_dl_read(up);
703 serial_dl_write(up, 0x0001); 681 serial_dl_write(up, 0x0001);
704 serial_outp(up, UART_LCR, 0x03); 682 serial_out(up, UART_LCR, 0x03);
705 for (count = 0; count < 256; count++) 683 for (count = 0; count < 256; count++)
706 serial_outp(up, UART_TX, count); 684 serial_out(up, UART_TX, count);
707 mdelay(20);/* FIXME - schedule_timeout */ 685 mdelay(20);/* FIXME - schedule_timeout */
708 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) && 686 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
709 (count < 256); count++) 687 (count < 256); count++)
710 serial_inp(up, UART_RX); 688 serial_in(up, UART_RX);
711 serial_outp(up, UART_FCR, old_fcr); 689 serial_out(up, UART_FCR, old_fcr);
712 serial_outp(up, UART_MCR, old_mcr); 690 serial_out(up, UART_MCR, old_mcr);
713 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); 691 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
714 serial_dl_write(up, old_dl); 692 serial_dl_write(up, old_dl);
715 serial_outp(up, UART_LCR, old_lcr); 693 serial_out(up, UART_LCR, old_lcr);
716 694
717 return count; 695 return count;
718} 696}
@@ -727,20 +705,20 @@ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
727 unsigned char old_dll, old_dlm, old_lcr; 705 unsigned char old_dll, old_dlm, old_lcr;
728 unsigned int id; 706 unsigned int id;
729 707
730 old_lcr = serial_inp(p, UART_LCR); 708 old_lcr = serial_in(p, UART_LCR);
731 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A); 709 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
732 710
733 old_dll = serial_inp(p, UART_DLL); 711 old_dll = serial_in(p, UART_DLL);
734 old_dlm = serial_inp(p, UART_DLM); 712 old_dlm = serial_in(p, UART_DLM);
735 713
736 serial_outp(p, UART_DLL, 0); 714 serial_out(p, UART_DLL, 0);
737 serial_outp(p, UART_DLM, 0); 715 serial_out(p, UART_DLM, 0);
738 716
739 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8; 717 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
740 718
741 serial_outp(p, UART_DLL, old_dll); 719 serial_out(p, UART_DLL, old_dll);
742 serial_outp(p, UART_DLM, old_dlm); 720 serial_out(p, UART_DLM, old_dlm);
743 serial_outp(p, UART_LCR, old_lcr); 721 serial_out(p, UART_LCR, old_lcr);
744 722
745 return id; 723 return id;
746} 724}
@@ -850,11 +828,11 @@ static void autoconfig_8250(struct uart_8250_port *up)
850 up->port.type = PORT_8250; 828 up->port.type = PORT_8250;
851 829
852 scratch = serial_in(up, UART_SCR); 830 scratch = serial_in(up, UART_SCR);
853 serial_outp(up, UART_SCR, 0xa5); 831 serial_out(up, UART_SCR, 0xa5);
854 status1 = serial_in(up, UART_SCR); 832 status1 = serial_in(up, UART_SCR);
855 serial_outp(up, UART_SCR, 0x5a); 833 serial_out(up, UART_SCR, 0x5a);
856 status2 = serial_in(up, UART_SCR); 834 status2 = serial_in(up, UART_SCR);
857 serial_outp(up, UART_SCR, scratch); 835 serial_out(up, UART_SCR, scratch);
858 836
859 if (status1 == 0xa5 && status2 == 0x5a) 837 if (status1 == 0xa5 && status2 == 0x5a)
860 up->port.type = PORT_16450; 838 up->port.type = PORT_16450;
@@ -885,7 +863,7 @@ static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
885 } else { 863 } else {
886 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ 864 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
887 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */ 865 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
888 serial_outp(up, 0x04, status); 866 serial_out(up, 0x04, status);
889 } 867 }
890 return 1; 868 return 1;
891} 869}
@@ -908,9 +886,9 @@ static void autoconfig_16550a(struct uart_8250_port *up)
908 * Check for presence of the EFR when DLAB is set. 886 * Check for presence of the EFR when DLAB is set.
909 * Only ST16C650V1 UARTs pass this test. 887 * Only ST16C650V1 UARTs pass this test.
910 */ 888 */
911 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); 889 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
912 if (serial_in(up, UART_EFR) == 0) { 890 if (serial_in(up, UART_EFR) == 0) {
913 serial_outp(up, UART_EFR, 0xA8); 891 serial_out(up, UART_EFR, 0xA8);
914 if (serial_in(up, UART_EFR) != 0) { 892 if (serial_in(up, UART_EFR) != 0) {
915 DEBUG_AUTOCONF("EFRv1 "); 893 DEBUG_AUTOCONF("EFRv1 ");
916 up->port.type = PORT_16650; 894 up->port.type = PORT_16650;
@@ -918,7 +896,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
918 } else { 896 } else {
919 DEBUG_AUTOCONF("Motorola 8xxx DUART "); 897 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
920 } 898 }
921 serial_outp(up, UART_EFR, 0); 899 serial_out(up, UART_EFR, 0);
922 return; 900 return;
923 } 901 }
924 902
@@ -926,7 +904,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
926 * Maybe it requires 0xbf to be written to the LCR. 904 * Maybe it requires 0xbf to be written to the LCR.
927 * (other ST16C650V2 UARTs, TI16C752A, etc) 905 * (other ST16C650V2 UARTs, TI16C752A, etc)
928 */ 906 */
929 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 907 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
930 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) { 908 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
931 DEBUG_AUTOCONF("EFRv2 "); 909 DEBUG_AUTOCONF("EFRv2 ");
932 autoconfig_has_efr(up); 910 autoconfig_has_efr(up);
@@ -940,23 +918,23 @@ static void autoconfig_16550a(struct uart_8250_port *up)
940 * switch back to bank 2, read it from EXCR1 again and check 918 * switch back to bank 2, read it from EXCR1 again and check
941 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2 919 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
942 */ 920 */
943 serial_outp(up, UART_LCR, 0); 921 serial_out(up, UART_LCR, 0);
944 status1 = serial_in(up, UART_MCR); 922 status1 = serial_in(up, UART_MCR);
945 serial_outp(up, UART_LCR, 0xE0); 923 serial_out(up, UART_LCR, 0xE0);
946 status2 = serial_in(up, 0x02); /* EXCR1 */ 924 status2 = serial_in(up, 0x02); /* EXCR1 */
947 925
948 if (!((status2 ^ status1) & UART_MCR_LOOP)) { 926 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
949 serial_outp(up, UART_LCR, 0); 927 serial_out(up, UART_LCR, 0);
950 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP); 928 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
951 serial_outp(up, UART_LCR, 0xE0); 929 serial_out(up, UART_LCR, 0xE0);
952 status2 = serial_in(up, 0x02); /* EXCR1 */ 930 status2 = serial_in(up, 0x02); /* EXCR1 */
953 serial_outp(up, UART_LCR, 0); 931 serial_out(up, UART_LCR, 0);
954 serial_outp(up, UART_MCR, status1); 932 serial_out(up, UART_MCR, status1);
955 933
956 if ((status2 ^ status1) & UART_MCR_LOOP) { 934 if ((status2 ^ status1) & UART_MCR_LOOP) {
957 unsigned short quot; 935 unsigned short quot;
958 936
959 serial_outp(up, UART_LCR, 0xE0); 937 serial_out(up, UART_LCR, 0xE0);
960 938
961 quot = serial_dl_read(up); 939 quot = serial_dl_read(up);
962 quot <<= 3; 940 quot <<= 3;
@@ -964,7 +942,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
964 if (ns16550a_goto_highspeed(up)) 942 if (ns16550a_goto_highspeed(up))
965 serial_dl_write(up, quot); 943 serial_dl_write(up, quot);
966 944
967 serial_outp(up, UART_LCR, 0); 945 serial_out(up, UART_LCR, 0);
968 946
969 up->port.uartclk = 921600*16; 947 up->port.uartclk = 921600*16;
970 up->port.type = PORT_NS16550A; 948 up->port.type = PORT_NS16550A;
@@ -979,15 +957,15 @@ static void autoconfig_16550a(struct uart_8250_port *up)
979 * Try setting it with and without DLAB set. Cheap clones 957 * Try setting it with and without DLAB set. Cheap clones
980 * set bit 5 without DLAB set. 958 * set bit 5 without DLAB set.
981 */ 959 */
982 serial_outp(up, UART_LCR, 0); 960 serial_out(up, UART_LCR, 0);
983 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 961 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
984 status1 = serial_in(up, UART_IIR) >> 5; 962 status1 = serial_in(up, UART_IIR) >> 5;
985 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 963 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
986 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); 964 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
987 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 965 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
988 status2 = serial_in(up, UART_IIR) >> 5; 966 status2 = serial_in(up, UART_IIR) >> 5;
989 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 967 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
990 serial_outp(up, UART_LCR, 0); 968 serial_out(up, UART_LCR, 0);
991 969
992 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2); 970 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
993 971
@@ -1006,13 +984,13 @@ static void autoconfig_16550a(struct uart_8250_port *up)
1006 * already a 1 and maybe locked there before we even start start. 984 * already a 1 and maybe locked there before we even start start.
1007 */ 985 */
1008 iersave = serial_in(up, UART_IER); 986 iersave = serial_in(up, UART_IER);
1009 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE); 987 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1010 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) { 988 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1011 /* 989 /*
1012 * OK it's in a known zero state, try writing and reading 990 * OK it's in a known zero state, try writing and reading
1013 * without disturbing the current state of the other bits. 991 * without disturbing the current state of the other bits.
1014 */ 992 */
1015 serial_outp(up, UART_IER, iersave | UART_IER_UUE); 993 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1016 if (serial_in(up, UART_IER) & UART_IER_UUE) { 994 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1017 /* 995 /*
1018 * It's an Xscale. 996 * It's an Xscale.
@@ -1030,7 +1008,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
1030 */ 1008 */
1031 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 "); 1009 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1032 } 1010 }
1033 serial_outp(up, UART_IER, iersave); 1011 serial_out(up, UART_IER, iersave);
1034 1012
1035 /* 1013 /*
1036 * Exar uarts have EFR in a weird location 1014 * Exar uarts have EFR in a weird location
@@ -1061,24 +1039,25 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1061{ 1039{
1062 unsigned char status1, scratch, scratch2, scratch3; 1040 unsigned char status1, scratch, scratch2, scratch3;
1063 unsigned char save_lcr, save_mcr; 1041 unsigned char save_lcr, save_mcr;
1042 struct uart_port *port = &up->port;
1064 unsigned long flags; 1043 unsigned long flags;
1065 1044
1066 if (!up->port.iobase && !up->port.mapbase && !up->port.membase) 1045 if (!port->iobase && !port->mapbase && !port->membase)
1067 return; 1046 return;
1068 1047
1069 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ", 1048 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1070 serial_index(&up->port), up->port.iobase, up->port.membase); 1049 serial_index(port), port->iobase, port->membase);
1071 1050
1072 /* 1051 /*
1073 * We really do need global IRQs disabled here - we're going to 1052 * We really do need global IRQs disabled here - we're going to
1074 * be frobbing the chips IRQ enable register to see if it exists. 1053 * be frobbing the chips IRQ enable register to see if it exists.
1075 */ 1054 */
1076 spin_lock_irqsave(&up->port.lock, flags); 1055 spin_lock_irqsave(&port->lock, flags);
1077 1056
1078 up->capabilities = 0; 1057 up->capabilities = 0;
1079 up->bugs = 0; 1058 up->bugs = 0;
1080 1059
1081 if (!(up->port.flags & UPF_BUGGY_UART)) { 1060 if (!(port->flags & UPF_BUGGY_UART)) {
1082 /* 1061 /*
1083 * Do a simple existence test first; if we fail this, 1062 * Do a simple existence test first; if we fail this,
1084 * there's no point trying anything else. 1063 * there's no point trying anything else.
@@ -1092,8 +1071,8 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1092 * Note: this is safe as long as MCR bit 4 is clear 1071 * Note: this is safe as long as MCR bit 4 is clear
1093 * and the device is in "PC" mode. 1072 * and the device is in "PC" mode.
1094 */ 1073 */
1095 scratch = serial_inp(up, UART_IER); 1074 scratch = serial_in(up, UART_IER);
1096 serial_outp(up, UART_IER, 0); 1075 serial_out(up, UART_IER, 0);
1097#ifdef __i386__ 1076#ifdef __i386__
1098 outb(0xff, 0x080); 1077 outb(0xff, 0x080);
1099#endif 1078#endif
@@ -1101,13 +1080,13 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1101 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL 1080 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1102 * 16C754B) allow only to modify them if an EFR bit is set. 1081 * 16C754B) allow only to modify them if an EFR bit is set.
1103 */ 1082 */
1104 scratch2 = serial_inp(up, UART_IER) & 0x0f; 1083 scratch2 = serial_in(up, UART_IER) & 0x0f;
1105 serial_outp(up, UART_IER, 0x0F); 1084 serial_out(up, UART_IER, 0x0F);
1106#ifdef __i386__ 1085#ifdef __i386__
1107 outb(0, 0x080); 1086 outb(0, 0x080);
1108#endif 1087#endif
1109 scratch3 = serial_inp(up, UART_IER) & 0x0f; 1088 scratch3 = serial_in(up, UART_IER) & 0x0f;
1110 serial_outp(up, UART_IER, scratch); 1089 serial_out(up, UART_IER, scratch);
1111 if (scratch2 != 0 || scratch3 != 0x0F) { 1090 if (scratch2 != 0 || scratch3 != 0x0F) {
1112 /* 1091 /*
1113 * We failed; there's nothing here 1092 * We failed; there's nothing here
@@ -1130,10 +1109,10 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1130 * manufacturer would be stupid enough to design a board 1109 * manufacturer would be stupid enough to design a board
1131 * that conflicts with COM 1-4 --- we hope! 1110 * that conflicts with COM 1-4 --- we hope!
1132 */ 1111 */
1133 if (!(up->port.flags & UPF_SKIP_TEST)) { 1112 if (!(port->flags & UPF_SKIP_TEST)) {
1134 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); 1113 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1135 status1 = serial_inp(up, UART_MSR) & 0xF0; 1114 status1 = serial_in(up, UART_MSR) & 0xF0;
1136 serial_outp(up, UART_MCR, save_mcr); 1115 serial_out(up, UART_MCR, save_mcr);
1137 if (status1 != 0x90) { 1116 if (status1 != 0x90) {
1138 DEBUG_AUTOCONF("LOOP test failed (%02x) ", 1117 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1139 status1); 1118 status1);
@@ -1150,11 +1129,11 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1150 * We also initialise the EFR (if any) to zero for later. The 1129 * We also initialise the EFR (if any) to zero for later. The
1151 * EFR occupies the same register location as the FCR and IIR. 1130 * EFR occupies the same register location as the FCR and IIR.
1152 */ 1131 */
1153 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 1132 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1154 serial_outp(up, UART_EFR, 0); 1133 serial_out(up, UART_EFR, 0);
1155 serial_outp(up, UART_LCR, 0); 1134 serial_out(up, UART_LCR, 0);
1156 1135
1157 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 1136 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1158 scratch = serial_in(up, UART_IIR) >> 6; 1137 scratch = serial_in(up, UART_IIR) >> 6;
1159 1138
1160 DEBUG_AUTOCONF("iir=%d ", scratch); 1139 DEBUG_AUTOCONF("iir=%d ", scratch);
@@ -1164,10 +1143,10 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1164 autoconfig_8250(up); 1143 autoconfig_8250(up);
1165 break; 1144 break;
1166 case 1: 1145 case 1:
1167 up->port.type = PORT_UNKNOWN; 1146 port->type = PORT_UNKNOWN;
1168 break; 1147 break;
1169 case 2: 1148 case 2:
1170 up->port.type = PORT_16550; 1149 port->type = PORT_16550;
1171 break; 1150 break;
1172 case 3: 1151 case 3:
1173 autoconfig_16550a(up); 1152 autoconfig_16550a(up);
@@ -1178,102 +1157,102 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1178 /* 1157 /*
1179 * Only probe for RSA ports if we got the region. 1158 * Only probe for RSA ports if we got the region.
1180 */ 1159 */
1181 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) { 1160 if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1182 int i; 1161 int i;
1183 1162
1184 for (i = 0 ; i < probe_rsa_count; ++i) { 1163 for (i = 0 ; i < probe_rsa_count; ++i) {
1185 if (probe_rsa[i] == up->port.iobase && 1164 if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1186 __enable_rsa(up)) { 1165 port->type = PORT_RSA;
1187 up->port.type = PORT_RSA;
1188 break; 1166 break;
1189 } 1167 }
1190 } 1168 }
1191 } 1169 }
1192#endif 1170#endif
1193 1171
1194 serial_outp(up, UART_LCR, save_lcr); 1172 serial_out(up, UART_LCR, save_lcr);
1195 1173
1196 if (up->capabilities != uart_config[up->port.type].flags) { 1174 if (up->capabilities != uart_config[port->type].flags) {
1197 printk(KERN_WARNING 1175 printk(KERN_WARNING
1198 "ttyS%d: detected caps %08x should be %08x\n", 1176 "ttyS%d: detected caps %08x should be %08x\n",
1199 serial_index(&up->port), up->capabilities, 1177 serial_index(port), up->capabilities,
1200 uart_config[up->port.type].flags); 1178 uart_config[port->type].flags);
1201 } 1179 }
1202 1180
1203 up->port.fifosize = uart_config[up->port.type].fifo_size; 1181 port->fifosize = uart_config[up->port.type].fifo_size;
1204 up->capabilities = uart_config[up->port.type].flags; 1182 up->capabilities = uart_config[port->type].flags;
1205 up->tx_loadsz = uart_config[up->port.type].tx_loadsz; 1183 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1206 1184
1207 if (up->port.type == PORT_UNKNOWN) 1185 if (port->type == PORT_UNKNOWN)
1208 goto out; 1186 goto out;
1209 1187
1210 /* 1188 /*
1211 * Reset the UART. 1189 * Reset the UART.
1212 */ 1190 */
1213#ifdef CONFIG_SERIAL_8250_RSA 1191#ifdef CONFIG_SERIAL_8250_RSA
1214 if (up->port.type == PORT_RSA) 1192 if (port->type == PORT_RSA)
1215 serial_outp(up, UART_RSA_FRR, 0); 1193 serial_out(up, UART_RSA_FRR, 0);
1216#endif 1194#endif
1217 serial_outp(up, UART_MCR, save_mcr); 1195 serial_out(up, UART_MCR, save_mcr);
1218 serial8250_clear_fifos(up); 1196 serial8250_clear_fifos(up);
1219 serial_in(up, UART_RX); 1197 serial_in(up, UART_RX);
1220 if (up->capabilities & UART_CAP_UUE) 1198 if (up->capabilities & UART_CAP_UUE)
1221 serial_outp(up, UART_IER, UART_IER_UUE); 1199 serial_out(up, UART_IER, UART_IER_UUE);
1222 else 1200 else
1223 serial_outp(up, UART_IER, 0); 1201 serial_out(up, UART_IER, 0);
1224 1202
1225 out: 1203 out:
1226 spin_unlock_irqrestore(&up->port.lock, flags); 1204 spin_unlock_irqrestore(&port->lock, flags);
1227 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name); 1205 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1228} 1206}
1229 1207
1230static void autoconfig_irq(struct uart_8250_port *up) 1208static void autoconfig_irq(struct uart_8250_port *up)
1231{ 1209{
1210 struct uart_port *port = &up->port;
1232 unsigned char save_mcr, save_ier; 1211 unsigned char save_mcr, save_ier;
1233 unsigned char save_ICP = 0; 1212 unsigned char save_ICP = 0;
1234 unsigned int ICP = 0; 1213 unsigned int ICP = 0;
1235 unsigned long irqs; 1214 unsigned long irqs;
1236 int irq; 1215 int irq;
1237 1216
1238 if (up->port.flags & UPF_FOURPORT) { 1217 if (port->flags & UPF_FOURPORT) {
1239 ICP = (up->port.iobase & 0xfe0) | 0x1f; 1218 ICP = (port->iobase & 0xfe0) | 0x1f;
1240 save_ICP = inb_p(ICP); 1219 save_ICP = inb_p(ICP);
1241 outb_p(0x80, ICP); 1220 outb_p(0x80, ICP);
1242 (void) inb_p(ICP); 1221 inb_p(ICP);
1243 } 1222 }
1244 1223
1245 /* forget possible initially masked and pending IRQ */ 1224 /* forget possible initially masked and pending IRQ */
1246 probe_irq_off(probe_irq_on()); 1225 probe_irq_off(probe_irq_on());
1247 save_mcr = serial_inp(up, UART_MCR); 1226 save_mcr = serial_in(up, UART_MCR);
1248 save_ier = serial_inp(up, UART_IER); 1227 save_ier = serial_in(up, UART_IER);
1249 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2); 1228 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1250 1229
1251 irqs = probe_irq_on(); 1230 irqs = probe_irq_on();
1252 serial_outp(up, UART_MCR, 0); 1231 serial_out(up, UART_MCR, 0);
1253 udelay(10); 1232 udelay(10);
1254 if (up->port.flags & UPF_FOURPORT) { 1233 if (port->flags & UPF_FOURPORT) {
1255 serial_outp(up, UART_MCR, 1234 serial_out(up, UART_MCR,
1256 UART_MCR_DTR | UART_MCR_RTS); 1235 UART_MCR_DTR | UART_MCR_RTS);
1257 } else { 1236 } else {
1258 serial_outp(up, UART_MCR, 1237 serial_out(up, UART_MCR,
1259 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2); 1238 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1260 } 1239 }
1261 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */ 1240 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1262 (void)serial_inp(up, UART_LSR); 1241 serial_in(up, UART_LSR);
1263 (void)serial_inp(up, UART_RX); 1242 serial_in(up, UART_RX);
1264 (void)serial_inp(up, UART_IIR); 1243 serial_in(up, UART_IIR);
1265 (void)serial_inp(up, UART_MSR); 1244 serial_in(up, UART_MSR);
1266 serial_outp(up, UART_TX, 0xFF); 1245 serial_out(up, UART_TX, 0xFF);
1267 udelay(20); 1246 udelay(20);
1268 irq = probe_irq_off(irqs); 1247 irq = probe_irq_off(irqs);
1269 1248
1270 serial_outp(up, UART_MCR, save_mcr); 1249 serial_out(up, UART_MCR, save_mcr);
1271 serial_outp(up, UART_IER, save_ier); 1250 serial_out(up, UART_IER, save_ier);
1272 1251
1273 if (up->port.flags & UPF_FOURPORT) 1252 if (port->flags & UPF_FOURPORT)
1274 outb_p(save_ICP, ICP); 1253 outb_p(save_ICP, ICP);
1275 1254
1276 up->port.irq = (irq > 0) ? irq : 0; 1255 port->irq = (irq > 0) ? irq : 0;
1277} 1256}
1278 1257
1279static inline void __stop_tx(struct uart_8250_port *p) 1258static inline void __stop_tx(struct uart_8250_port *p)
@@ -1294,7 +1273,7 @@ static void serial8250_stop_tx(struct uart_port *port)
1294 /* 1273 /*
1295 * We really want to stop the transmitter from sending. 1274 * We really want to stop the transmitter from sending.
1296 */ 1275 */
1297 if (up->port.type == PORT_16C950) { 1276 if (port->type == PORT_16C950) {
1298 up->acr |= UART_ACR_TXDIS; 1277 up->acr |= UART_ACR_TXDIS;
1299 serial_icr_write(up, UART_ACR, up->acr); 1278 serial_icr_write(up, UART_ACR, up->acr);
1300 } 1279 }
@@ -1307,13 +1286,13 @@ static void serial8250_start_tx(struct uart_port *port)
1307 1286
1308 if (!(up->ier & UART_IER_THRI)) { 1287 if (!(up->ier & UART_IER_THRI)) {
1309 up->ier |= UART_IER_THRI; 1288 up->ier |= UART_IER_THRI;
1310 serial_out(up, UART_IER, up->ier); 1289 serial_port_out(port, UART_IER, up->ier);
1311 1290
1312 if (up->bugs & UART_BUG_TXEN) { 1291 if (up->bugs & UART_BUG_TXEN) {
1313 unsigned char lsr; 1292 unsigned char lsr;
1314 lsr = serial_in(up, UART_LSR); 1293 lsr = serial_in(up, UART_LSR);
1315 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; 1294 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1316 if ((up->port.type == PORT_RM9000) ? 1295 if ((port->type == PORT_RM9000) ?
1317 (lsr & UART_LSR_THRE) : 1296 (lsr & UART_LSR_THRE) :
1318 (lsr & UART_LSR_TEMT)) 1297 (lsr & UART_LSR_TEMT))
1319 serial8250_tx_chars(up); 1298 serial8250_tx_chars(up);
@@ -1323,7 +1302,7 @@ static void serial8250_start_tx(struct uart_port *port)
1323 /* 1302 /*
1324 * Re-enable the transmitter if we disabled it. 1303 * Re-enable the transmitter if we disabled it.
1325 */ 1304 */
1326 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { 1305 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1327 up->acr &= ~UART_ACR_TXDIS; 1306 up->acr &= ~UART_ACR_TXDIS;
1328 serial_icr_write(up, UART_ACR, up->acr); 1307 serial_icr_write(up, UART_ACR, up->acr);
1329 } 1308 }
@@ -1336,7 +1315,7 @@ static void serial8250_stop_rx(struct uart_port *port)
1336 1315
1337 up->ier &= ~UART_IER_RLSI; 1316 up->ier &= ~UART_IER_RLSI;
1338 up->port.read_status_mask &= ~UART_LSR_DR; 1317 up->port.read_status_mask &= ~UART_LSR_DR;
1339 serial_out(up, UART_IER, up->ier); 1318 serial_port_out(port, UART_IER, up->ier);
1340} 1319}
1341 1320
1342static void serial8250_enable_ms(struct uart_port *port) 1321static void serial8250_enable_ms(struct uart_port *port)
@@ -1349,7 +1328,7 @@ static void serial8250_enable_ms(struct uart_port *port)
1349 return; 1328 return;
1350 1329
1351 up->ier |= UART_IER_MSI; 1330 up->ier |= UART_IER_MSI;
1352 serial_out(up, UART_IER, up->ier); 1331 serial_port_out(port, UART_IER, up->ier);
1353} 1332}
1354 1333
1355/* 1334/*
@@ -1381,14 +1360,15 @@ static void clear_rx_fifo(struct uart_8250_port *up)
1381unsigned char 1360unsigned char
1382serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr) 1361serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1383{ 1362{
1384 struct tty_struct *tty = up->port.state->port.tty; 1363 struct uart_port *port = &up->port;
1364 struct tty_struct *tty = port->state->port.tty;
1385 unsigned char ch; 1365 unsigned char ch;
1386 int max_count = 256; 1366 int max_count = 256;
1387 char flag; 1367 char flag;
1388 1368
1389 do { 1369 do {
1390 if (likely(lsr & UART_LSR_DR)) 1370 if (likely(lsr & UART_LSR_DR))
1391 ch = serial_inp(up, UART_RX); 1371 ch = serial_in(up, UART_RX);
1392 else 1372 else
1393 /* 1373 /*
1394 * Intel 82571 has a Serial Over Lan device that will 1374 * Intel 82571 has a Serial Over Lan device that will
@@ -1400,7 +1380,7 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1400 ch = 0; 1380 ch = 0;
1401 1381
1402 flag = TTY_NORMAL; 1382 flag = TTY_NORMAL;
1403 up->port.icount.rx++; 1383 port->icount.rx++;
1404 1384
1405 lsr |= up->lsr_saved_flags; 1385 lsr |= up->lsr_saved_flags;
1406 up->lsr_saved_flags = 0; 1386 up->lsr_saved_flags = 0;
@@ -1411,12 +1391,12 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1411 */ 1391 */
1412 if (lsr & UART_LSR_BI) { 1392 if (lsr & UART_LSR_BI) {
1413 lsr &= ~(UART_LSR_FE | UART_LSR_PE); 1393 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1414 up->port.icount.brk++; 1394 port->icount.brk++;
1415 /* 1395 /*
1416 * If tegra port then clear the rx fifo to 1396 * If tegra port then clear the rx fifo to
1417 * accept another break/character. 1397 * accept another break/character.
1418 */ 1398 */
1419 if (up->port.type == PORT_TEGRA) 1399 if (port->type == PORT_TEGRA)
1420 clear_rx_fifo(up); 1400 clear_rx_fifo(up);
1421 1401
1422 /* 1402 /*
@@ -1425,19 +1405,19 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1425 * may get masked by ignore_status_mask 1405 * may get masked by ignore_status_mask
1426 * or read_status_mask. 1406 * or read_status_mask.
1427 */ 1407 */
1428 if (uart_handle_break(&up->port)) 1408 if (uart_handle_break(port))
1429 goto ignore_char; 1409 goto ignore_char;
1430 } else if (lsr & UART_LSR_PE) 1410 } else if (lsr & UART_LSR_PE)
1431 up->port.icount.parity++; 1411 port->icount.parity++;
1432 else if (lsr & UART_LSR_FE) 1412 else if (lsr & UART_LSR_FE)
1433 up->port.icount.frame++; 1413 port->icount.frame++;
1434 if (lsr & UART_LSR_OE) 1414 if (lsr & UART_LSR_OE)
1435 up->port.icount.overrun++; 1415 port->icount.overrun++;
1436 1416
1437 /* 1417 /*
1438 * Mask off conditions which should be ignored. 1418 * Mask off conditions which should be ignored.
1439 */ 1419 */
1440 lsr &= up->port.read_status_mask; 1420 lsr &= port->read_status_mask;
1441 1421
1442 if (lsr & UART_LSR_BI) { 1422 if (lsr & UART_LSR_BI) {
1443 DEBUG_INTR("handling break...."); 1423 DEBUG_INTR("handling break....");
@@ -1447,34 +1427,35 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1447 else if (lsr & UART_LSR_FE) 1427 else if (lsr & UART_LSR_FE)
1448 flag = TTY_FRAME; 1428 flag = TTY_FRAME;
1449 } 1429 }
1450 if (uart_handle_sysrq_char(&up->port, ch)) 1430 if (uart_handle_sysrq_char(port, ch))
1451 goto ignore_char; 1431 goto ignore_char;
1452 1432
1453 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 1433 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1454 1434
1455ignore_char: 1435ignore_char:
1456 lsr = serial_inp(up, UART_LSR); 1436 lsr = serial_in(up, UART_LSR);
1457 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0)); 1437 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1458 spin_unlock(&up->port.lock); 1438 spin_unlock(&port->lock);
1459 tty_flip_buffer_push(tty); 1439 tty_flip_buffer_push(tty);
1460 spin_lock(&up->port.lock); 1440 spin_lock(&port->lock);
1461 return lsr; 1441 return lsr;
1462} 1442}
1463EXPORT_SYMBOL_GPL(serial8250_rx_chars); 1443EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1464 1444
1465void serial8250_tx_chars(struct uart_8250_port *up) 1445void serial8250_tx_chars(struct uart_8250_port *up)
1466{ 1446{
1467 struct circ_buf *xmit = &up->port.state->xmit; 1447 struct uart_port *port = &up->port;
1448 struct circ_buf *xmit = &port->state->xmit;
1468 int count; 1449 int count;
1469 1450
1470 if (up->port.x_char) { 1451 if (port->x_char) {
1471 serial_outp(up, UART_TX, up->port.x_char); 1452 serial_out(up, UART_TX, port->x_char);
1472 up->port.icount.tx++; 1453 port->icount.tx++;
1473 up->port.x_char = 0; 1454 port->x_char = 0;
1474 return; 1455 return;
1475 } 1456 }
1476 if (uart_tx_stopped(&up->port)) { 1457 if (uart_tx_stopped(port)) {
1477 serial8250_stop_tx(&up->port); 1458 serial8250_stop_tx(port);
1478 return; 1459 return;
1479 } 1460 }
1480 if (uart_circ_empty(xmit)) { 1461 if (uart_circ_empty(xmit)) {
@@ -1486,13 +1467,13 @@ void serial8250_tx_chars(struct uart_8250_port *up)
1486 do { 1467 do {
1487 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 1468 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1488 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 1469 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1489 up->port.icount.tx++; 1470 port->icount.tx++;
1490 if (uart_circ_empty(xmit)) 1471 if (uart_circ_empty(xmit))
1491 break; 1472 break;
1492 } while (--count > 0); 1473 } while (--count > 0);
1493 1474
1494 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 1475 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1495 uart_write_wakeup(&up->port); 1476 uart_write_wakeup(port);
1496 1477
1497 DEBUG_INTR("THRE..."); 1478 DEBUG_INTR("THRE...");
1498 1479
@@ -1503,22 +1484,23 @@ EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1503 1484
1504unsigned int serial8250_modem_status(struct uart_8250_port *up) 1485unsigned int serial8250_modem_status(struct uart_8250_port *up)
1505{ 1486{
1487 struct uart_port *port = &up->port;
1506 unsigned int status = serial_in(up, UART_MSR); 1488 unsigned int status = serial_in(up, UART_MSR);
1507 1489
1508 status |= up->msr_saved_flags; 1490 status |= up->msr_saved_flags;
1509 up->msr_saved_flags = 0; 1491 up->msr_saved_flags = 0;
1510 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 1492 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1511 up->port.state != NULL) { 1493 port->state != NULL) {
1512 if (status & UART_MSR_TERI) 1494 if (status & UART_MSR_TERI)
1513 up->port.icount.rng++; 1495 port->icount.rng++;
1514 if (status & UART_MSR_DDSR) 1496 if (status & UART_MSR_DDSR)
1515 up->port.icount.dsr++; 1497 port->icount.dsr++;
1516 if (status & UART_MSR_DDCD) 1498 if (status & UART_MSR_DDCD)
1517 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 1499 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1518 if (status & UART_MSR_DCTS) 1500 if (status & UART_MSR_DCTS)
1519 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 1501 uart_handle_cts_change(port, status & UART_MSR_CTS);
1520 1502
1521 wake_up_interruptible(&up->port.state->port.delta_msr_wait); 1503 wake_up_interruptible(&port->state->port.delta_msr_wait);
1522 } 1504 }
1523 1505
1524 return status; 1506 return status;
@@ -1538,9 +1520,9 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1538 if (iir & UART_IIR_NO_INT) 1520 if (iir & UART_IIR_NO_INT)
1539 return 0; 1521 return 0;
1540 1522
1541 spin_lock_irqsave(&up->port.lock, flags); 1523 spin_lock_irqsave(&port->lock, flags);
1542 1524
1543 status = serial_inp(up, UART_LSR); 1525 status = serial_port_in(port, UART_LSR);
1544 1526
1545 DEBUG_INTR("status = %x...", status); 1527 DEBUG_INTR("status = %x...", status);
1546 1528
@@ -1550,16 +1532,14 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1550 if (status & UART_LSR_THRE) 1532 if (status & UART_LSR_THRE)
1551 serial8250_tx_chars(up); 1533 serial8250_tx_chars(up);
1552 1534
1553 spin_unlock_irqrestore(&up->port.lock, flags); 1535 spin_unlock_irqrestore(&port->lock, flags);
1554 return 1; 1536 return 1;
1555} 1537}
1556EXPORT_SYMBOL_GPL(serial8250_handle_irq); 1538EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1557 1539
1558static int serial8250_default_handle_irq(struct uart_port *port) 1540static int serial8250_default_handle_irq(struct uart_port *port)
1559{ 1541{
1560 struct uart_8250_port *up = 1542 unsigned int iir = serial_port_in(port, UART_IIR);
1561 container_of(port, struct uart_8250_port, port);
1562 unsigned int iir = serial_in(up, UART_IIR);
1563 1543
1564 return serial8250_handle_irq(port, iir); 1544 return serial8250_handle_irq(port, iir);
1565} 1545}
@@ -1750,7 +1730,7 @@ static void serial8250_backup_timeout(unsigned long data)
1750 * Must disable interrupts or else we risk racing with the interrupt 1730 * Must disable interrupts or else we risk racing with the interrupt
1751 * based handler. 1731 * based handler.
1752 */ 1732 */
1753 if (is_real_interrupt(up->port.irq)) { 1733 if (up->port.irq) {
1754 ier = serial_in(up, UART_IER); 1734 ier = serial_in(up, UART_IER);
1755 serial_out(up, UART_IER, 0); 1735 serial_out(up, UART_IER, 0);
1756 } 1736 }
@@ -1775,7 +1755,7 @@ static void serial8250_backup_timeout(unsigned long data)
1775 if (!(iir & UART_IIR_NO_INT)) 1755 if (!(iir & UART_IIR_NO_INT))
1776 serial8250_tx_chars(up); 1756 serial8250_tx_chars(up);
1777 1757
1778 if (is_real_interrupt(up->port.irq)) 1758 if (up->port.irq)
1779 serial_out(up, UART_IER, ier); 1759 serial_out(up, UART_IER, ier);
1780 1760
1781 spin_unlock_irqrestore(&up->port.lock, flags); 1761 spin_unlock_irqrestore(&up->port.lock, flags);
@@ -1792,10 +1772,10 @@ static unsigned int serial8250_tx_empty(struct uart_port *port)
1792 unsigned long flags; 1772 unsigned long flags;
1793 unsigned int lsr; 1773 unsigned int lsr;
1794 1774
1795 spin_lock_irqsave(&up->port.lock, flags); 1775 spin_lock_irqsave(&port->lock, flags);
1796 lsr = serial_in(up, UART_LSR); 1776 lsr = serial_port_in(port, UART_LSR);
1797 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; 1777 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1798 spin_unlock_irqrestore(&up->port.lock, flags); 1778 spin_unlock_irqrestore(&port->lock, flags);
1799 1779
1800 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0; 1780 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1801} 1781}
@@ -1840,7 +1820,7 @@ static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1840 1820
1841 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr; 1821 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1842 1822
1843 serial_out(up, UART_MCR, mcr); 1823 serial_port_out(port, UART_MCR, mcr);
1844} 1824}
1845 1825
1846static void serial8250_break_ctl(struct uart_port *port, int break_state) 1826static void serial8250_break_ctl(struct uart_port *port, int break_state)
@@ -1849,13 +1829,13 @@ static void serial8250_break_ctl(struct uart_port *port, int break_state)
1849 container_of(port, struct uart_8250_port, port); 1829 container_of(port, struct uart_8250_port, port);
1850 unsigned long flags; 1830 unsigned long flags;
1851 1831
1852 spin_lock_irqsave(&up->port.lock, flags); 1832 spin_lock_irqsave(&port->lock, flags);
1853 if (break_state == -1) 1833 if (break_state == -1)
1854 up->lcr |= UART_LCR_SBC; 1834 up->lcr |= UART_LCR_SBC;
1855 else 1835 else
1856 up->lcr &= ~UART_LCR_SBC; 1836 up->lcr &= ~UART_LCR_SBC;
1857 serial_out(up, UART_LCR, up->lcr); 1837 serial_port_out(port, UART_LCR, up->lcr);
1858 spin_unlock_irqrestore(&up->port.lock, flags); 1838 spin_unlock_irqrestore(&port->lock, flags);
1859} 1839}
1860 1840
1861/* 1841/*
@@ -1900,14 +1880,12 @@ static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1900 1880
1901static int serial8250_get_poll_char(struct uart_port *port) 1881static int serial8250_get_poll_char(struct uart_port *port)
1902{ 1882{
1903 struct uart_8250_port *up = 1883 unsigned char lsr = serial_port_in(port, UART_LSR);
1904 container_of(port, struct uart_8250_port, port);
1905 unsigned char lsr = serial_inp(up, UART_LSR);
1906 1884
1907 if (!(lsr & UART_LSR_DR)) 1885 if (!(lsr & UART_LSR_DR))
1908 return NO_POLL_CHAR; 1886 return NO_POLL_CHAR;
1909 1887
1910 return serial_inp(up, UART_RX); 1888 return serial_port_in(port, UART_RX);
1911} 1889}
1912 1890
1913 1891
@@ -1921,21 +1899,21 @@ static void serial8250_put_poll_char(struct uart_port *port,
1921 /* 1899 /*
1922 * First save the IER then disable the interrupts 1900 * First save the IER then disable the interrupts
1923 */ 1901 */
1924 ier = serial_in(up, UART_IER); 1902 ier = serial_port_in(port, UART_IER);
1925 if (up->capabilities & UART_CAP_UUE) 1903 if (up->capabilities & UART_CAP_UUE)
1926 serial_out(up, UART_IER, UART_IER_UUE); 1904 serial_port_out(port, UART_IER, UART_IER_UUE);
1927 else 1905 else
1928 serial_out(up, UART_IER, 0); 1906 serial_port_out(port, UART_IER, 0);
1929 1907
1930 wait_for_xmitr(up, BOTH_EMPTY); 1908 wait_for_xmitr(up, BOTH_EMPTY);
1931 /* 1909 /*
1932 * Send the character out. 1910 * Send the character out.
1933 * If a LF, also do CR... 1911 * If a LF, also do CR...
1934 */ 1912 */
1935 serial_out(up, UART_TX, c); 1913 serial_port_out(port, UART_TX, c);
1936 if (c == 10) { 1914 if (c == 10) {
1937 wait_for_xmitr(up, BOTH_EMPTY); 1915 wait_for_xmitr(up, BOTH_EMPTY);
1938 serial_out(up, UART_TX, 13); 1916 serial_port_out(port, UART_TX, 13);
1939 } 1917 }
1940 1918
1941 /* 1919 /*
@@ -1943,7 +1921,7 @@ static void serial8250_put_poll_char(struct uart_port *port,
1943 * and restore the IER 1921 * and restore the IER
1944 */ 1922 */
1945 wait_for_xmitr(up, BOTH_EMPTY); 1923 wait_for_xmitr(up, BOTH_EMPTY);
1946 serial_out(up, UART_IER, ier); 1924 serial_port_out(port, UART_IER, ier);
1947} 1925}
1948 1926
1949#endif /* CONFIG_CONSOLE_POLL */ 1927#endif /* CONFIG_CONSOLE_POLL */
@@ -1956,25 +1934,25 @@ static int serial8250_startup(struct uart_port *port)
1956 unsigned char lsr, iir; 1934 unsigned char lsr, iir;
1957 int retval; 1935 int retval;
1958 1936
1959 up->port.fifosize = uart_config[up->port.type].fifo_size; 1937 port->fifosize = uart_config[up->port.type].fifo_size;
1960 up->tx_loadsz = uart_config[up->port.type].tx_loadsz; 1938 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
1961 up->capabilities = uart_config[up->port.type].flags; 1939 up->capabilities = uart_config[up->port.type].flags;
1962 up->mcr = 0; 1940 up->mcr = 0;
1963 1941
1964 if (up->port.iotype != up->cur_iotype) 1942 if (port->iotype != up->cur_iotype)
1965 set_io_from_upio(port); 1943 set_io_from_upio(port);
1966 1944
1967 if (up->port.type == PORT_16C950) { 1945 if (port->type == PORT_16C950) {
1968 /* Wake up and initialize UART */ 1946 /* Wake up and initialize UART */
1969 up->acr = 0; 1947 up->acr = 0;
1970 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 1948 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
1971 serial_outp(up, UART_EFR, UART_EFR_ECB); 1949 serial_port_out(port, UART_EFR, UART_EFR_ECB);
1972 serial_outp(up, UART_IER, 0); 1950 serial_port_out(port, UART_IER, 0);
1973 serial_outp(up, UART_LCR, 0); 1951 serial_port_out(port, UART_LCR, 0);
1974 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ 1952 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1975 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 1953 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
1976 serial_outp(up, UART_EFR, UART_EFR_ECB); 1954 serial_port_out(port, UART_EFR, UART_EFR_ECB);
1977 serial_outp(up, UART_LCR, 0); 1955 serial_port_out(port, UART_LCR, 0);
1978 } 1956 }
1979 1957
1980#ifdef CONFIG_SERIAL_8250_RSA 1958#ifdef CONFIG_SERIAL_8250_RSA
@@ -1994,41 +1972,43 @@ static int serial8250_startup(struct uart_port *port)
1994 /* 1972 /*
1995 * Clear the interrupt registers. 1973 * Clear the interrupt registers.
1996 */ 1974 */
1997 (void) serial_inp(up, UART_LSR); 1975 serial_port_in(port, UART_LSR);
1998 (void) serial_inp(up, UART_RX); 1976 serial_port_in(port, UART_RX);
1999 (void) serial_inp(up, UART_IIR); 1977 serial_port_in(port, UART_IIR);
2000 (void) serial_inp(up, UART_MSR); 1978 serial_port_in(port, UART_MSR);
2001 1979
2002 /* 1980 /*
2003 * At this point, there's no way the LSR could still be 0xff; 1981 * At this point, there's no way the LSR could still be 0xff;
2004 * if it is, then bail out, because there's likely no UART 1982 * if it is, then bail out, because there's likely no UART
2005 * here. 1983 * here.
2006 */ 1984 */
2007 if (!(up->port.flags & UPF_BUGGY_UART) && 1985 if (!(port->flags & UPF_BUGGY_UART) &&
2008 (serial_inp(up, UART_LSR) == 0xff)) { 1986 (serial_port_in(port, UART_LSR) == 0xff)) {
2009 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n", 1987 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2010 serial_index(&up->port)); 1988 serial_index(port));
2011 return -ENODEV; 1989 return -ENODEV;
2012 } 1990 }
2013 1991
2014 /* 1992 /*
2015 * For a XR16C850, we need to set the trigger levels 1993 * For a XR16C850, we need to set the trigger levels
2016 */ 1994 */
2017 if (up->port.type == PORT_16850) { 1995 if (port->type == PORT_16850) {
2018 unsigned char fctr; 1996 unsigned char fctr;
2019 1997
2020 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 1998 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2021 1999
2022 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX); 2000 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2023 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX); 2001 serial_port_out(port, UART_FCTR,
2024 serial_outp(up, UART_TRG, UART_TRG_96); 2002 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2025 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX); 2003 serial_port_out(port, UART_TRG, UART_TRG_96);
2026 serial_outp(up, UART_TRG, UART_TRG_96); 2004 serial_port_out(port, UART_FCTR,
2005 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2006 serial_port_out(port, UART_TRG, UART_TRG_96);
2027 2007
2028 serial_outp(up, UART_LCR, 0); 2008 serial_port_out(port, UART_LCR, 0);
2029 } 2009 }
2030 2010
2031 if (is_real_interrupt(up->port.irq)) { 2011 if (port->irq) {
2032 unsigned char iir1; 2012 unsigned char iir1;
2033 /* 2013 /*
2034 * Test for UARTs that do not reassert THRE when the 2014 * Test for UARTs that do not reassert THRE when the
@@ -2038,23 +2018,23 @@ static int serial8250_startup(struct uart_port *port)
2038 * the interrupt is enabled. Delays are necessary to 2018 * the interrupt is enabled. Delays are necessary to
2039 * allow register changes to become visible. 2019 * allow register changes to become visible.
2040 */ 2020 */
2041 spin_lock_irqsave(&up->port.lock, flags); 2021 spin_lock_irqsave(&port->lock, flags);
2042 if (up->port.irqflags & IRQF_SHARED) 2022 if (up->port.irqflags & IRQF_SHARED)
2043 disable_irq_nosync(up->port.irq); 2023 disable_irq_nosync(port->irq);
2044 2024
2045 wait_for_xmitr(up, UART_LSR_THRE); 2025 wait_for_xmitr(up, UART_LSR_THRE);
2046 serial_out_sync(up, UART_IER, UART_IER_THRI); 2026 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2047 udelay(1); /* allow THRE to set */ 2027 udelay(1); /* allow THRE to set */
2048 iir1 = serial_in(up, UART_IIR); 2028 iir1 = serial_port_in(port, UART_IIR);
2049 serial_out(up, UART_IER, 0); 2029 serial_port_out(port, UART_IER, 0);
2050 serial_out_sync(up, UART_IER, UART_IER_THRI); 2030 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2051 udelay(1); /* allow a working UART time to re-assert THRE */ 2031 udelay(1); /* allow a working UART time to re-assert THRE */
2052 iir = serial_in(up, UART_IIR); 2032 iir = serial_port_in(port, UART_IIR);
2053 serial_out(up, UART_IER, 0); 2033 serial_port_out(port, UART_IER, 0);
2054 2034
2055 if (up->port.irqflags & IRQF_SHARED) 2035 if (port->irqflags & IRQF_SHARED)
2056 enable_irq(up->port.irq); 2036 enable_irq(port->irq);
2057 spin_unlock_irqrestore(&up->port.lock, flags); 2037 spin_unlock_irqrestore(&port->lock, flags);
2058 2038
2059 /* 2039 /*
2060 * If the interrupt is not reasserted, setup a timer to 2040 * If the interrupt is not reasserted, setup a timer to
@@ -2083,7 +2063,7 @@ static int serial8250_startup(struct uart_port *port)
2083 * hardware interrupt, we use a timer-based system. The original 2063 * hardware interrupt, we use a timer-based system. The original
2084 * driver used to do this with IRQ0. 2064 * driver used to do this with IRQ0.
2085 */ 2065 */
2086 if (!is_real_interrupt(up->port.irq)) { 2066 if (!port->irq) {
2087 up->timer.data = (unsigned long)up; 2067 up->timer.data = (unsigned long)up;
2088 mod_timer(&up->timer, jiffies + uart_poll_timeout(port)); 2068 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2089 } else { 2069 } else {
@@ -2095,20 +2075,20 @@ static int serial8250_startup(struct uart_port *port)
2095 /* 2075 /*
2096 * Now, initialize the UART 2076 * Now, initialize the UART
2097 */ 2077 */
2098 serial_outp(up, UART_LCR, UART_LCR_WLEN8); 2078 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2099 2079
2100 spin_lock_irqsave(&up->port.lock, flags); 2080 spin_lock_irqsave(&port->lock, flags);
2101 if (up->port.flags & UPF_FOURPORT) { 2081 if (up->port.flags & UPF_FOURPORT) {
2102 if (!is_real_interrupt(up->port.irq)) 2082 if (!up->port.irq)
2103 up->port.mctrl |= TIOCM_OUT1; 2083 up->port.mctrl |= TIOCM_OUT1;
2104 } else 2084 } else
2105 /* 2085 /*
2106 * Most PC uarts need OUT2 raised to enable interrupts. 2086 * Most PC uarts need OUT2 raised to enable interrupts.
2107 */ 2087 */
2108 if (is_real_interrupt(up->port.irq)) 2088 if (port->irq)
2109 up->port.mctrl |= TIOCM_OUT2; 2089 up->port.mctrl |= TIOCM_OUT2;
2110 2090
2111 serial8250_set_mctrl(&up->port, up->port.mctrl); 2091 serial8250_set_mctrl(port, port->mctrl);
2112 2092
2113 /* Serial over Lan (SoL) hack: 2093 /* Serial over Lan (SoL) hack:
2114 Intel 8257x Gigabit ethernet chips have a 2094 Intel 8257x Gigabit ethernet chips have a
@@ -2128,10 +2108,10 @@ static int serial8250_startup(struct uart_port *port)
2128 * Do a quick test to see if we receive an 2108 * Do a quick test to see if we receive an
2129 * interrupt when we enable the TX irq. 2109 * interrupt when we enable the TX irq.
2130 */ 2110 */
2131 serial_outp(up, UART_IER, UART_IER_THRI); 2111 serial_port_out(port, UART_IER, UART_IER_THRI);
2132 lsr = serial_in(up, UART_LSR); 2112 lsr = serial_port_in(port, UART_LSR);
2133 iir = serial_in(up, UART_IIR); 2113 iir = serial_port_in(port, UART_IIR);
2134 serial_outp(up, UART_IER, 0); 2114 serial_port_out(port, UART_IER, 0);
2135 2115
2136 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) { 2116 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2137 if (!(up->bugs & UART_BUG_TXEN)) { 2117 if (!(up->bugs & UART_BUG_TXEN)) {
@@ -2144,17 +2124,17 @@ static int serial8250_startup(struct uart_port *port)
2144 } 2124 }
2145 2125
2146dont_test_tx_en: 2126dont_test_tx_en:
2147 spin_unlock_irqrestore(&up->port.lock, flags); 2127 spin_unlock_irqrestore(&port->lock, flags);
2148 2128
2149 /* 2129 /*
2150 * Clear the interrupt registers again for luck, and clear the 2130 * Clear the interrupt registers again for luck, and clear the
2151 * saved flags to avoid getting false values from polling 2131 * saved flags to avoid getting false values from polling
2152 * routines or the previous session. 2132 * routines or the previous session.
2153 */ 2133 */
2154 serial_inp(up, UART_LSR); 2134 serial_port_in(port, UART_LSR);
2155 serial_inp(up, UART_RX); 2135 serial_port_in(port, UART_RX);
2156 serial_inp(up, UART_IIR); 2136 serial_port_in(port, UART_IIR);
2157 serial_inp(up, UART_MSR); 2137 serial_port_in(port, UART_MSR);
2158 up->lsr_saved_flags = 0; 2138 up->lsr_saved_flags = 0;
2159 up->msr_saved_flags = 0; 2139 up->msr_saved_flags = 0;
2160 2140
@@ -2164,16 +2144,16 @@ dont_test_tx_en:
2164 * anyway, so we don't enable them here. 2144 * anyway, so we don't enable them here.
2165 */ 2145 */
2166 up->ier = UART_IER_RLSI | UART_IER_RDI; 2146 up->ier = UART_IER_RLSI | UART_IER_RDI;
2167 serial_outp(up, UART_IER, up->ier); 2147 serial_port_out(port, UART_IER, up->ier);
2168 2148
2169 if (up->port.flags & UPF_FOURPORT) { 2149 if (port->flags & UPF_FOURPORT) {
2170 unsigned int icp; 2150 unsigned int icp;
2171 /* 2151 /*
2172 * Enable interrupts on the AST Fourport board 2152 * Enable interrupts on the AST Fourport board
2173 */ 2153 */
2174 icp = (up->port.iobase & 0xfe0) | 0x01f; 2154 icp = (port->iobase & 0xfe0) | 0x01f;
2175 outb_p(0x80, icp); 2155 outb_p(0x80, icp);
2176 (void) inb_p(icp); 2156 inb_p(icp);
2177 } 2157 }
2178 2158
2179 return 0; 2159 return 0;
@@ -2189,23 +2169,24 @@ static void serial8250_shutdown(struct uart_port *port)
2189 * Disable interrupts from this port 2169 * Disable interrupts from this port
2190 */ 2170 */
2191 up->ier = 0; 2171 up->ier = 0;
2192 serial_outp(up, UART_IER, 0); 2172 serial_port_out(port, UART_IER, 0);
2193 2173
2194 spin_lock_irqsave(&up->port.lock, flags); 2174 spin_lock_irqsave(&port->lock, flags);
2195 if (up->port.flags & UPF_FOURPORT) { 2175 if (port->flags & UPF_FOURPORT) {
2196 /* reset interrupts on the AST Fourport board */ 2176 /* reset interrupts on the AST Fourport board */
2197 inb((up->port.iobase & 0xfe0) | 0x1f); 2177 inb((port->iobase & 0xfe0) | 0x1f);
2198 up->port.mctrl |= TIOCM_OUT1; 2178 port->mctrl |= TIOCM_OUT1;
2199 } else 2179 } else
2200 up->port.mctrl &= ~TIOCM_OUT2; 2180 port->mctrl &= ~TIOCM_OUT2;
2201 2181
2202 serial8250_set_mctrl(&up->port, up->port.mctrl); 2182 serial8250_set_mctrl(port, port->mctrl);
2203 spin_unlock_irqrestore(&up->port.lock, flags); 2183 spin_unlock_irqrestore(&port->lock, flags);
2204 2184
2205 /* 2185 /*
2206 * Disable break condition and FIFOs 2186 * Disable break condition and FIFOs
2207 */ 2187 */
2208 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC); 2188 serial_port_out(port, UART_LCR,
2189 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2209 serial8250_clear_fifos(up); 2190 serial8250_clear_fifos(up);
2210 2191
2211#ifdef CONFIG_SERIAL_8250_RSA 2192#ifdef CONFIG_SERIAL_8250_RSA
@@ -2219,11 +2200,11 @@ static void serial8250_shutdown(struct uart_port *port)
2219 * Read data port to reset things, and then unlink from 2200 * Read data port to reset things, and then unlink from
2220 * the IRQ chain. 2201 * the IRQ chain.
2221 */ 2202 */
2222 (void) serial_in(up, UART_RX); 2203 serial_port_in(port, UART_RX);
2223 2204
2224 del_timer_sync(&up->timer); 2205 del_timer_sync(&up->timer);
2225 up->timer.function = serial8250_timeout; 2206 up->timer.function = serial8250_timeout;
2226 if (is_real_interrupt(up->port.irq)) 2207 if (port->irq)
2227 serial_unlink_irq_chain(up); 2208 serial_unlink_irq_chain(up);
2228} 2209}
2229 2210
@@ -2298,11 +2279,11 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2298 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0) 2279 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2299 quot++; 2280 quot++;
2300 2281
2301 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) { 2282 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2302 if (baud < 2400) 2283 if (baud < 2400)
2303 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1; 2284 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
2304 else 2285 else
2305 fcr = uart_config[up->port.type].fcr; 2286 fcr = uart_config[port->type].fcr;
2306 } 2287 }
2307 2288
2308 /* 2289 /*
@@ -2313,7 +2294,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2313 * have sufficient FIFO entries for the latency of the remote 2294 * have sufficient FIFO entries for the latency of the remote
2314 * UART to respond. IOW, at least 32 bytes of FIFO. 2295 * UART to respond. IOW, at least 32 bytes of FIFO.
2315 */ 2296 */
2316 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) { 2297 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2317 up->mcr &= ~UART_MCR_AFE; 2298 up->mcr &= ~UART_MCR_AFE;
2318 if (termios->c_cflag & CRTSCTS) 2299 if (termios->c_cflag & CRTSCTS)
2319 up->mcr |= UART_MCR_AFE; 2300 up->mcr |= UART_MCR_AFE;
@@ -2323,40 +2304,40 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2323 * Ok, we're now changing the port state. Do it with 2304 * Ok, we're now changing the port state. Do it with
2324 * interrupts disabled. 2305 * interrupts disabled.
2325 */ 2306 */
2326 spin_lock_irqsave(&up->port.lock, flags); 2307 spin_lock_irqsave(&port->lock, flags);
2327 2308
2328 /* 2309 /*
2329 * Update the per-port timeout. 2310 * Update the per-port timeout.
2330 */ 2311 */
2331 uart_update_timeout(port, termios->c_cflag, baud); 2312 uart_update_timeout(port, termios->c_cflag, baud);
2332 2313
2333 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 2314 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2334 if (termios->c_iflag & INPCK) 2315 if (termios->c_iflag & INPCK)
2335 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 2316 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2336 if (termios->c_iflag & (BRKINT | PARMRK)) 2317 if (termios->c_iflag & (BRKINT | PARMRK))
2337 up->port.read_status_mask |= UART_LSR_BI; 2318 port->read_status_mask |= UART_LSR_BI;
2338 2319
2339 /* 2320 /*
2340 * Characteres to ignore 2321 * Characteres to ignore
2341 */ 2322 */
2342 up->port.ignore_status_mask = 0; 2323 port->ignore_status_mask = 0;
2343 if (termios->c_iflag & IGNPAR) 2324 if (termios->c_iflag & IGNPAR)
2344 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 2325 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2345 if (termios->c_iflag & IGNBRK) { 2326 if (termios->c_iflag & IGNBRK) {
2346 up->port.ignore_status_mask |= UART_LSR_BI; 2327 port->ignore_status_mask |= UART_LSR_BI;
2347 /* 2328 /*
2348 * If we're ignoring parity and break indicators, 2329 * If we're ignoring parity and break indicators,
2349 * ignore overruns too (for real raw support). 2330 * ignore overruns too (for real raw support).
2350 */ 2331 */
2351 if (termios->c_iflag & IGNPAR) 2332 if (termios->c_iflag & IGNPAR)
2352 up->port.ignore_status_mask |= UART_LSR_OE; 2333 port->ignore_status_mask |= UART_LSR_OE;
2353 } 2334 }
2354 2335
2355 /* 2336 /*
2356 * ignore all characters if CREAD is not set 2337 * ignore all characters if CREAD is not set
2357 */ 2338 */
2358 if ((termios->c_cflag & CREAD) == 0) 2339 if ((termios->c_cflag & CREAD) == 0)
2359 up->port.ignore_status_mask |= UART_LSR_DR; 2340 port->ignore_status_mask |= UART_LSR_DR;
2360 2341
2361 /* 2342 /*
2362 * CTS flow control flag and modem status interrupts 2343 * CTS flow control flag and modem status interrupts
@@ -2370,7 +2351,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2370 if (up->capabilities & UART_CAP_RTOIE) 2351 if (up->capabilities & UART_CAP_RTOIE)
2371 up->ier |= UART_IER_RTOIE; 2352 up->ier |= UART_IER_RTOIE;
2372 2353
2373 serial_out(up, UART_IER, up->ier); 2354 serial_port_out(port, UART_IER, up->ier);
2374 2355
2375 if (up->capabilities & UART_CAP_EFR) { 2356 if (up->capabilities & UART_CAP_EFR) {
2376 unsigned char efr = 0; 2357 unsigned char efr = 0;
@@ -2382,11 +2363,11 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2382 if (termios->c_cflag & CRTSCTS) 2363 if (termios->c_cflag & CRTSCTS)
2383 efr |= UART_EFR_CTS; 2364 efr |= UART_EFR_CTS;
2384 2365
2385 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); 2366 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2386 if (up->port.flags & UPF_EXAR_EFR) 2367 if (port->flags & UPF_EXAR_EFR)
2387 serial_outp(up, UART_XR_EFR, efr); 2368 serial_port_out(port, UART_XR_EFR, efr);
2388 else 2369 else
2389 serial_outp(up, UART_EFR, efr); 2370 serial_port_out(port, UART_EFR, efr);
2390 } 2371 }
2391 2372
2392#ifdef CONFIG_ARCH_OMAP 2373#ifdef CONFIG_ARCH_OMAP
@@ -2394,18 +2375,20 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2394 if (cpu_is_omap1510() && is_omap_port(up)) { 2375 if (cpu_is_omap1510() && is_omap_port(up)) {
2395 if (baud == 115200) { 2376 if (baud == 115200) {
2396 quot = 1; 2377 quot = 1;
2397 serial_out(up, UART_OMAP_OSC_12M_SEL, 1); 2378 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2398 } else 2379 } else
2399 serial_out(up, UART_OMAP_OSC_12M_SEL, 0); 2380 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2400 } 2381 }
2401#endif 2382#endif
2402 2383
2403 if (up->capabilities & UART_NATSEMI) { 2384 /*
2404 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */ 2385 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2405 serial_outp(up, UART_LCR, 0xe0); 2386 * otherwise just set DLAB
2406 } else { 2387 */
2407 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 2388 if (up->capabilities & UART_NATSEMI)
2408 } 2389 serial_port_out(port, UART_LCR, 0xe0);
2390 else
2391 serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB);
2409 2392
2410 serial_dl_write(up, quot); 2393 serial_dl_write(up, quot);
2411 2394
@@ -2413,20 +2396,19 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2413 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR 2396 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2414 * is written without DLAB set, this mode will be disabled. 2397 * is written without DLAB set, this mode will be disabled.
2415 */ 2398 */
2416 if (up->port.type == PORT_16750) 2399 if (port->type == PORT_16750)
2417 serial_outp(up, UART_FCR, fcr); 2400 serial_port_out(port, UART_FCR, fcr);
2418 2401
2419 serial_outp(up, UART_LCR, cval); /* reset DLAB */ 2402 serial_port_out(port, UART_LCR, cval); /* reset DLAB */
2420 up->lcr = cval; /* Save LCR */ 2403 up->lcr = cval; /* Save LCR */
2421 if (up->port.type != PORT_16750) { 2404 if (port->type != PORT_16750) {
2422 if (fcr & UART_FCR_ENABLE_FIFO) { 2405 /* emulated UARTs (Lucent Venus 167x) need two steps */
2423 /* emulated UARTs (Lucent Venus 167x) need two steps */ 2406 if (fcr & UART_FCR_ENABLE_FIFO)
2424 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 2407 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2425 } 2408 serial_port_out(port, UART_FCR, fcr); /* set fcr */
2426 serial_outp(up, UART_FCR, fcr); /* set fcr */ 2409 }
2427 } 2410 serial8250_set_mctrl(port, port->mctrl);
2428 serial8250_set_mctrl(&up->port, up->port.mctrl); 2411 spin_unlock_irqrestore(&port->lock, flags);
2429 spin_unlock_irqrestore(&up->port.lock, flags);
2430 /* Don't rewrite B0 */ 2412 /* Don't rewrite B0 */
2431 if (tty_termios_baud_rate(termios)) 2413 if (tty_termios_baud_rate(termios))
2432 tty_termios_encode_baud_rate(termios, baud, baud); 2414 tty_termios_encode_baud_rate(termios, baud, baud);
@@ -2491,26 +2473,26 @@ static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2491static int serial8250_request_std_resource(struct uart_8250_port *up) 2473static int serial8250_request_std_resource(struct uart_8250_port *up)
2492{ 2474{
2493 unsigned int size = serial8250_port_size(up); 2475 unsigned int size = serial8250_port_size(up);
2476 struct uart_port *port = &up->port;
2494 int ret = 0; 2477 int ret = 0;
2495 2478
2496 switch (up->port.iotype) { 2479 switch (port->iotype) {
2497 case UPIO_AU: 2480 case UPIO_AU:
2498 case UPIO_TSI: 2481 case UPIO_TSI:
2499 case UPIO_MEM32: 2482 case UPIO_MEM32:
2500 case UPIO_MEM: 2483 case UPIO_MEM:
2501 if (!up->port.mapbase) 2484 if (!port->mapbase)
2502 break; 2485 break;
2503 2486
2504 if (!request_mem_region(up->port.mapbase, size, "serial")) { 2487 if (!request_mem_region(port->mapbase, size, "serial")) {
2505 ret = -EBUSY; 2488 ret = -EBUSY;
2506 break; 2489 break;
2507 } 2490 }
2508 2491
2509 if (up->port.flags & UPF_IOREMAP) { 2492 if (port->flags & UPF_IOREMAP) {
2510 up->port.membase = ioremap_nocache(up->port.mapbase, 2493 port->membase = ioremap_nocache(port->mapbase, size);
2511 size); 2494 if (!port->membase) {
2512 if (!up->port.membase) { 2495 release_mem_region(port->mapbase, size);
2513 release_mem_region(up->port.mapbase, size);
2514 ret = -ENOMEM; 2496 ret = -ENOMEM;
2515 } 2497 }
2516 } 2498 }
@@ -2518,7 +2500,7 @@ static int serial8250_request_std_resource(struct uart_8250_port *up)
2518 2500
2519 case UPIO_HUB6: 2501 case UPIO_HUB6:
2520 case UPIO_PORT: 2502 case UPIO_PORT:
2521 if (!request_region(up->port.iobase, size, "serial")) 2503 if (!request_region(port->iobase, size, "serial"))
2522 ret = -EBUSY; 2504 ret = -EBUSY;
2523 break; 2505 break;
2524 } 2506 }
@@ -2528,26 +2510,27 @@ static int serial8250_request_std_resource(struct uart_8250_port *up)
2528static void serial8250_release_std_resource(struct uart_8250_port *up) 2510static void serial8250_release_std_resource(struct uart_8250_port *up)
2529{ 2511{
2530 unsigned int size = serial8250_port_size(up); 2512 unsigned int size = serial8250_port_size(up);
2513 struct uart_port *port = &up->port;
2531 2514
2532 switch (up->port.iotype) { 2515 switch (port->iotype) {
2533 case UPIO_AU: 2516 case UPIO_AU:
2534 case UPIO_TSI: 2517 case UPIO_TSI:
2535 case UPIO_MEM32: 2518 case UPIO_MEM32:
2536 case UPIO_MEM: 2519 case UPIO_MEM:
2537 if (!up->port.mapbase) 2520 if (!port->mapbase)
2538 break; 2521 break;
2539 2522
2540 if (up->port.flags & UPF_IOREMAP) { 2523 if (port->flags & UPF_IOREMAP) {
2541 iounmap(up->port.membase); 2524 iounmap(port->membase);
2542 up->port.membase = NULL; 2525 port->membase = NULL;
2543 } 2526 }
2544 2527
2545 release_mem_region(up->port.mapbase, size); 2528 release_mem_region(port->mapbase, size);
2546 break; 2529 break;
2547 2530
2548 case UPIO_HUB6: 2531 case UPIO_HUB6:
2549 case UPIO_PORT: 2532 case UPIO_PORT:
2550 release_region(up->port.iobase, size); 2533 release_region(port->iobase, size);
2551 break; 2534 break;
2552 } 2535 }
2553} 2536}
@@ -2556,12 +2539,13 @@ static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2556{ 2539{
2557 unsigned long start = UART_RSA_BASE << up->port.regshift; 2540 unsigned long start = UART_RSA_BASE << up->port.regshift;
2558 unsigned int size = 8 << up->port.regshift; 2541 unsigned int size = 8 << up->port.regshift;
2542 struct uart_port *port = &up->port;
2559 int ret = -EINVAL; 2543 int ret = -EINVAL;
2560 2544
2561 switch (up->port.iotype) { 2545 switch (port->iotype) {
2562 case UPIO_HUB6: 2546 case UPIO_HUB6:
2563 case UPIO_PORT: 2547 case UPIO_PORT:
2564 start += up->port.iobase; 2548 start += port->iobase;
2565 if (request_region(start, size, "serial-rsa")) 2549 if (request_region(start, size, "serial-rsa"))
2566 ret = 0; 2550 ret = 0;
2567 else 2551 else
@@ -2576,11 +2560,12 @@ static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2576{ 2560{
2577 unsigned long offset = UART_RSA_BASE << up->port.regshift; 2561 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2578 unsigned int size = 8 << up->port.regshift; 2562 unsigned int size = 8 << up->port.regshift;
2563 struct uart_port *port = &up->port;
2579 2564
2580 switch (up->port.iotype) { 2565 switch (port->iotype) {
2581 case UPIO_HUB6: 2566 case UPIO_HUB6:
2582 case UPIO_PORT: 2567 case UPIO_PORT:
2583 release_region(up->port.iobase + offset, size); 2568 release_region(port->iobase + offset, size);
2584 break; 2569 break;
2585 } 2570 }
2586} 2571}
@@ -2591,7 +2576,7 @@ static void serial8250_release_port(struct uart_port *port)
2591 container_of(port, struct uart_8250_port, port); 2576 container_of(port, struct uart_8250_port, port);
2592 2577
2593 serial8250_release_std_resource(up); 2578 serial8250_release_std_resource(up);
2594 if (up->port.type == PORT_RSA) 2579 if (port->type == PORT_RSA)
2595 serial8250_release_rsa_resource(up); 2580 serial8250_release_rsa_resource(up);
2596} 2581}
2597 2582
@@ -2602,7 +2587,7 @@ static int serial8250_request_port(struct uart_port *port)
2602 int ret = 0; 2587 int ret = 0;
2603 2588
2604 ret = serial8250_request_std_resource(up); 2589 ret = serial8250_request_std_resource(up);
2605 if (ret == 0 && up->port.type == PORT_RSA) { 2590 if (ret == 0 && port->type == PORT_RSA) {
2606 ret = serial8250_request_rsa_resource(up); 2591 ret = serial8250_request_rsa_resource(up);
2607 if (ret < 0) 2592 if (ret < 0)
2608 serial8250_release_std_resource(up); 2593 serial8250_release_std_resource(up);
@@ -2630,22 +2615,22 @@ static void serial8250_config_port(struct uart_port *port, int flags)
2630 if (ret < 0) 2615 if (ret < 0)
2631 probeflags &= ~PROBE_RSA; 2616 probeflags &= ~PROBE_RSA;
2632 2617
2633 if (up->port.iotype != up->cur_iotype) 2618 if (port->iotype != up->cur_iotype)
2634 set_io_from_upio(port); 2619 set_io_from_upio(port);
2635 2620
2636 if (flags & UART_CONFIG_TYPE) 2621 if (flags & UART_CONFIG_TYPE)
2637 autoconfig(up, probeflags); 2622 autoconfig(up, probeflags);
2638 2623
2639 /* if access method is AU, it is a 16550 with a quirk */ 2624 /* if access method is AU, it is a 16550 with a quirk */
2640 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU) 2625 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
2641 up->bugs |= UART_BUG_NOMSR; 2626 up->bugs |= UART_BUG_NOMSR;
2642 2627
2643 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) 2628 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2644 autoconfig_irq(up); 2629 autoconfig_irq(up);
2645 2630
2646 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA) 2631 if (port->type != PORT_RSA && probeflags & PROBE_RSA)
2647 serial8250_release_rsa_resource(up); 2632 serial8250_release_rsa_resource(up);
2648 if (up->port.type == PORT_UNKNOWN) 2633 if (port->type == PORT_UNKNOWN)
2649 serial8250_release_std_resource(up); 2634 serial8250_release_std_resource(up);
2650} 2635}
2651 2636
@@ -2719,9 +2704,10 @@ static void __init serial8250_isa_init_ports(void)
2719 2704
2720 for (i = 0; i < nr_uarts; i++) { 2705 for (i = 0; i < nr_uarts; i++) {
2721 struct uart_8250_port *up = &serial8250_ports[i]; 2706 struct uart_8250_port *up = &serial8250_ports[i];
2707 struct uart_port *port = &up->port;
2722 2708
2723 up->port.line = i; 2709 port->line = i;
2724 spin_lock_init(&up->port.lock); 2710 spin_lock_init(&port->lock);
2725 2711
2726 init_timer(&up->timer); 2712 init_timer(&up->timer);
2727 up->timer.function = serial8250_timeout; 2713 up->timer.function = serial8250_timeout;
@@ -2732,7 +2718,7 @@ static void __init serial8250_isa_init_ports(void)
2732 up->mcr_mask = ~ALPHA_KLUDGE_MCR; 2718 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2733 up->mcr_force = ALPHA_KLUDGE_MCR; 2719 up->mcr_force = ALPHA_KLUDGE_MCR;
2734 2720
2735 up->port.ops = &serial8250_pops; 2721 port->ops = &serial8250_pops;
2736 } 2722 }
2737 2723
2738 if (share_irqs) 2724 if (share_irqs)
@@ -2741,17 +2727,19 @@ static void __init serial8250_isa_init_ports(void)
2741 for (i = 0, up = serial8250_ports; 2727 for (i = 0, up = serial8250_ports;
2742 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts; 2728 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2743 i++, up++) { 2729 i++, up++) {
2744 up->port.iobase = old_serial_port[i].port; 2730 struct uart_port *port = &up->port;
2745 up->port.irq = irq_canonicalize(old_serial_port[i].irq); 2731
2746 up->port.irqflags = old_serial_port[i].irqflags; 2732 port->iobase = old_serial_port[i].port;
2747 up->port.uartclk = old_serial_port[i].baud_base * 16; 2733 port->irq = irq_canonicalize(old_serial_port[i].irq);
2748 up->port.flags = old_serial_port[i].flags; 2734 port->irqflags = old_serial_port[i].irqflags;
2749 up->port.hub6 = old_serial_port[i].hub6; 2735 port->uartclk = old_serial_port[i].baud_base * 16;
2750 up->port.membase = old_serial_port[i].iomem_base; 2736 port->flags = old_serial_port[i].flags;
2751 up->port.iotype = old_serial_port[i].io_type; 2737 port->hub6 = old_serial_port[i].hub6;
2752 up->port.regshift = old_serial_port[i].iomem_reg_shift; 2738 port->membase = old_serial_port[i].iomem_base;
2753 set_io_from_upio(&up->port); 2739 port->iotype = old_serial_port[i].io_type;
2754 up->port.irqflags |= irqflag; 2740 port->regshift = old_serial_port[i].iomem_reg_shift;
2741 set_io_from_upio(port);
2742 port->irqflags |= irqflag;
2755 if (serial8250_isa_config != NULL) 2743 if (serial8250_isa_config != NULL)
2756 serial8250_isa_config(i, &up->port, &up->capabilities); 2744 serial8250_isa_config(i, &up->port, &up->capabilities);
2757 2745
@@ -2799,7 +2787,7 @@ static void serial8250_console_putchar(struct uart_port *port, int ch)
2799 container_of(port, struct uart_8250_port, port); 2787 container_of(port, struct uart_8250_port, port);
2800 2788
2801 wait_for_xmitr(up, UART_LSR_THRE); 2789 wait_for_xmitr(up, UART_LSR_THRE);
2802 serial_out(up, UART_TX, ch); 2790 serial_port_out(port, UART_TX, ch);
2803} 2791}
2804 2792
2805/* 2793/*
@@ -2812,6 +2800,7 @@ static void
2812serial8250_console_write(struct console *co, const char *s, unsigned int count) 2800serial8250_console_write(struct console *co, const char *s, unsigned int count)
2813{ 2801{
2814 struct uart_8250_port *up = &serial8250_ports[co->index]; 2802 struct uart_8250_port *up = &serial8250_ports[co->index];
2803 struct uart_port *port = &up->port;
2815 unsigned long flags; 2804 unsigned long flags;
2816 unsigned int ier; 2805 unsigned int ier;
2817 int locked = 1; 2806 int locked = 1;
@@ -2819,32 +2808,32 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2819 touch_nmi_watchdog(); 2808 touch_nmi_watchdog();
2820 2809
2821 local_irq_save(flags); 2810 local_irq_save(flags);
2822 if (up->port.sysrq) { 2811 if (port->sysrq) {
2823 /* serial8250_handle_irq() already took the lock */ 2812 /* serial8250_handle_irq() already took the lock */
2824 locked = 0; 2813 locked = 0;
2825 } else if (oops_in_progress) { 2814 } else if (oops_in_progress) {
2826 locked = spin_trylock(&up->port.lock); 2815 locked = spin_trylock(&port->lock);
2827 } else 2816 } else
2828 spin_lock(&up->port.lock); 2817 spin_lock(&port->lock);
2829 2818
2830 /* 2819 /*
2831 * First save the IER then disable the interrupts 2820 * First save the IER then disable the interrupts
2832 */ 2821 */
2833 ier = serial_in(up, UART_IER); 2822 ier = serial_port_in(port, UART_IER);
2834 2823
2835 if (up->capabilities & UART_CAP_UUE) 2824 if (up->capabilities & UART_CAP_UUE)
2836 serial_out(up, UART_IER, UART_IER_UUE); 2825 serial_port_out(port, UART_IER, UART_IER_UUE);
2837 else 2826 else
2838 serial_out(up, UART_IER, 0); 2827 serial_port_out(port, UART_IER, 0);
2839 2828
2840 uart_console_write(&up->port, s, count, serial8250_console_putchar); 2829 uart_console_write(port, s, count, serial8250_console_putchar);
2841 2830
2842 /* 2831 /*
2843 * Finally, wait for transmitter to become empty 2832 * Finally, wait for transmitter to become empty
2844 * and restore the IER 2833 * and restore the IER
2845 */ 2834 */
2846 wait_for_xmitr(up, BOTH_EMPTY); 2835 wait_for_xmitr(up, BOTH_EMPTY);
2847 serial_out(up, UART_IER, ier); 2836 serial_port_out(port, UART_IER, ier);
2848 2837
2849 /* 2838 /*
2850 * The receive handling will happen properly because the 2839 * The receive handling will happen properly because the
@@ -2857,7 +2846,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2857 serial8250_modem_status(up); 2846 serial8250_modem_status(up);
2858 2847
2859 if (locked) 2848 if (locked)
2860 spin_unlock(&up->port.lock); 2849 spin_unlock(&port->lock);
2861 local_irq_restore(flags); 2850 local_irq_restore(flags);
2862} 2851}
2863 2852
@@ -3002,17 +2991,18 @@ void serial8250_suspend_port(int line)
3002void serial8250_resume_port(int line) 2991void serial8250_resume_port(int line)
3003{ 2992{
3004 struct uart_8250_port *up = &serial8250_ports[line]; 2993 struct uart_8250_port *up = &serial8250_ports[line];
2994 struct uart_port *port = &up->port;
3005 2995
3006 if (up->capabilities & UART_NATSEMI) { 2996 if (up->capabilities & UART_NATSEMI) {
3007 /* Ensure it's still in high speed mode */ 2997 /* Ensure it's still in high speed mode */
3008 serial_outp(up, UART_LCR, 0xE0); 2998 serial_port_out(port, UART_LCR, 0xE0);
3009 2999
3010 ns16550a_goto_highspeed(up); 3000 ns16550a_goto_highspeed(up);
3011 3001
3012 serial_outp(up, UART_LCR, 0); 3002 serial_port_out(port, UART_LCR, 0);
3013 up->port.uartclk = 921600*16; 3003 port->uartclk = 921600*16;
3014 } 3004 }
3015 uart_resume_port(&serial8250_reg, &up->port); 3005 uart_resume_port(&serial8250_reg, port);
3016} 3006}
3017 3007
3018/* 3008/*
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index ae027be57e25..2868a1da254d 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -86,6 +86,16 @@ struct serial8250_config {
86#define SERIAL8250_SHARE_IRQS 0 86#define SERIAL8250_SHARE_IRQS 0
87#endif 87#endif
88 88
89static inline int serial_in(struct uart_8250_port *up, int offset)
90{
91 return up->port.serial_in(&up->port, offset);
92}
93
94static inline void serial_out(struct uart_8250_port *up, int offset, int value)
95{
96 up->port.serial_out(&up->port, offset, value);
97}
98
89#if defined(__alpha__) && !defined(CONFIG_PCI) 99#if defined(__alpha__) && !defined(CONFIG_PCI)
90/* 100/*
91 * Digital did something really horribly wrong with the OUT1 and OUT2 101 * Digital did something really horribly wrong with the OUT1 and OUT2
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 2de99248dfae..76e7764488e6 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1347,4 +1347,17 @@ config SERIAL_AR933X_NR_UARTS
1347 Set this to the number of serial ports you want the driver 1347 Set this to the number of serial ports you want the driver
1348 to support. 1348 to support.
1349 1349
1350config SERIAL_EFM32_UART
1351 tristate "EFM32 UART/USART port."
1352 depends on ARCH_EFM32
1353 select SERIAL_CORE
1354 help
1355 This driver support the USART and UART ports on
1356 Energy Micro's efm32 SoCs.
1357
1358config SERIAL_EFM32_UART_CONSOLE
1359 bool "EFM32 UART/USART console support"
1360 depends on SERIAL_EFM32_UART=y
1361 select SERIAL_CORE_CONSOLE
1362
1350endmenu 1363endmenu
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index fef32e10c851..7257c5d898ae 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -61,12 +61,12 @@ obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
61obj-$(CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL) += nwpserial.o 61obj-$(CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL) += nwpserial.o
62obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o 62obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
63obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o 63obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o
64obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o
64obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o 65obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
65obj-$(CONFIG_SERIAL_QE) += ucc_uart.o 66obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
66obj-$(CONFIG_SERIAL_TIMBERDALE) += timbuart.o 67obj-$(CONFIG_SERIAL_TIMBERDALE) += timbuart.o
67obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o 68obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o
68obj-$(CONFIG_SERIAL_ALTERA_JTAGUART) += altera_jtaguart.o 69obj-$(CONFIG_SERIAL_ALTERA_JTAGUART) += altera_jtaguart.o
69obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o
70obj-$(CONFIG_SERIAL_VT8500) += vt8500_serial.o 70obj-$(CONFIG_SERIAL_VT8500) += vt8500_serial.o
71obj-$(CONFIG_SERIAL_MRST_MAX3110) += mrst_max3110.o 71obj-$(CONFIG_SERIAL_MRST_MAX3110) += mrst_max3110.o
72obj-$(CONFIG_SERIAL_MFD_HSU) += mfd.o 72obj-$(CONFIG_SERIAL_MFD_HSU) += mfd.o
@@ -78,3 +78,4 @@ obj-$(CONFIG_SERIAL_LANTIQ) += lantiq.o
78obj-$(CONFIG_SERIAL_XILINX_PS_UART) += xilinx_uartps.o 78obj-$(CONFIG_SERIAL_XILINX_PS_UART) += xilinx_uartps.o
79obj-$(CONFIG_SERIAL_SIRFSOC) += sirfsoc_uart.o 79obj-$(CONFIG_SERIAL_SIRFSOC) += sirfsoc_uart.o
80obj-$(CONFIG_SERIAL_AR933X) += ar933x_uart.o 80obj-$(CONFIG_SERIAL_AR933X) += ar933x_uart.o
81obj-$(CONFIG_SERIAL_EFM32_UART) += efm32-uart.o
diff --git a/drivers/tty/serial/altera_uart.c b/drivers/tty/serial/altera_uart.c
index 1d04c5037f25..e7903751e058 100644
--- a/drivers/tty/serial/altera_uart.c
+++ b/drivers/tty/serial/altera_uart.c
@@ -377,6 +377,26 @@ static int altera_uart_verify_port(struct uart_port *port,
377 return 0; 377 return 0;
378} 378}
379 379
380#ifdef CONFIG_CONSOLE_POLL
381static int altera_uart_poll_get_char(struct uart_port *port)
382{
383 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
384 ALTERA_UART_STATUS_RRDY_MSK))
385 cpu_relax();
386
387 return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
388}
389
390static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
391{
392 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
393 ALTERA_UART_STATUS_TRDY_MSK))
394 cpu_relax();
395
396 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
397}
398#endif
399
380/* 400/*
381 * Define the basic serial functions we support. 401 * Define the basic serial functions we support.
382 */ 402 */
@@ -397,35 +417,16 @@ static struct uart_ops altera_uart_ops = {
397 .release_port = altera_uart_release_port, 417 .release_port = altera_uart_release_port,
398 .config_port = altera_uart_config_port, 418 .config_port = altera_uart_config_port,
399 .verify_port = altera_uart_verify_port, 419 .verify_port = altera_uart_verify_port,
420#ifdef CONFIG_CONSOLE_POLL
421 .poll_get_char = altera_uart_poll_get_char,
422 .poll_put_char = altera_uart_poll_put_char,
423#endif
400}; 424};
401 425
402static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS]; 426static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
403 427
404#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) 428#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
405 429
406int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
407{
408 struct uart_port *port;
409 int i;
410
411 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
412 port = &altera_uart_ports[i].port;
413
414 port->line = i;
415 port->type = PORT_ALTERA_UART;
416 port->mapbase = platp[i].mapbase;
417 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
418 port->iotype = SERIAL_IO_MEM;
419 port->irq = platp[i].irq;
420 port->uartclk = platp[i].uartclk;
421 port->flags = UPF_BOOT_AUTOCONF;
422 port->ops = &altera_uart_ops;
423 port->private_data = platp;
424 }
425
426 return 0;
427}
428
429static void altera_uart_console_putc(struct uart_port *port, const char c) 430static void altera_uart_console_putc(struct uart_port *port, const char c)
430{ 431{
431 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 432 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 6800f5f26241..20d795d9b591 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -827,7 +827,12 @@ static void pl011_dma_rx_callback(void *data)
827{ 827{
828 struct uart_amba_port *uap = data; 828 struct uart_amba_port *uap = data;
829 struct pl011_dmarx_data *dmarx = &uap->dmarx; 829 struct pl011_dmarx_data *dmarx = &uap->dmarx;
830 struct dma_chan *rxchan = dmarx->chan;
830 bool lastbuf = dmarx->use_buf_b; 831 bool lastbuf = dmarx->use_buf_b;
832 struct pl011_sgbuf *sgbuf = dmarx->use_buf_b ?
833 &dmarx->sgbuf_b : &dmarx->sgbuf_a;
834 size_t pending;
835 struct dma_tx_state state;
831 int ret; 836 int ret;
832 837
833 /* 838 /*
@@ -838,11 +843,21 @@ static void pl011_dma_rx_callback(void *data)
838 * we immediately trigger the next DMA job. 843 * we immediately trigger the next DMA job.
839 */ 844 */
840 spin_lock_irq(&uap->port.lock); 845 spin_lock_irq(&uap->port.lock);
846 /*
847 * Rx data can be taken by the UART interrupts during
848 * the DMA irq handler. So we check the residue here.
849 */
850 rxchan->device->device_tx_status(rxchan, dmarx->cookie, &state);
851 pending = sgbuf->sg.length - state.residue;
852 BUG_ON(pending > PL011_DMA_BUFFER_SIZE);
853 /* Then we terminate the transfer - we now know our residue */
854 dmaengine_terminate_all(rxchan);
855
841 uap->dmarx.running = false; 856 uap->dmarx.running = false;
842 dmarx->use_buf_b = !lastbuf; 857 dmarx->use_buf_b = !lastbuf;
843 ret = pl011_dma_rx_trigger_dma(uap); 858 ret = pl011_dma_rx_trigger_dma(uap);
844 859
845 pl011_dma_rx_chars(uap, PL011_DMA_BUFFER_SIZE, lastbuf, false); 860 pl011_dma_rx_chars(uap, pending, lastbuf, false);
846 spin_unlock_irq(&uap->port.lock); 861 spin_unlock_irq(&uap->port.lock);
847 /* 862 /*
848 * Do this check after we picked the DMA chars so we don't 863 * Do this check after we picked the DMA chars so we don't
@@ -1381,6 +1396,10 @@ static int pl011_startup(struct uart_port *port)
1381 1396
1382 uap->port.uartclk = clk_get_rate(uap->clk); 1397 uap->port.uartclk = clk_get_rate(uap->clk);
1383 1398
1399 /* Clear pending error and receive interrupts */
1400 writew(UART011_OEIS | UART011_BEIS | UART011_PEIS | UART011_FEIS |
1401 UART011_RTIS | UART011_RXIS, uap->port.membase + UART011_ICR);
1402
1384 /* 1403 /*
1385 * Allocate the IRQ 1404 * Allocate the IRQ
1386 */ 1405 */
@@ -1417,10 +1436,6 @@ static int pl011_startup(struct uart_port *port)
1417 cr |= UART01x_CR_UARTEN | UART011_CR_RXE | UART011_CR_TXE; 1436 cr |= UART01x_CR_UARTEN | UART011_CR_RXE | UART011_CR_TXE;
1418 writew(cr, uap->port.membase + UART011_CR); 1437 writew(cr, uap->port.membase + UART011_CR);
1419 1438
1420 /* Clear pending error interrupts */
1421 writew(UART011_OEIS | UART011_BEIS | UART011_PEIS | UART011_FEIS,
1422 uap->port.membase + UART011_ICR);
1423
1424 /* 1439 /*
1425 * initialise the old status of the modem signals 1440 * initialise the old status of the modem signals
1426 */ 1441 */
@@ -1435,6 +1450,9 @@ static int pl011_startup(struct uart_port *port)
1435 * as well. 1450 * as well.
1436 */ 1451 */
1437 spin_lock_irq(&uap->port.lock); 1452 spin_lock_irq(&uap->port.lock);
1453 /* Clear out any spuriously appearing RX interrupts */
1454 writew(UART011_RTIS | UART011_RXIS,
1455 uap->port.membase + UART011_ICR);
1438 uap->im = UART011_RTIM; 1456 uap->im = UART011_RTIM;
1439 if (!pl011_dma_rx_running(uap)) 1457 if (!pl011_dma_rx_running(uap))
1440 uap->im |= UART011_RXIM; 1458 uap->im |= UART011_RXIM;
@@ -1927,6 +1945,10 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
1927 goto unmap; 1945 goto unmap;
1928 } 1946 }
1929 1947
1948 /* Ensure interrupts from this UART are masked and cleared */
1949 writew(0, uap->port.membase + UART011_IMSC);
1950 writew(0xffff, uap->port.membase + UART011_ICR);
1951
1930 uap->vendor = vendor; 1952 uap->vendor = vendor;
1931 uap->lcrh_rx = vendor->lcrh_rx; 1953 uap->lcrh_rx = vendor->lcrh_rx;
1932 uap->lcrh_tx = vendor->lcrh_tx; 1954 uap->lcrh_tx = vendor->lcrh_tx;
diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
index 26953bfa6922..5832fdef11e9 100644
--- a/drivers/tty/serial/bfin_uart.c
+++ b/drivers/tty/serial/bfin_uart.c
@@ -535,11 +535,13 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
535 * when start a new tx. 535 * when start a new tx.
536 */ 536 */
537 UART_CLEAR_IER(uart, ETBEI); 537 UART_CLEAR_IER(uart, ETBEI);
538 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
539 uart->port.icount.tx += uart->tx_count; 538 uart->port.icount.tx += uart->tx_count;
539 if (!uart_circ_empty(xmit)) {
540 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
540 541
541 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 542 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
542 uart_write_wakeup(&uart->port); 543 uart_write_wakeup(&uart->port);
544 }
543 545
544 bfin_serial_dma_tx_chars(uart); 546 bfin_serial_dma_tx_chars(uart);
545 } 547 }
diff --git a/drivers/tty/serial/crisv10.c b/drivers/tty/serial/crisv10.c
index 1dfba7b779c8..23d791696879 100644
--- a/drivers/tty/serial/crisv10.c
+++ b/drivers/tty/serial/crisv10.c
@@ -4105,20 +4105,11 @@ static int
4105rs_open(struct tty_struct *tty, struct file * filp) 4105rs_open(struct tty_struct *tty, struct file * filp)
4106{ 4106{
4107 struct e100_serial *info; 4107 struct e100_serial *info;
4108 int retval, line; 4108 int retval;
4109 unsigned long page; 4109 unsigned long page;
4110 int allocated_resources = 0; 4110 int allocated_resources = 0;
4111 4111
4112 /* find which port we want to open */ 4112 info = rs_table + tty->index;
4113 line = tty->index;
4114
4115 if (line < 0 || line >= NR_PORTS)
4116 return -ENODEV;
4117
4118 /* find the corresponding e100_serial struct in the table */
4119 info = rs_table + line;
4120
4121 /* don't allow the opening of ports that are not enabled in the HW config */
4122 if (!info->enabled) 4113 if (!info->enabled)
4123 return -ENODEV; 4114 return -ENODEV;
4124 4115
@@ -4131,7 +4122,7 @@ rs_open(struct tty_struct *tty, struct file * filp)
4131 tty->driver_data = info; 4122 tty->driver_data = info;
4132 info->port.tty = tty; 4123 info->port.tty = tty;
4133 4124
4134 info->port.tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 4125 tty->low_latency = !!(info->flags & ASYNC_LOW_LATENCY);
4135 4126
4136 if (!tmp_buf) { 4127 if (!tmp_buf) {
4137 page = get_zeroed_page(GFP_KERNEL); 4128 page = get_zeroed_page(GFP_KERNEL);
diff --git a/drivers/tty/serial/efm32-uart.c b/drivers/tty/serial/efm32-uart.c
new file mode 100644
index 000000000000..615e46470491
--- /dev/null
+++ b/drivers/tty/serial/efm32-uart.c
@@ -0,0 +1,830 @@
1#if defined(CONFIG_SERIAL_EFM32_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
2#define SUPPORT_SYSRQ
3#endif
4
5#include <linux/kernel.h>
6#include <linux/module.h>
7#include <linux/io.h>
8#include <linux/platform_device.h>
9#include <linux/console.h>
10#include <linux/sysrq.h>
11#include <linux/serial_core.h>
12#include <linux/tty_flip.h>
13#include <linux/slab.h>
14#include <linux/clk.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17
18#include <linux/platform_data/efm32-uart.h>
19
20#define DRIVER_NAME "efm32-uart"
21#define DEV_NAME "ttyefm"
22
23#define UARTn_CTRL 0x00
24#define UARTn_CTRL_SYNC 0x0001
25#define UARTn_CTRL_TXBIL 0x1000
26
27#define UARTn_FRAME 0x04
28#define UARTn_FRAME_DATABITS__MASK 0x000f
29#define UARTn_FRAME_DATABITS(n) ((n) - 3)
30#define UARTn_FRAME_PARITY_NONE 0x0000
31#define UARTn_FRAME_PARITY_EVEN 0x0200
32#define UARTn_FRAME_PARITY_ODD 0x0300
33#define UARTn_FRAME_STOPBITS_HALF 0x0000
34#define UARTn_FRAME_STOPBITS_ONE 0x1000
35#define UARTn_FRAME_STOPBITS_TWO 0x3000
36
37#define UARTn_CMD 0x0c
38#define UARTn_CMD_RXEN 0x0001
39#define UARTn_CMD_RXDIS 0x0002
40#define UARTn_CMD_TXEN 0x0004
41#define UARTn_CMD_TXDIS 0x0008
42
43#define UARTn_STATUS 0x10
44#define UARTn_STATUS_TXENS 0x0002
45#define UARTn_STATUS_TXC 0x0020
46#define UARTn_STATUS_TXBL 0x0040
47#define UARTn_STATUS_RXDATAV 0x0080
48
49#define UARTn_CLKDIV 0x14
50
51#define UARTn_RXDATAX 0x18
52#define UARTn_RXDATAX_RXDATA__MASK 0x01ff
53#define UARTn_RXDATAX_PERR 0x4000
54#define UARTn_RXDATAX_FERR 0x8000
55/*
56 * This is a software only flag used for ignore_status_mask and
57 * read_status_mask! It's used for breaks that the hardware doesn't report
58 * explicitly.
59 */
60#define SW_UARTn_RXDATAX_BERR 0x2000
61
62#define UARTn_TXDATA 0x34
63
64#define UARTn_IF 0x40
65#define UARTn_IF_TXC 0x0001
66#define UARTn_IF_TXBL 0x0002
67#define UARTn_IF_RXDATAV 0x0004
68#define UARTn_IF_RXOF 0x0010
69
70#define UARTn_IFS 0x44
71#define UARTn_IFC 0x48
72#define UARTn_IEN 0x4c
73
74#define UARTn_ROUTE 0x54
75#define UARTn_ROUTE_LOCATION__MASK 0x0700
76#define UARTn_ROUTE_LOCATION(n) (((n) << 8) & UARTn_ROUTE_LOCATION__MASK)
77#define UARTn_ROUTE_RXPEN 0x0001
78#define UARTn_ROUTE_TXPEN 0x0002
79
80struct efm32_uart_port {
81 struct uart_port port;
82 unsigned int txirq;
83 struct clk *clk;
84};
85#define to_efm_port(_port) container_of(_port, struct efm32_uart_port, port)
86#define efm_debug(efm_port, format, arg...) \
87 dev_dbg(efm_port->port.dev, format, ##arg)
88
89static void efm32_uart_write32(struct efm32_uart_port *efm_port,
90 u32 value, unsigned offset)
91{
92 writel_relaxed(value, efm_port->port.membase + offset);
93}
94
95static u32 efm32_uart_read32(struct efm32_uart_port *efm_port,
96 unsigned offset)
97{
98 return readl_relaxed(efm_port->port.membase + offset);
99}
100
101static unsigned int efm32_uart_tx_empty(struct uart_port *port)
102{
103 struct efm32_uart_port *efm_port = to_efm_port(port);
104 u32 status = efm32_uart_read32(efm_port, UARTn_STATUS);
105
106 if (status & UARTn_STATUS_TXC)
107 return TIOCSER_TEMT;
108 else
109 return 0;
110}
111
112static void efm32_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
113{
114 /* sorry, neither handshaking lines nor loop functionallity */
115}
116
117static unsigned int efm32_uart_get_mctrl(struct uart_port *port)
118{
119 /* sorry, no handshaking lines available */
120 return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
121}
122
123static void efm32_uart_stop_tx(struct uart_port *port)
124{
125 struct efm32_uart_port *efm_port = to_efm_port(port);
126 u32 ien = efm32_uart_read32(efm_port, UARTn_IEN);
127
128 efm32_uart_write32(efm_port, UARTn_CMD_TXDIS, UARTn_CMD);
129 ien &= ~(UARTn_IF_TXC | UARTn_IF_TXBL);
130 efm32_uart_write32(efm_port, ien, UARTn_IEN);
131}
132
133static void efm32_uart_tx_chars(struct efm32_uart_port *efm_port)
134{
135 struct uart_port *port = &efm_port->port;
136 struct circ_buf *xmit = &port->state->xmit;
137
138 while (efm32_uart_read32(efm_port, UARTn_STATUS) &
139 UARTn_STATUS_TXBL) {
140 if (port->x_char) {
141 port->icount.tx++;
142 efm32_uart_write32(efm_port, port->x_char,
143 UARTn_TXDATA);
144 port->x_char = 0;
145 continue;
146 }
147 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
148 port->icount.tx++;
149 efm32_uart_write32(efm_port, xmit->buf[xmit->tail],
150 UARTn_TXDATA);
151 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
152 } else
153 break;
154 }
155
156 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
157 uart_write_wakeup(port);
158
159 if (!port->x_char && uart_circ_empty(xmit) &&
160 efm32_uart_read32(efm_port, UARTn_STATUS) &
161 UARTn_STATUS_TXC)
162 efm32_uart_stop_tx(port);
163}
164
165static void efm32_uart_start_tx(struct uart_port *port)
166{
167 struct efm32_uart_port *efm_port = to_efm_port(port);
168 u32 ien;
169
170 efm32_uart_write32(efm_port,
171 UARTn_IF_TXBL | UARTn_IF_TXC, UARTn_IFC);
172 ien = efm32_uart_read32(efm_port, UARTn_IEN);
173 efm32_uart_write32(efm_port,
174 ien | UARTn_IF_TXBL | UARTn_IF_TXC, UARTn_IEN);
175 efm32_uart_write32(efm_port, UARTn_CMD_TXEN, UARTn_CMD);
176
177 efm32_uart_tx_chars(efm_port);
178}
179
180static void efm32_uart_stop_rx(struct uart_port *port)
181{
182 struct efm32_uart_port *efm_port = to_efm_port(port);
183
184 efm32_uart_write32(efm_port, UARTn_CMD_RXDIS, UARTn_CMD);
185}
186
187static void efm32_uart_enable_ms(struct uart_port *port)
188{
189 /* no handshake lines, no modem status interrupts */
190}
191
192static void efm32_uart_break_ctl(struct uart_port *port, int ctl)
193{
194 /* not possible without fiddling with gpios */
195}
196
197static void efm32_uart_rx_chars(struct efm32_uart_port *efm_port,
198 struct tty_struct *tty)
199{
200 struct uart_port *port = &efm_port->port;
201
202 while (efm32_uart_read32(efm_port, UARTn_STATUS) &
203 UARTn_STATUS_RXDATAV) {
204 u32 rxdata = efm32_uart_read32(efm_port, UARTn_RXDATAX);
205 int flag = 0;
206
207 /*
208 * This is a reserved bit and I only saw it read as 0. But to be
209 * sure not to be confused too much by new devices adhere to the
210 * warning in the reference manual that reserverd bits might
211 * read as 1 in the future.
212 */
213 rxdata &= ~SW_UARTn_RXDATAX_BERR;
214
215 port->icount.rx++;
216
217 if ((rxdata & UARTn_RXDATAX_FERR) &&
218 !(rxdata & UARTn_RXDATAX_RXDATA__MASK)) {
219 rxdata |= SW_UARTn_RXDATAX_BERR;
220 port->icount.brk++;
221 if (uart_handle_break(port))
222 continue;
223 } else if (rxdata & UARTn_RXDATAX_PERR)
224 port->icount.parity++;
225 else if (rxdata & UARTn_RXDATAX_FERR)
226 port->icount.frame++;
227
228 rxdata &= port->read_status_mask;
229
230 if (rxdata & SW_UARTn_RXDATAX_BERR)
231 flag = TTY_BREAK;
232 else if (rxdata & UARTn_RXDATAX_PERR)
233 flag = TTY_PARITY;
234 else if (rxdata & UARTn_RXDATAX_FERR)
235 flag = TTY_FRAME;
236 else if (uart_handle_sysrq_char(port,
237 rxdata & UARTn_RXDATAX_RXDATA__MASK))
238 continue;
239
240 if (tty && (rxdata & port->ignore_status_mask) == 0)
241 tty_insert_flip_char(tty,
242 rxdata & UARTn_RXDATAX_RXDATA__MASK, flag);
243 }
244}
245
246static irqreturn_t efm32_uart_rxirq(int irq, void *data)
247{
248 struct efm32_uart_port *efm_port = data;
249 u32 irqflag = efm32_uart_read32(efm_port, UARTn_IF);
250 int handled = IRQ_NONE;
251 struct uart_port *port = &efm_port->port;
252 struct tty_struct *tty;
253
254 spin_lock(&port->lock);
255
256 tty = tty_kref_get(port->state->port.tty);
257
258 if (irqflag & UARTn_IF_RXDATAV) {
259 efm32_uart_write32(efm_port, UARTn_IF_RXDATAV, UARTn_IFC);
260 efm32_uart_rx_chars(efm_port, tty);
261
262 handled = IRQ_HANDLED;
263 }
264
265 if (irqflag & UARTn_IF_RXOF) {
266 efm32_uart_write32(efm_port, UARTn_IF_RXOF, UARTn_IFC);
267 port->icount.overrun++;
268 if (tty)
269 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
270
271 handled = IRQ_HANDLED;
272 }
273
274 if (tty) {
275 tty_flip_buffer_push(tty);
276 tty_kref_put(tty);
277 }
278
279 spin_unlock(&port->lock);
280
281 return handled;
282}
283
284static irqreturn_t efm32_uart_txirq(int irq, void *data)
285{
286 struct efm32_uart_port *efm_port = data;
287 u32 irqflag = efm32_uart_read32(efm_port, UARTn_IF);
288
289 /* TXBL doesn't need to be cleared */
290 if (irqflag & UARTn_IF_TXC)
291 efm32_uart_write32(efm_port, UARTn_IF_TXC, UARTn_IFC);
292
293 if (irqflag & (UARTn_IF_TXC | UARTn_IF_TXBL)) {
294 efm32_uart_tx_chars(efm_port);
295 return IRQ_HANDLED;
296 } else
297 return IRQ_NONE;
298}
299
300static int efm32_uart_startup(struct uart_port *port)
301{
302 struct efm32_uart_port *efm_port = to_efm_port(port);
303 u32 location = 0;
304 struct efm32_uart_pdata *pdata = dev_get_platdata(port->dev);
305 int ret;
306
307 if (pdata)
308 location = UARTn_ROUTE_LOCATION(pdata->location);
309
310 ret = clk_enable(efm_port->clk);
311 if (ret) {
312 efm_debug(efm_port, "failed to enable clk\n");
313 goto err_clk_enable;
314 }
315 port->uartclk = clk_get_rate(efm_port->clk);
316
317 /* Enable pins at configured location */
318 efm32_uart_write32(efm_port, location | UARTn_ROUTE_RXPEN | UARTn_ROUTE_TXPEN,
319 UARTn_ROUTE);
320
321 ret = request_irq(port->irq, efm32_uart_rxirq, 0,
322 DRIVER_NAME, efm_port);
323 if (ret) {
324 efm_debug(efm_port, "failed to register rxirq\n");
325 goto err_request_irq_rx;
326 }
327
328 /* disable all irqs */
329 efm32_uart_write32(efm_port, 0, UARTn_IEN);
330
331 ret = request_irq(efm_port->txirq, efm32_uart_txirq, 0,
332 DRIVER_NAME, efm_port);
333 if (ret) {
334 efm_debug(efm_port, "failed to register txirq\n");
335 free_irq(port->irq, efm_port);
336err_request_irq_rx:
337
338 clk_disable(efm_port->clk);
339 } else {
340 efm32_uart_write32(efm_port,
341 UARTn_IF_RXDATAV | UARTn_IF_RXOF, UARTn_IEN);
342 efm32_uart_write32(efm_port, UARTn_CMD_RXEN, UARTn_CMD);
343 }
344
345err_clk_enable:
346 return ret;
347}
348
349static void efm32_uart_shutdown(struct uart_port *port)
350{
351 struct efm32_uart_port *efm_port = to_efm_port(port);
352
353 efm32_uart_write32(efm_port, 0, UARTn_IEN);
354 free_irq(port->irq, efm_port);
355
356 clk_disable(efm_port->clk);
357}
358
359static void efm32_uart_set_termios(struct uart_port *port,
360 struct ktermios *new, struct ktermios *old)
361{
362 struct efm32_uart_port *efm_port = to_efm_port(port);
363 unsigned long flags;
364 unsigned baud;
365 u32 clkdiv;
366 u32 frame = 0;
367
368 /* no modem control lines */
369 new->c_cflag &= ~(CRTSCTS | CMSPAR);
370
371 baud = uart_get_baud_rate(port, new, old,
372 DIV_ROUND_CLOSEST(port->uartclk, 16 * 8192),
373 DIV_ROUND_CLOSEST(port->uartclk, 16));
374
375 switch (new->c_cflag & CSIZE) {
376 case CS5:
377 frame |= UARTn_FRAME_DATABITS(5);
378 break;
379 case CS6:
380 frame |= UARTn_FRAME_DATABITS(6);
381 break;
382 case CS7:
383 frame |= UARTn_FRAME_DATABITS(7);
384 break;
385 case CS8:
386 frame |= UARTn_FRAME_DATABITS(8);
387 break;
388 }
389
390 if (new->c_cflag & CSTOPB)
391 /* the receiver only verifies the first stop bit */
392 frame |= UARTn_FRAME_STOPBITS_TWO;
393 else
394 frame |= UARTn_FRAME_STOPBITS_ONE;
395
396 if (new->c_cflag & PARENB) {
397 if (new->c_cflag & PARODD)
398 frame |= UARTn_FRAME_PARITY_ODD;
399 else
400 frame |= UARTn_FRAME_PARITY_EVEN;
401 } else
402 frame |= UARTn_FRAME_PARITY_NONE;
403
404 /*
405 * the 6 lowest bits of CLKDIV are dc, bit 6 has value 0.25.
406 * port->uartclk <= 14e6, so 4 * port->uartclk doesn't overflow.
407 */
408 clkdiv = (DIV_ROUND_CLOSEST(4 * port->uartclk, 16 * baud) - 4) << 6;
409
410 spin_lock_irqsave(&port->lock, flags);
411
412 efm32_uart_write32(efm_port,
413 UARTn_CMD_TXDIS | UARTn_CMD_RXDIS, UARTn_CMD);
414
415 port->read_status_mask = UARTn_RXDATAX_RXDATA__MASK;
416 if (new->c_iflag & INPCK)
417 port->read_status_mask |=
418 UARTn_RXDATAX_FERR | UARTn_RXDATAX_PERR;
419 if (new->c_iflag & (BRKINT | PARMRK))
420 port->read_status_mask |= SW_UARTn_RXDATAX_BERR;
421
422 port->ignore_status_mask = 0;
423 if (new->c_iflag & IGNPAR)
424 port->ignore_status_mask |=
425 UARTn_RXDATAX_FERR | UARTn_RXDATAX_PERR;
426 if (new->c_iflag & IGNBRK)
427 port->ignore_status_mask |= SW_UARTn_RXDATAX_BERR;
428
429 uart_update_timeout(port, new->c_cflag, baud);
430
431 efm32_uart_write32(efm_port, UARTn_CTRL_TXBIL, UARTn_CTRL);
432 efm32_uart_write32(efm_port, frame, UARTn_FRAME);
433 efm32_uart_write32(efm_port, clkdiv, UARTn_CLKDIV);
434
435 efm32_uart_write32(efm_port, UARTn_CMD_TXEN | UARTn_CMD_RXEN,
436 UARTn_CMD);
437
438 spin_unlock_irqrestore(&port->lock, flags);
439}
440
441static const char *efm32_uart_type(struct uart_port *port)
442{
443 return port->type == PORT_EFMUART ? "efm32-uart" : NULL;
444}
445
446static void efm32_uart_release_port(struct uart_port *port)
447{
448 struct efm32_uart_port *efm_port = to_efm_port(port);
449
450 clk_unprepare(efm_port->clk);
451 clk_put(efm_port->clk);
452 iounmap(port->membase);
453}
454
455static int efm32_uart_request_port(struct uart_port *port)
456{
457 struct efm32_uart_port *efm_port = to_efm_port(port);
458 int ret;
459
460 port->membase = ioremap(port->mapbase, 60);
461 if (!efm_port->port.membase) {
462 ret = -ENOMEM;
463 efm_debug(efm_port, "failed to remap\n");
464 goto err_ioremap;
465 }
466
467 efm_port->clk = clk_get(port->dev, NULL);
468 if (IS_ERR(efm_port->clk)) {
469 ret = PTR_ERR(efm_port->clk);
470 efm_debug(efm_port, "failed to get clock\n");
471 goto err_clk_get;
472 }
473
474 ret = clk_prepare(efm_port->clk);
475 if (ret) {
476 clk_put(efm_port->clk);
477err_clk_get:
478
479 iounmap(port->membase);
480err_ioremap:
481 return ret;
482 }
483 return 0;
484}
485
486static void efm32_uart_config_port(struct uart_port *port, int type)
487{
488 if (type & UART_CONFIG_TYPE &&
489 !efm32_uart_request_port(port))
490 port->type = PORT_EFMUART;
491}
492
493static int efm32_uart_verify_port(struct uart_port *port,
494 struct serial_struct *serinfo)
495{
496 int ret = 0;
497
498 if (serinfo->type != PORT_UNKNOWN && serinfo->type != PORT_EFMUART)
499 ret = -EINVAL;
500
501 return ret;
502}
503
504static struct uart_ops efm32_uart_pops = {
505 .tx_empty = efm32_uart_tx_empty,
506 .set_mctrl = efm32_uart_set_mctrl,
507 .get_mctrl = efm32_uart_get_mctrl,
508 .stop_tx = efm32_uart_stop_tx,
509 .start_tx = efm32_uart_start_tx,
510 .stop_rx = efm32_uart_stop_rx,
511 .enable_ms = efm32_uart_enable_ms,
512 .break_ctl = efm32_uart_break_ctl,
513 .startup = efm32_uart_startup,
514 .shutdown = efm32_uart_shutdown,
515 .set_termios = efm32_uart_set_termios,
516 .type = efm32_uart_type,
517 .release_port = efm32_uart_release_port,
518 .request_port = efm32_uart_request_port,
519 .config_port = efm32_uart_config_port,
520 .verify_port = efm32_uart_verify_port,
521};
522
523static struct efm32_uart_port *efm32_uart_ports[5];
524
525#ifdef CONFIG_SERIAL_EFM32_UART_CONSOLE
526static void efm32_uart_console_putchar(struct uart_port *port, int ch)
527{
528 struct efm32_uart_port *efm_port = to_efm_port(port);
529 unsigned int timeout = 0x400;
530 u32 status;
531
532 while (1) {
533 status = efm32_uart_read32(efm_port, UARTn_STATUS);
534
535 if (status & UARTn_STATUS_TXBL)
536 break;
537 if (!timeout--)
538 return;
539 }
540 efm32_uart_write32(efm_port, ch, UARTn_TXDATA);
541}
542
543static void efm32_uart_console_write(struct console *co, const char *s,
544 unsigned int count)
545{
546 struct efm32_uart_port *efm_port = efm32_uart_ports[co->index];
547 u32 status = efm32_uart_read32(efm_port, UARTn_STATUS);
548 unsigned int timeout = 0x400;
549
550 if (!(status & UARTn_STATUS_TXENS))
551 efm32_uart_write32(efm_port, UARTn_CMD_TXEN, UARTn_CMD);
552
553 uart_console_write(&efm_port->port, s, count,
554 efm32_uart_console_putchar);
555
556 /* Wait for the transmitter to become empty */
557 while (1) {
558 u32 status = efm32_uart_read32(efm_port, UARTn_STATUS);
559 if (status & UARTn_STATUS_TXC)
560 break;
561 if (!timeout--)
562 break;
563 }
564
565 if (!(status & UARTn_STATUS_TXENS))
566 efm32_uart_write32(efm_port, UARTn_CMD_TXDIS, UARTn_CMD);
567}
568
569static void efm32_uart_console_get_options(struct efm32_uart_port *efm_port,
570 int *baud, int *parity, int *bits)
571{
572 u32 ctrl = efm32_uart_read32(efm_port, UARTn_CTRL);
573 u32 route, clkdiv, frame;
574
575 if (ctrl & UARTn_CTRL_SYNC)
576 /* not operating in async mode */
577 return;
578
579 route = efm32_uart_read32(efm_port, UARTn_ROUTE);
580 if (!(route & UARTn_ROUTE_TXPEN))
581 /* tx pin not routed */
582 return;
583
584 clkdiv = efm32_uart_read32(efm_port, UARTn_CLKDIV);
585
586 *baud = DIV_ROUND_CLOSEST(4 * efm_port->port.uartclk,
587 16 * (4 + (clkdiv >> 6)));
588
589 frame = efm32_uart_read32(efm_port, UARTn_FRAME);
590 if (frame & UARTn_FRAME_PARITY_ODD)
591 *parity = 'o';
592 else if (frame & UARTn_FRAME_PARITY_EVEN)
593 *parity = 'e';
594 else
595 *parity = 'n';
596
597 *bits = (frame & UARTn_FRAME_DATABITS__MASK) -
598 UARTn_FRAME_DATABITS(4) + 4;
599
600 efm_debug(efm_port, "get_opts: options=%d%c%d\n",
601 *baud, *parity, *bits);
602}
603
604static int efm32_uart_console_setup(struct console *co, char *options)
605{
606 struct efm32_uart_port *efm_port;
607 int baud = 115200;
608 int bits = 8;
609 int parity = 'n';
610 int flow = 'n';
611 int ret;
612
613 if (co->index < 0 || co->index >= ARRAY_SIZE(efm32_uart_ports)) {
614 unsigned i;
615 for (i = 0; i < ARRAY_SIZE(efm32_uart_ports); ++i) {
616 if (efm32_uart_ports[i]) {
617 pr_warn("efm32-console: fall back to console index %u (from %hhi)\n",
618 i, co->index);
619 co->index = i;
620 break;
621 }
622 }
623 }
624
625 efm_port = efm32_uart_ports[co->index];
626 if (!efm_port) {
627 pr_warn("efm32-console: No port at %d\n", co->index);
628 return -ENODEV;
629 }
630
631 ret = clk_prepare(efm_port->clk);
632 if (ret) {
633 dev_warn(efm_port->port.dev,
634 "console: clk_prepare failed: %d\n", ret);
635 return ret;
636 }
637
638 efm_port->port.uartclk = clk_get_rate(efm_port->clk);
639
640 if (options)
641 uart_parse_options(options, &baud, &parity, &bits, &flow);
642 else
643 efm32_uart_console_get_options(efm_port,
644 &baud, &parity, &bits);
645
646 return uart_set_options(&efm_port->port, co, baud, parity, bits, flow);
647}
648
649static struct uart_driver efm32_uart_reg;
650
651static struct console efm32_uart_console = {
652 .name = DEV_NAME,
653 .write = efm32_uart_console_write,
654 .device = uart_console_device,
655 .setup = efm32_uart_console_setup,
656 .flags = CON_PRINTBUFFER,
657 .index = -1,
658 .data = &efm32_uart_reg,
659};
660
661#else
662#define efm32_uart_console (*(struct console *)NULL)
663#endif /* ifdef CONFIG_SERIAL_EFM32_UART_CONSOLE / else */
664
665static struct uart_driver efm32_uart_reg = {
666 .owner = THIS_MODULE,
667 .driver_name = DRIVER_NAME,
668 .dev_name = DEV_NAME,
669 .nr = ARRAY_SIZE(efm32_uart_ports),
670 .cons = &efm32_uart_console,
671};
672
673static int efm32_uart_probe_dt(struct platform_device *pdev,
674 struct efm32_uart_port *efm_port)
675{
676 struct device_node *np = pdev->dev.of_node;
677 int ret;
678
679 if (!np)
680 return 1;
681
682 ret = of_alias_get_id(np, "serial");
683 if (ret < 0) {
684 dev_err(&pdev->dev, "failed to get alias id: %d\n", ret);
685 return ret;
686 } else {
687 efm_port->port.line = ret;
688 return 0;
689 }
690
691}
692
693static int __devinit efm32_uart_probe(struct platform_device *pdev)
694{
695 struct efm32_uart_port *efm_port;
696 struct resource *res;
697 int ret;
698
699 efm_port = kzalloc(sizeof(*efm_port), GFP_KERNEL);
700 if (!efm_port) {
701 dev_dbg(&pdev->dev, "failed to allocate private data\n");
702 return -ENOMEM;
703 }
704
705 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
706 if (!res) {
707 ret = -ENODEV;
708 dev_dbg(&pdev->dev, "failed to determine base address\n");
709 goto err_get_base;
710 }
711
712 if (resource_size(res) < 60) {
713 ret = -EINVAL;
714 dev_dbg(&pdev->dev, "memory resource too small\n");
715 goto err_too_small;
716 }
717
718 ret = platform_get_irq(pdev, 0);
719 if (ret <= 0) {
720 dev_dbg(&pdev->dev, "failed to get rx irq\n");
721 goto err_get_rxirq;
722 }
723
724 efm_port->port.irq = ret;
725
726 ret = platform_get_irq(pdev, 1);
727 if (ret <= 0)
728 ret = efm_port->port.irq + 1;
729
730 efm_port->txirq = ret;
731
732 efm_port->port.dev = &pdev->dev;
733 efm_port->port.mapbase = res->start;
734 efm_port->port.type = PORT_EFMUART;
735 efm_port->port.iotype = UPIO_MEM32;
736 efm_port->port.fifosize = 2;
737 efm_port->port.ops = &efm32_uart_pops;
738 efm_port->port.flags = UPF_BOOT_AUTOCONF;
739
740 ret = efm32_uart_probe_dt(pdev, efm_port);
741 if (ret > 0)
742 /* not created by device tree */
743 efm_port->port.line = pdev->id;
744
745 if (efm_port->port.line >= 0 &&
746 efm_port->port.line < ARRAY_SIZE(efm32_uart_ports))
747 efm32_uart_ports[efm_port->port.line] = efm_port;
748
749 ret = uart_add_one_port(&efm32_uart_reg, &efm_port->port);
750 if (ret) {
751 dev_dbg(&pdev->dev, "failed to add port: %d\n", ret);
752
753 if (pdev->id >= 0 && pdev->id < ARRAY_SIZE(efm32_uart_ports))
754 efm32_uart_ports[pdev->id] = NULL;
755err_get_rxirq:
756err_too_small:
757err_get_base:
758 kfree(efm_port);
759 } else {
760 platform_set_drvdata(pdev, efm_port);
761 dev_dbg(&pdev->dev, "\\o/\n");
762 }
763
764 return ret;
765}
766
767static int __devexit efm32_uart_remove(struct platform_device *pdev)
768{
769 struct efm32_uart_port *efm_port = platform_get_drvdata(pdev);
770
771 platform_set_drvdata(pdev, NULL);
772
773 uart_remove_one_port(&efm32_uart_reg, &efm_port->port);
774
775 if (pdev->id >= 0 && pdev->id < ARRAY_SIZE(efm32_uart_ports))
776 efm32_uart_ports[pdev->id] = NULL;
777
778 kfree(efm_port);
779
780 return 0;
781}
782
783static struct of_device_id efm32_uart_dt_ids[] = {
784 {
785 .compatible = "efm32,uart",
786 }, {
787 /* sentinel */
788 }
789};
790MODULE_DEVICE_TABLE(of, efm32_uart_dt_ids);
791
792static struct platform_driver efm32_uart_driver = {
793 .probe = efm32_uart_probe,
794 .remove = __devexit_p(efm32_uart_remove),
795
796 .driver = {
797 .name = DRIVER_NAME,
798 .owner = THIS_MODULE,
799 .of_match_table = efm32_uart_dt_ids,
800 },
801};
802
803static int __init efm32_uart_init(void)
804{
805 int ret;
806
807 ret = uart_register_driver(&efm32_uart_reg);
808 if (ret)
809 return ret;
810
811 ret = platform_driver_register(&efm32_uart_driver);
812 if (ret)
813 uart_unregister_driver(&efm32_uart_reg);
814
815 pr_info("EFM32 UART/USART driver\n");
816
817 return ret;
818}
819module_init(efm32_uart_init);
820
821static void __exit efm32_uart_exit(void)
822{
823 platform_driver_unregister(&efm32_uart_driver);
824 uart_unregister_driver(&efm32_uart_reg);
825}
826
827MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
828MODULE_DESCRIPTION("EFM32 UART/USART driver");
829MODULE_LICENSE("GPL v2");
830MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/tty/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c
index 7e925e20cbaa..144cd3987d4c 100644
--- a/drivers/tty/serial/ifx6x60.c
+++ b/drivers/tty/serial/ifx6x60.c
@@ -1375,12 +1375,9 @@ static int __init ifx_spi_init(void)
1375 return -ENOMEM; 1375 return -ENOMEM;
1376 } 1376 }
1377 1377
1378 tty_drv->magic = TTY_DRIVER_MAGIC;
1379 tty_drv->owner = THIS_MODULE;
1380 tty_drv->driver_name = DRVNAME; 1378 tty_drv->driver_name = DRVNAME;
1381 tty_drv->name = TTYNAME; 1379 tty_drv->name = TTYNAME;
1382 tty_drv->minor_start = IFX_SPI_TTY_ID; 1380 tty_drv->minor_start = IFX_SPI_TTY_ID;
1383 tty_drv->num = 1;
1384 tty_drv->type = TTY_DRIVER_TYPE_SERIAL; 1381 tty_drv->type = TTY_DRIVER_TYPE_SERIAL;
1385 tty_drv->subtype = SERIAL_TYPE_NORMAL; 1382 tty_drv->subtype = SERIAL_TYPE_NORMAL;
1386 tty_drv->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; 1383 tty_drv->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
diff --git a/drivers/tty/serial/ioc4_serial.c b/drivers/tty/serial/ioc4_serial.c
index 6b36c1554d7e..e16894fb2ca3 100644
--- a/drivers/tty/serial/ioc4_serial.c
+++ b/drivers/tty/serial/ioc4_serial.c
@@ -16,7 +16,6 @@
16#include <linux/tty.h> 16#include <linux/tty.h>
17#include <linux/tty_flip.h> 17#include <linux/tty_flip.h>
18#include <linux/serial.h> 18#include <linux/serial.h>
19#include <linux/serialP.h>
20#include <linux/circ_buf.h> 19#include <linux/circ_buf.h>
21#include <linux/serial_reg.h> 20#include <linux/serial_reg.h>
22#include <linux/module.h> 21#include <linux/module.h>
@@ -975,7 +974,7 @@ intr_connect(struct ioc4_soft *soft, int type,
975 BUG_ON(!((type == IOC4_SIO_INTR_TYPE) 974 BUG_ON(!((type == IOC4_SIO_INTR_TYPE)
976 || (type == IOC4_OTHER_INTR_TYPE))); 975 || (type == IOC4_OTHER_INTR_TYPE)));
977 976
978 i = atomic_inc(&soft-> is_intr_type[type].is_num_intrs) - 1; 977 i = atomic_inc_return(&soft-> is_intr_type[type].is_num_intrs) - 1;
979 BUG_ON(!(i < MAX_IOC4_INTR_ENTS || (printk("i %d\n", i), 0))); 978 BUG_ON(!(i < MAX_IOC4_INTR_ENTS || (printk("i %d\n", i), 0)));
980 979
981 /* Save off the lower level interrupt handler */ 980 /* Save off the lower level interrupt handler */
diff --git a/drivers/tty/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c
index 94a6792bf97b..a0703624d5e5 100644
--- a/drivers/tty/serial/m32r_sio.c
+++ b/drivers/tty/serial/m32r_sio.c
@@ -38,7 +38,6 @@
38#include <linux/console.h> 38#include <linux/console.h>
39#include <linux/sysrq.h> 39#include <linux/sysrq.h>
40#include <linux/serial.h> 40#include <linux/serial.h>
41#include <linux/serialP.h>
42#include <linux/delay.h> 41#include <linux/delay.h>
43 42
44#include <asm/m32r.h> 43#include <asm/m32r.h>
@@ -70,13 +69,6 @@
70 69
71#define PASS_LIMIT 256 70#define PASS_LIMIT 256
72 71
73/*
74 * We default to IRQ0 for the "no irq" hack. Some
75 * machine types want others as well - they're free
76 * to redefine this in their header file.
77 */
78#define is_real_interrupt(irq) ((irq) != 0)
79
80#define BASE_BAUD 115200 72#define BASE_BAUD 115200
81 73
82/* Standard COM flags */ 74/* Standard COM flags */
@@ -640,7 +632,7 @@ static int m32r_sio_startup(struct uart_port *port)
640 * hardware interrupt, we use a timer-based system. The original 632 * hardware interrupt, we use a timer-based system. The original
641 * driver used to do this with IRQ0. 633 * driver used to do this with IRQ0.
642 */ 634 */
643 if (!is_real_interrupt(up->port.irq)) { 635 if (!up->port.irq) {
644 unsigned int timeout = up->port.timeout; 636 unsigned int timeout = up->port.timeout;
645 637
646 timeout = timeout > 6 ? (timeout / 2 - 2) : 1; 638 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
@@ -687,7 +679,7 @@ static void m32r_sio_shutdown(struct uart_port *port)
687 679
688 sio_init(); 680 sio_init();
689 681
690 if (!is_real_interrupt(up->port.irq)) 682 if (!up->port.irq)
691 del_timer_sync(&up->timer); 683 del_timer_sync(&up->timer);
692 else 684 else
693 serial_unlink_irq_chain(up); 685 serial_unlink_irq_chain(up);
diff --git a/drivers/tty/serial/m32r_sio.h b/drivers/tty/serial/m32r_sio.h
index e9b7e11793b1..8129824496c6 100644
--- a/drivers/tty/serial/m32r_sio.h
+++ b/drivers/tty/serial/m32r_sio.h
@@ -15,6 +15,7 @@
15 * (at your option) any later version. 15 * (at your option) any later version.
16 */ 16 */
17 17
18#include <linux/pci.h>
18 19
19struct m32r_sio_probe { 20struct m32r_sio_probe {
20 struct module *owner; 21 struct module *owner;
diff --git a/drivers/tty/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c
index 1093a88a1fe3..bedac0d4c9ce 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -262,8 +262,9 @@ static unsigned int mpc5200b_psc_set_baudrate(struct uart_port *port,
262 port->uartclk / 4); 262 port->uartclk / 4);
263 divisor = (port->uartclk + 2 * baud) / (4 * baud); 263 divisor = (port->uartclk + 2 * baud) / (4 * baud);
264 264
265 /* select the proper prescaler and set the divisor */ 265 /* select the proper prescaler and set the divisor
266 if (divisor > 0xffff) { 266 * prefer high prescaler for more tolerance on low baudrates */
267 if (divisor > 0xffff || baud <= 115200) {
267 divisor = (divisor + 4) / 8; 268 divisor = (divisor + 4) / 8;
268 prescaler = 0xdd00; /* /32 */ 269 prescaler = 0xdd00; /* /32 */
269 } else 270 } else
@@ -507,7 +508,7 @@ static int __init mpc512x_psc_fifoc_init(void)
507 508
508 psc_fifoc_irq = irq_of_parse_and_map(np, 0); 509 psc_fifoc_irq = irq_of_parse_and_map(np, 0);
509 of_node_put(np); 510 of_node_put(np);
510 if (psc_fifoc_irq == NO_IRQ) { 511 if (psc_fifoc_irq == 0) {
511 pr_err("%s: Can't get FIFOC irq\n", __func__); 512 pr_err("%s: Can't get FIFOC irq\n", __func__);
512 iounmap(psc_fifoc); 513 iounmap(psc_fifoc);
513 return -ENODEV; 514 return -ENODEV;
@@ -1354,7 +1355,7 @@ static int __devinit mpc52xx_uart_of_probe(struct platform_device *op)
1354 } 1355 }
1355 1356
1356 psc_ops->get_irq(port, op->dev.of_node); 1357 psc_ops->get_irq(port, op->dev.of_node);
1357 if (port->irq == NO_IRQ) { 1358 if (port->irq == 0) {
1358 dev_dbg(&op->dev, "Could not get irq\n"); 1359 dev_dbg(&op->dev, "Could not get irq\n");
1359 return -EINVAL; 1360 return -EINVAL;
1360 } 1361 }
diff --git a/drivers/tty/serial/msm_smd_tty.c b/drivers/tty/serial/msm_smd_tty.c
index 4f41dcdcb771..b25e6ee71443 100644
--- a/drivers/tty/serial/msm_smd_tty.c
+++ b/drivers/tty/serial/msm_smd_tty.c
@@ -203,7 +203,6 @@ static int __init smd_tty_init(void)
203 if (smd_tty_driver == 0) 203 if (smd_tty_driver == 0)
204 return -ENOMEM; 204 return -ENOMEM;
205 205
206 smd_tty_driver->owner = THIS_MODULE;
207 smd_tty_driver->driver_name = "smd_tty_driver"; 206 smd_tty_driver->driver_name = "smd_tty_driver";
208 smd_tty_driver->name = "smd"; 207 smd_tty_driver->name = "smd";
209 smd_tty_driver->major = 0; 208 smd_tty_driver->major = 0;
diff --git a/drivers/tty/serial/mux.c b/drivers/tty/serial/mux.c
index 06f6aefd5ba6..7ea8a263fd9e 100644
--- a/drivers/tty/serial/mux.c
+++ b/drivers/tty/serial/mux.c
@@ -17,7 +17,6 @@
17*/ 17*/
18 18
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/tty.h>
21#include <linux/ioport.h> 20#include <linux/ioport.h>
22#include <linux/init.h> 21#include <linux/init.h>
23#include <linux/serial.h> 22#include <linux/serial.h>
@@ -499,7 +498,7 @@ static int __init mux_probe(struct parisc_device *dev)
499 port->membase = ioremap_nocache(port->mapbase, MUX_LINE_OFFSET); 498 port->membase = ioremap_nocache(port->mapbase, MUX_LINE_OFFSET);
500 port->iotype = UPIO_MEM; 499 port->iotype = UPIO_MEM;
501 port->type = PORT_MUX; 500 port->type = PORT_MUX;
502 port->irq = NO_IRQ; 501 port->irq = 0;
503 port->uartclk = 0; 502 port->uartclk = 0;
504 port->fifosize = MUX_FIFO_SIZE; 503 port->fifosize = MUX_FIFO_SIZE;
505 port->ops = &mux_pops; 504 port->ops = &mux_pops;
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index f80904145fd4..0121486ac4fa 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -159,7 +159,7 @@ static void serial_omap_stop_tx(struct uart_port *port)
159 serial_out(up, UART_IER, up->ier); 159 serial_out(up, UART_IER, up->ier);
160 } 160 }
161 161
162 if (!up->use_dma && pdata->set_forceidle) 162 if (!up->use_dma && pdata && pdata->set_forceidle)
163 pdata->set_forceidle(up->pdev); 163 pdata->set_forceidle(up->pdev);
164 164
165 pm_runtime_mark_last_busy(&up->pdev->dev); 165 pm_runtime_mark_last_busy(&up->pdev->dev);
@@ -298,7 +298,7 @@ static void serial_omap_start_tx(struct uart_port *port)
298 if (!up->use_dma) { 298 if (!up->use_dma) {
299 pm_runtime_get_sync(&up->pdev->dev); 299 pm_runtime_get_sync(&up->pdev->dev);
300 serial_omap_enable_ier_thri(up); 300 serial_omap_enable_ier_thri(up);
301 if (pdata->set_noidle) 301 if (pdata && pdata->set_noidle)
302 pdata->set_noidle(up->pdev); 302 pdata->set_noidle(up->pdev);
303 pm_runtime_mark_last_busy(&up->pdev->dev); 303 pm_runtime_mark_last_busy(&up->pdev->dev);
304 pm_runtime_put_autosuspend(&up->pdev->dev); 304 pm_runtime_put_autosuspend(&up->pdev->dev);
@@ -1613,7 +1613,7 @@ static int serial_omap_runtime_resume(struct device *dev)
1613 struct uart_omap_port *up = dev_get_drvdata(dev); 1613 struct uart_omap_port *up = dev_get_drvdata(dev);
1614 struct omap_uart_port_info *pdata = dev->platform_data; 1614 struct omap_uart_port_info *pdata = dev->platform_data;
1615 1615
1616 if (up) { 1616 if (up && pdata) {
1617 if (pdata->get_context_loss_count) { 1617 if (pdata->get_context_loss_count) {
1618 u32 loss_cnt = pdata->get_context_loss_count(dev); 1618 u32 loss_cnt = pdata->get_context_loss_count(dev);
1619 1619
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 17ae65762d1a..332f2eb8abbc 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -29,6 +29,7 @@
29#include <linux/nmi.h> 29#include <linux/nmi.h>
30#include <linux/delay.h> 30#include <linux/delay.h>
31 31
32#include <linux/debugfs.h>
32#include <linux/dmaengine.h> 33#include <linux/dmaengine.h>
33#include <linux/pch_dma.h> 34#include <linux/pch_dma.h>
34 35
@@ -144,6 +145,8 @@ enum {
144#define PCH_UART_DLL 0x00 145#define PCH_UART_DLL 0x00
145#define PCH_UART_DLM 0x01 146#define PCH_UART_DLM 0x01
146 147
148#define PCH_UART_BRCSR 0x0E
149
147#define PCH_UART_IID_RLS (PCH_UART_IIR_REI) 150#define PCH_UART_IID_RLS (PCH_UART_IIR_REI)
148#define PCH_UART_IID_RDR (PCH_UART_IIR_RRI) 151#define PCH_UART_IID_RDR (PCH_UART_IIR_RRI)
149#define PCH_UART_IID_RDR_TO (PCH_UART_IIR_RRI | PCH_UART_IIR_TOI) 152#define PCH_UART_IID_RDR_TO (PCH_UART_IIR_RRI | PCH_UART_IIR_TOI)
@@ -203,7 +206,10 @@ enum {
203 206
204#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 207#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
205 208
206#define DEFAULT_BAUD_RATE 1843200 /* 1.8432MHz */ 209#define DEFAULT_UARTCLK 1843200 /* 1.8432 MHz */
210#define CMITC_UARTCLK 192000000 /* 192.0000 MHz */
211#define FRI2_64_UARTCLK 64000000 /* 64.0000 MHz */
212#define FRI2_48_UARTCLK 48000000 /* 48.0000 MHz */
207 213
208struct pch_uart_buffer { 214struct pch_uart_buffer {
209 unsigned char *buf; 215 unsigned char *buf;
@@ -218,7 +224,7 @@ struct eg20t_port {
218 unsigned int iobase; 224 unsigned int iobase;
219 struct pci_dev *pdev; 225 struct pci_dev *pdev;
220 int fifo_size; 226 int fifo_size;
221 int base_baud; 227 int uartclk;
222 int start_tx; 228 int start_tx;
223 int start_rx; 229 int start_rx;
224 int tx_empty; 230 int tx_empty;
@@ -243,6 +249,8 @@ struct eg20t_port {
243 int tx_dma_use; 249 int tx_dma_use;
244 void *rx_buf_virt; 250 void *rx_buf_virt;
245 dma_addr_t rx_buf_dma; 251 dma_addr_t rx_buf_dma;
252
253 struct dentry *debugfs;
246}; 254};
247 255
248/** 256/**
@@ -287,26 +295,100 @@ static struct pch_uart_driver_data drv_dat[] = {
287static struct eg20t_port *pch_uart_ports[PCH_UART_NR]; 295static struct eg20t_port *pch_uart_ports[PCH_UART_NR];
288#endif 296#endif
289static unsigned int default_baud = 9600; 297static unsigned int default_baud = 9600;
298static unsigned int user_uartclk = 0;
290static const int trigger_level_256[4] = { 1, 64, 128, 224 }; 299static const int trigger_level_256[4] = { 1, 64, 128, 224 };
291static const int trigger_level_64[4] = { 1, 16, 32, 56 }; 300static const int trigger_level_64[4] = { 1, 16, 32, 56 };
292static const int trigger_level_16[4] = { 1, 4, 8, 14 }; 301static const int trigger_level_16[4] = { 1, 4, 8, 14 };
293static const int trigger_level_1[4] = { 1, 1, 1, 1 }; 302static const int trigger_level_1[4] = { 1, 1, 1, 1 };
294 303
295static void pch_uart_hal_request(struct pci_dev *pdev, int fifosize, 304#ifdef CONFIG_DEBUG_FS
296 int base_baud) 305
306#define PCH_REGS_BUFSIZE 1024
307static int pch_show_regs_open(struct inode *inode, struct file *file)
297{ 308{
298 struct eg20t_port *priv = pci_get_drvdata(pdev); 309 file->private_data = inode->i_private;
310 return 0;
311}
299 312
300 priv->trigger_level = 1; 313static ssize_t port_show_regs(struct file *file, char __user *user_buf,
301 priv->fcr = 0; 314 size_t count, loff_t *ppos)
315{
316 struct eg20t_port *priv = file->private_data;
317 char *buf;
318 u32 len = 0;
319 ssize_t ret;
320 unsigned char lcr;
321
322 buf = kzalloc(PCH_REGS_BUFSIZE, GFP_KERNEL);
323 if (!buf)
324 return 0;
325
326 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
327 "PCH EG20T port[%d] regs:\n", priv->port.line);
328
329 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
330 "=================================\n");
331 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
332 "IER: \t0x%02x\n", ioread8(priv->membase + UART_IER));
333 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
334 "IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR));
335 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
336 "LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR));
337 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
338 "MCR: \t0x%02x\n", ioread8(priv->membase + UART_MCR));
339 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
340 "LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR));
341 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
342 "MSR: \t0x%02x\n", ioread8(priv->membase + UART_MSR));
343 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
344 "BRCSR: \t0x%02x\n",
345 ioread8(priv->membase + PCH_UART_BRCSR));
346
347 lcr = ioread8(priv->membase + UART_LCR);
348 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);
349 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
350 "DLL: \t0x%02x\n", ioread8(priv->membase + UART_DLL));
351 len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
352 "DLM: \t0x%02x\n", ioread8(priv->membase + UART_DLM));
353 iowrite8(lcr, priv->membase + UART_LCR);
354
355 if (len > PCH_REGS_BUFSIZE)
356 len = PCH_REGS_BUFSIZE;
357
358 ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
359 kfree(buf);
360 return ret;
302} 361}
303 362
304static unsigned int get_msr(struct eg20t_port *priv, void __iomem *base) 363static const struct file_operations port_regs_ops = {
364 .owner = THIS_MODULE,
365 .open = pch_show_regs_open,
366 .read = port_show_regs,
367 .llseek = default_llseek,
368};
369#endif /* CONFIG_DEBUG_FS */
370
371/* Return UART clock, checking for board specific clocks. */
372static int pch_uart_get_uartclk(void)
305{ 373{
306 unsigned int msr = ioread8(base + UART_MSR); 374 const char *cmp;
307 priv->dmsr |= msr & PCH_UART_MSR_DELTA; 375
376 if (user_uartclk)
377 return user_uartclk;
378
379 cmp = dmi_get_system_info(DMI_BOARD_NAME);
380 if (cmp && strstr(cmp, "CM-iTC"))
381 return CMITC_UARTCLK;
382
383 cmp = dmi_get_system_info(DMI_BIOS_VERSION);
384 if (cmp && strnstr(cmp, "FRI2", 4))
385 return FRI2_64_UARTCLK;
386
387 cmp = dmi_get_system_info(DMI_PRODUCT_NAME);
388 if (cmp && strstr(cmp, "Fish River Island II"))
389 return FRI2_48_UARTCLK;
308 390
309 return msr; 391 return DEFAULT_UARTCLK;
310} 392}
311 393
312static void pch_uart_hal_enable_interrupt(struct eg20t_port *priv, 394static void pch_uart_hal_enable_interrupt(struct eg20t_port *priv,
@@ -332,7 +414,7 @@ static int pch_uart_hal_set_line(struct eg20t_port *priv, int baud,
332 unsigned int dll, dlm, lcr; 414 unsigned int dll, dlm, lcr;
333 int div; 415 int div;
334 416
335 div = DIV_ROUND_CLOSEST(priv->base_baud / 16, baud); 417 div = DIV_ROUND_CLOSEST(priv->uartclk / 16, baud);
336 if (div < 0 || USHRT_MAX <= div) { 418 if (div < 0 || USHRT_MAX <= div) {
337 dev_err(priv->port.dev, "Invalid Baud(div=0x%x)\n", div); 419 dev_err(priv->port.dev, "Invalid Baud(div=0x%x)\n", div);
338 return -EINVAL; 420 return -EINVAL;
@@ -442,8 +524,9 @@ static int pch_uart_hal_set_fifo(struct eg20t_port *priv,
442 524
443static u8 pch_uart_hal_get_modem(struct eg20t_port *priv) 525static u8 pch_uart_hal_get_modem(struct eg20t_port *priv)
444{ 526{
445 priv->dmsr = 0; 527 unsigned int msr = ioread8(priv->membase + UART_MSR);
446 return get_msr(priv, priv->membase); 528 priv->dmsr = msr & PCH_UART_MSR_DELTA;
529 return (u8)msr;
447} 530}
448 531
449static void pch_uart_hal_write(struct eg20t_port *priv, 532static void pch_uart_hal_write(struct eg20t_port *priv,
@@ -524,7 +607,7 @@ static int push_rx(struct eg20t_port *priv, const unsigned char *buf,
524 607
525static int pop_tx_x(struct eg20t_port *priv, unsigned char *buf) 608static int pop_tx_x(struct eg20t_port *priv, unsigned char *buf)
526{ 609{
527 int ret; 610 int ret = 0;
528 struct uart_port *port = &priv->port; 611 struct uart_port *port = &priv->port;
529 612
530 if (port->x_char) { 613 if (port->x_char) {
@@ -533,8 +616,6 @@ static int pop_tx_x(struct eg20t_port *priv, unsigned char *buf)
533 buf[0] = port->x_char; 616 buf[0] = port->x_char;
534 port->x_char = 0; 617 port->x_char = 0;
535 ret = 1; 618 ret = 1;
536 } else {
537 ret = 0;
538 } 619 }
539 620
540 return ret; 621 return ret;
@@ -1032,14 +1113,12 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id)
1032static unsigned int pch_uart_tx_empty(struct uart_port *port) 1113static unsigned int pch_uart_tx_empty(struct uart_port *port)
1033{ 1114{
1034 struct eg20t_port *priv; 1115 struct eg20t_port *priv;
1035 int ret; 1116
1036 priv = container_of(port, struct eg20t_port, port); 1117 priv = container_of(port, struct eg20t_port, port);
1037 if (priv->tx_empty) 1118 if (priv->tx_empty)
1038 ret = TIOCSER_TEMT; 1119 return TIOCSER_TEMT;
1039 else 1120 else
1040 ret = 0; 1121 return 0;
1041
1042 return ret;
1043} 1122}
1044 1123
1045/* Returns the current state of modem control inputs. */ 1124/* Returns the current state of modem control inputs. */
@@ -1153,9 +1232,9 @@ static int pch_uart_startup(struct uart_port *port)
1153 priv->tx_empty = 1; 1232 priv->tx_empty = 1;
1154 1233
1155 if (port->uartclk) 1234 if (port->uartclk)
1156 priv->base_baud = port->uartclk; 1235 priv->uartclk = port->uartclk;
1157 else 1236 else
1158 port->uartclk = priv->base_baud; 1237 port->uartclk = priv->uartclk;
1159 1238
1160 pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT); 1239 pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT);
1161 ret = pch_uart_hal_set_line(priv, default_baud, 1240 ret = pch_uart_hal_set_line(priv, default_baud,
@@ -1273,9 +1352,8 @@ static void pch_uart_set_termios(struct uart_port *port,
1273 else 1352 else
1274 parity = PCH_UART_HAL_PARITY_EVEN; 1353 parity = PCH_UART_HAL_PARITY_EVEN;
1275 1354
1276 } else { 1355 } else
1277 parity = PCH_UART_HAL_PARITY_NONE; 1356 parity = PCH_UART_HAL_PARITY_NONE;
1278 }
1279 1357
1280 /* Only UART0 has auto hardware flow function */ 1358 /* Only UART0 has auto hardware flow function */
1281 if ((termios->c_cflag & CRTSCTS) && (priv->fifo_size == 256)) 1359 if ((termios->c_cflag & CRTSCTS) && (priv->fifo_size == 256))
@@ -1447,7 +1525,6 @@ static void
1447pch_console_write(struct console *co, const char *s, unsigned int count) 1525pch_console_write(struct console *co, const char *s, unsigned int count)
1448{ 1526{
1449 struct eg20t_port *priv; 1527 struct eg20t_port *priv;
1450
1451 unsigned long flags; 1528 unsigned long flags;
1452 u8 ier; 1529 u8 ier;
1453 int locked = 1; 1530 int locked = 1;
@@ -1489,7 +1566,7 @@ pch_console_write(struct console *co, const char *s, unsigned int count)
1489static int __init pch_console_setup(struct console *co, char *options) 1566static int __init pch_console_setup(struct console *co, char *options)
1490{ 1567{
1491 struct uart_port *port; 1568 struct uart_port *port;
1492 int baud = 9600; 1569 int baud = default_baud;
1493 int bits = 8; 1570 int bits = 8;
1494 int parity = 'n'; 1571 int parity = 'n';
1495 int flow = 'n'; 1572 int flow = 'n';
@@ -1506,8 +1583,7 @@ static int __init pch_console_setup(struct console *co, char *options)
1506 if (!port || (!port->iobase && !port->membase)) 1583 if (!port || (!port->iobase && !port->membase))
1507 return -ENODEV; 1584 return -ENODEV;
1508 1585
1509 /* setup uartclock */ 1586 port->uartclk = pch_uart_get_uartclk();
1510 port->uartclk = DEFAULT_BAUD_RATE;
1511 1587
1512 if (options) 1588 if (options)
1513 uart_parse_options(options, &baud, &parity, &bits, &flow); 1589 uart_parse_options(options, &baud, &parity, &bits, &flow);
@@ -1550,10 +1626,10 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1550 unsigned int iobase; 1626 unsigned int iobase;
1551 unsigned int mapbase; 1627 unsigned int mapbase;
1552 unsigned char *rxbuf; 1628 unsigned char *rxbuf;
1553 int fifosize, base_baud; 1629 int fifosize;
1554 int port_type; 1630 int port_type;
1555 struct pch_uart_driver_data *board; 1631 struct pch_uart_driver_data *board;
1556 const char *board_name; 1632 char name[32]; /* for debugfs file name */
1557 1633
1558 board = &drv_dat[id->driver_data]; 1634 board = &drv_dat[id->driver_data];
1559 port_type = board->port_type; 1635 port_type = board->port_type;
@@ -1566,13 +1642,6 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1566 if (!rxbuf) 1642 if (!rxbuf)
1567 goto init_port_free_txbuf; 1643 goto init_port_free_txbuf;
1568 1644
1569 base_baud = DEFAULT_BAUD_RATE;
1570
1571 /* quirk for CM-iTC board */
1572 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1573 if (board_name && strstr(board_name, "CM-iTC"))
1574 base_baud = 192000000; /* 192.0MHz */
1575
1576 switch (port_type) { 1645 switch (port_type) {
1577 case PORT_UNKNOWN: 1646 case PORT_UNKNOWN:
1578 fifosize = 256; /* EG20T/ML7213: UART0 */ 1647 fifosize = 256; /* EG20T/ML7213: UART0 */
@@ -1597,7 +1666,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1597 priv->rxbuf.size = PAGE_SIZE; 1666 priv->rxbuf.size = PAGE_SIZE;
1598 1667
1599 priv->fifo_size = fifosize; 1668 priv->fifo_size = fifosize;
1600 priv->base_baud = base_baud; 1669 priv->uartclk = pch_uart_get_uartclk();
1601 priv->port_type = PORT_MAX_8250 + port_type + 1; 1670 priv->port_type = PORT_MAX_8250 + port_type + 1;
1602 priv->port.dev = &pdev->dev; 1671 priv->port.dev = &pdev->dev;
1603 priv->port.iobase = iobase; 1672 priv->port.iobase = iobase;
@@ -1614,7 +1683,8 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1614 spin_lock_init(&priv->port.lock); 1683 spin_lock_init(&priv->port.lock);
1615 1684
1616 pci_set_drvdata(pdev, priv); 1685 pci_set_drvdata(pdev, priv);
1617 pch_uart_hal_request(pdev, fifosize, base_baud); 1686 priv->trigger_level = 1;
1687 priv->fcr = 0;
1618 1688
1619#ifdef CONFIG_SERIAL_PCH_UART_CONSOLE 1689#ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
1620 pch_uart_ports[board->line_no] = priv; 1690 pch_uart_ports[board->line_no] = priv;
@@ -1623,6 +1693,12 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1623 if (ret < 0) 1693 if (ret < 0)
1624 goto init_port_hal_free; 1694 goto init_port_hal_free;
1625 1695
1696#ifdef CONFIG_DEBUG_FS
1697 snprintf(name, sizeof(name), "uart%d_regs", board->line_no);
1698 priv->debugfs = debugfs_create_file(name, S_IFREG | S_IRUGO,
1699 NULL, priv, &port_regs_ops);
1700#endif
1701
1626 return priv; 1702 return priv;
1627 1703
1628init_port_hal_free: 1704init_port_hal_free:
@@ -1639,6 +1715,11 @@ init_port_alloc_err:
1639 1715
1640static void pch_uart_exit_port(struct eg20t_port *priv) 1716static void pch_uart_exit_port(struct eg20t_port *priv)
1641{ 1717{
1718
1719#ifdef CONFIG_DEBUG_FS
1720 if (priv->debugfs)
1721 debugfs_remove(priv->debugfs);
1722#endif
1642 uart_remove_one_port(&pch_uart_driver, &priv->port); 1723 uart_remove_one_port(&pch_uart_driver, &priv->port);
1643 pci_set_drvdata(priv->pdev, NULL); 1724 pci_set_drvdata(priv->pdev, NULL);
1644 free_page((unsigned long)priv->rxbuf.buf); 1725 free_page((unsigned long)priv->rxbuf.buf);
@@ -1646,9 +1727,7 @@ static void pch_uart_exit_port(struct eg20t_port *priv)
1646 1727
1647static void pch_uart_pci_remove(struct pci_dev *pdev) 1728static void pch_uart_pci_remove(struct pci_dev *pdev)
1648{ 1729{
1649 struct eg20t_port *priv; 1730 struct eg20t_port *priv = pci_get_drvdata(pdev);
1650
1651 priv = (struct eg20t_port *)pci_get_drvdata(pdev);
1652 1731
1653 pci_disable_msi(pdev); 1732 pci_disable_msi(pdev);
1654 1733
@@ -1785,3 +1864,8 @@ module_exit(pch_uart_module_exit);
1785MODULE_LICENSE("GPL v2"); 1864MODULE_LICENSE("GPL v2");
1786MODULE_DESCRIPTION("Intel EG20T PCH UART PCI Driver"); 1865MODULE_DESCRIPTION("Intel EG20T PCH UART PCI Driver");
1787module_param(default_baud, uint, S_IRUGO); 1866module_param(default_baud, uint, S_IRUGO);
1867MODULE_PARM_DESC(default_baud,
1868 "Default BAUD for initial driver state and console (default 9600)");
1869module_param(user_uartclk, uint, S_IRUGO);
1870MODULE_PARM_DESC(user_uartclk,
1871 "Override UART default or board specific UART clock");
diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c
index e9c2dfe471a2..08ebe901bb59 100644
--- a/drivers/tty/serial/pmac_zilog.c
+++ b/drivers/tty/serial/pmac_zilog.c
@@ -1506,7 +1506,7 @@ no_dma:
1506 * fixed up interrupt info, but we use the device-tree directly 1506 * fixed up interrupt info, but we use the device-tree directly
1507 * here due to early probing so we need the fixup too. 1507 * here due to early probing so we need the fixup too.
1508 */ 1508 */
1509 if (uap->port.irq == NO_IRQ && 1509 if (uap->port.irq == 0 &&
1510 np->parent && np->parent->parent && 1510 np->parent && np->parent->parent &&
1511 of_device_is_compatible(np->parent->parent, "gatwick")) { 1511 of_device_is_compatible(np->parent->parent, "gatwick")) {
1512 /* IRQs on gatwick are offset by 64 */ 1512 /* IRQs on gatwick are offset by 64 */
diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
index 5c8e3bba6c84..e2fd3d8e0ab4 100644
--- a/drivers/tty/serial/pxa.c
+++ b/drivers/tty/serial/pxa.c
@@ -579,9 +579,9 @@ serial_pxa_pm(struct uart_port *port, unsigned int state,
579 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 579 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
580 580
581 if (!state) 581 if (!state)
582 clk_enable(up->clk); 582 clk_prepare_enable(up->clk);
583 else 583 else
584 clk_disable(up->clk); 584 clk_disable_unprepare(up->clk);
585} 585}
586 586
587static void serial_pxa_release_port(struct uart_port *port) 587static void serial_pxa_release_port(struct uart_port *port)
@@ -668,7 +668,7 @@ serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
668 struct uart_pxa_port *up = serial_pxa_ports[co->index]; 668 struct uart_pxa_port *up = serial_pxa_ports[co->index];
669 unsigned int ier; 669 unsigned int ier;
670 670
671 clk_enable(up->clk); 671 clk_prepare_enable(up->clk);
672 672
673 /* 673 /*
674 * First save the IER then disable the interrupts 674 * First save the IER then disable the interrupts
@@ -685,7 +685,7 @@ serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
685 wait_for_xmitr(up); 685 wait_for_xmitr(up);
686 serial_out(up, UART_IER, ier); 686 serial_out(up, UART_IER, ier);
687 687
688 clk_disable(up->clk); 688 clk_disable_unprepare(up->clk);
689} 689}
690 690
691static int __init 691static int __init
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index c55e5fb16fa3..de249d265bec 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1507,7 +1507,7 @@ static struct s3c24xx_serial_drv_data s3c2412_serial_drv_data = {
1507#endif 1507#endif
1508 1508
1509#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2416) || \ 1509#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2416) || \
1510 defined(CONFIG_CPU_S3C2443) 1510 defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2442)
1511static struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = { 1511static struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = {
1512 .info = &(struct s3c24xx_uart_info) { 1512 .info = &(struct s3c24xx_uart_info) {
1513 .name = "Samsung S3C2440 UART", 1513 .name = "Samsung S3C2440 UART",
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index 13056180adf5..9c4c05b2825b 100644
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -2230,7 +2230,6 @@ int uart_register_driver(struct uart_driver *drv)
2230 2230
2231 drv->tty_driver = normal; 2231 drv->tty_driver = normal;
2232 2232
2233 normal->owner = drv->owner;
2234 normal->driver_name = drv->driver_name; 2233 normal->driver_name = drv->driver_name;
2235 normal->name = drv->dev_name; 2234 normal->name = drv->dev_name;
2236 normal->major = drv->major; 2235 normal->major = drv->major;
diff --git a/drivers/tty/serial/sn_console.c b/drivers/tty/serial/sn_console.c
index 238c7df73ef5..4e1b5515f881 100644
--- a/drivers/tty/serial/sn_console.c
+++ b/drivers/tty/serial/sn_console.c
@@ -461,12 +461,12 @@ sn_receive_chars(struct sn_cons_port *port, unsigned long flags)
461 struct tty_struct *tty; 461 struct tty_struct *tty;
462 462
463 if (!port) { 463 if (!port) {
464 printk(KERN_ERR "sn_receive_chars - port NULL so can't receieve\n"); 464 printk(KERN_ERR "sn_receive_chars - port NULL so can't receive\n");
465 return; 465 return;
466 } 466 }
467 467
468 if (!port->sc_ops) { 468 if (!port->sc_ops) {
469 printk(KERN_ERR "sn_receive_chars - port->sc_ops NULL so can't receieve\n"); 469 printk(KERN_ERR "sn_receive_chars - port->sc_ops NULL so can't receive\n");
470 return; 470 return;
471 } 471 }
472 472
diff --git a/drivers/tty/serial/suncore.c b/drivers/tty/serial/suncore.c
index 6381a0282ee7..6e4ac8db2d79 100644
--- a/drivers/tty/serial/suncore.c
+++ b/drivers/tty/serial/suncore.c
@@ -17,11 +17,11 @@
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/string.h> 18#include <linux/string.h>
19#include <linux/serial_core.h> 19#include <linux/serial_core.h>
20#include <linux/sunserialcore.h>
20#include <linux/init.h> 21#include <linux/init.h>
21 22
22#include <asm/prom.h> 23#include <asm/prom.h>
23 24
24#include "suncore.h"
25 25
26static int sunserial_current_minor = 64; 26static int sunserial_current_minor = 64;
27 27
diff --git a/drivers/tty/serial/suncore.h b/drivers/tty/serial/suncore.h
deleted file mode 100644
index db2057936c31..000000000000
--- a/drivers/tty/serial/suncore.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* suncore.h
2 *
3 * Generic SUN serial/kbd/ms layer. Based entirely
4 * upon drivers/sbus/char/sunserial.h which is:
5 *
6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
7 *
8 * Port to new UART layer is:
9 *
10 * Copyright (C) 2002 David S. Miller (davem@redhat.com)
11 */
12
13#ifndef _SERIAL_SUN_H
14#define _SERIAL_SUN_H
15
16/* Serial keyboard defines for L1-A processing... */
17#define SUNKBD_RESET 0xff
18#define SUNKBD_L1 0x01
19#define SUNKBD_UP 0x80
20#define SUNKBD_A 0x4d
21
22extern unsigned int suncore_mouse_baud_cflag_next(unsigned int, int *);
23extern int suncore_mouse_baud_detection(unsigned char, int);
24
25extern int sunserial_register_minors(struct uart_driver *, int);
26extern void sunserial_unregister_minors(struct uart_driver *, int);
27
28extern int sunserial_console_match(struct console *, struct device_node *,
29 struct uart_driver *, int, bool);
30extern void sunserial_console_termios(struct console *,
31 struct device_node *);
32
33#endif /* !(_SERIAL_SUN_H) */
diff --git a/drivers/tty/serial/sunhv.c b/drivers/tty/serial/sunhv.c
index c0b7246d7339..3ba5d285c2d0 100644
--- a/drivers/tty/serial/sunhv.c
+++ b/drivers/tty/serial/sunhv.c
@@ -29,8 +29,7 @@
29#endif 29#endif
30 30
31#include <linux/serial_core.h> 31#include <linux/serial_core.h>
32 32#include <linux/sunserialcore.h>
33#include "suncore.h"
34 33
35#define CON_BREAK ((long)-1) 34#define CON_BREAK ((long)-1)
36#define CON_HUP ((long)-2) 35#define CON_HUP ((long)-2)
diff --git a/drivers/tty/serial/sunsab.c b/drivers/tty/serial/sunsab.c
index b5fa2a57b9da..62dacd0ba526 100644
--- a/drivers/tty/serial/sunsab.c
+++ b/drivers/tty/serial/sunsab.c
@@ -43,8 +43,8 @@
43#endif 43#endif
44 44
45#include <linux/serial_core.h> 45#include <linux/serial_core.h>
46#include <linux/sunserialcore.h>
46 47
47#include "suncore.h"
48#include "sunsab.h" 48#include "sunsab.h"
49 49
50struct uart_sunsab_port { 50struct uart_sunsab_port {
diff --git a/drivers/tty/serial/sunsu.c b/drivers/tty/serial/sunsu.c
index ad0f8f5f6ea1..d3ca6da129fe 100644
--- a/drivers/tty/serial/sunsu.c
+++ b/drivers/tty/serial/sunsu.c
@@ -47,8 +47,7 @@
47#endif 47#endif
48 48
49#include <linux/serial_core.h> 49#include <linux/serial_core.h>
50 50#include <linux/sunserialcore.h>
51#include "suncore.h"
52 51
53/* We are on a NS PC87303 clocked with 24.0 MHz, which results 52/* We are on a NS PC87303 clocked with 24.0 MHz, which results
54 * in a UART clock of 1.8462 MHz. 53 * in a UART clock of 1.8462 MHz.
diff --git a/drivers/tty/serial/sunzilog.c b/drivers/tty/serial/sunzilog.c
index 8e916e76b7b5..da4415842a43 100644
--- a/drivers/tty/serial/sunzilog.c
+++ b/drivers/tty/serial/sunzilog.c
@@ -43,8 +43,8 @@
43#endif 43#endif
44 44
45#include <linux/serial_core.h> 45#include <linux/serial_core.h>
46#include <linux/sunserialcore.h>
46 47
47#include "suncore.h"
48#include "sunzilog.h" 48#include "sunzilog.h"
49 49
50/* On 32-bit sparcs we need to delay after register accesses 50/* On 32-bit sparcs we need to delay after register accesses
@@ -1397,7 +1397,7 @@ static void __devinit sunzilog_init_hw(struct uart_sunzilog_port *up)
1397#endif 1397#endif
1398} 1398}
1399 1399
1400static int zilog_irq = -1; 1400static int zilog_irq;
1401 1401
1402static int __devinit zs_probe(struct platform_device *op) 1402static int __devinit zs_probe(struct platform_device *op)
1403{ 1403{
@@ -1425,7 +1425,7 @@ static int __devinit zs_probe(struct platform_device *op)
1425 1425
1426 rp = sunzilog_chip_regs[inst]; 1426 rp = sunzilog_chip_regs[inst];
1427 1427
1428 if (zilog_irq == -1) 1428 if (!zilog_irq)
1429 zilog_irq = op->archdata.irqs[0]; 1429 zilog_irq = op->archdata.irqs[0];
1430 1430
1431 up = &sunzilog_port_table[inst * 2]; 1431 up = &sunzilog_port_table[inst * 2];
@@ -1580,7 +1580,7 @@ static int __init sunzilog_init(void)
1580 if (err) 1580 if (err)
1581 goto out_unregister_uart; 1581 goto out_unregister_uart;
1582 1582
1583 if (zilog_irq != -1) { 1583 if (!zilog_irq) {
1584 struct uart_sunzilog_port *up = sunzilog_irq_chain; 1584 struct uart_sunzilog_port *up = sunzilog_irq_chain;
1585 err = request_irq(zilog_irq, sunzilog_interrupt, IRQF_SHARED, 1585 err = request_irq(zilog_irq, sunzilog_interrupt, IRQF_SHARED,
1586 "zs", sunzilog_irq_chain); 1586 "zs", sunzilog_irq_chain);
@@ -1621,7 +1621,7 @@ static void __exit sunzilog_exit(void)
1621{ 1621{
1622 platform_driver_unregister(&zs_driver); 1622 platform_driver_unregister(&zs_driver);
1623 1623
1624 if (zilog_irq != -1) { 1624 if (!zilog_irq) {
1625 struct uart_sunzilog_port *up = sunzilog_irq_chain; 1625 struct uart_sunzilog_port *up = sunzilog_irq_chain;
1626 1626
1627 /* Disable Interrupts */ 1627 /* Disable Interrupts */
@@ -1637,7 +1637,7 @@ static void __exit sunzilog_exit(void)
1637 } 1637 }
1638 1638
1639 free_irq(zilog_irq, sunzilog_irq_chain); 1639 free_irq(zilog_irq, sunzilog_irq_chain);
1640 zilog_irq = -1; 1640 zilog_irq = 0;
1641 } 1641 }
1642 1642
1643 if (sunzilog_reg.nr) { 1643 if (sunzilog_reg.nr) {
diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c
index 2ebe606a2db1..f99b0c965f85 100644
--- a/drivers/tty/serial/ucc_uart.c
+++ b/drivers/tty/serial/ucc_uart.c
@@ -1360,7 +1360,7 @@ static int ucc_uart_probe(struct platform_device *ofdev)
1360 } 1360 }
1361 1361
1362 qe_port->port.irq = irq_of_parse_and_map(np, 0); 1362 qe_port->port.irq = irq_of_parse_and_map(np, 0);
1363 if (qe_port->port.irq == NO_IRQ) { 1363 if (qe_port->port.irq == 0) {
1364 dev_err(&ofdev->dev, "could not map IRQ for UCC%u\n", 1364 dev_err(&ofdev->dev, "could not map IRQ for UCC%u\n",
1365 qe_port->ucc_num + 1); 1365 qe_port->ucc_num + 1);
1366 ret = -EINVAL; 1366 ret = -EINVAL;
diff --git a/drivers/tty/serial/vr41xx_siu.c b/drivers/tty/serial/vr41xx_siu.c
index 83148e79ca13..cf0d9485ec08 100644
--- a/drivers/tty/serial/vr41xx_siu.c
+++ b/drivers/tty/serial/vr41xx_siu.c
@@ -61,7 +61,7 @@
61static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = { 61static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
62 [0 ... SIU_PORTS_MAX-1] = { 62 [0 ... SIU_PORTS_MAX-1] = {
63 .lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock), 63 .lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
64 .irq = -1, 64 .irq = 0,
65 }, 65 },
66}; 66};
67 67
@@ -171,7 +171,7 @@ static inline unsigned int siu_check_type(struct uart_port *port)
171{ 171{
172 if (port->line == 0) 172 if (port->line == 0)
173 return PORT_VR41XX_SIU; 173 return PORT_VR41XX_SIU;
174 if (port->line == 1 && port->irq != -1) 174 if (port->line == 1 && port->irq)
175 return PORT_VR41XX_DSIU; 175 return PORT_VR41XX_DSIU;
176 176
177 return PORT_UNKNOWN; 177 return PORT_UNKNOWN;
diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
index 026cb9ea5cd1..2be006fb3da0 100644
--- a/drivers/tty/serial/vt8500_serial.c
+++ b/drivers/tty/serial/vt8500_serial.c
@@ -544,7 +544,7 @@ static struct uart_driver vt8500_uart_driver = {
544 .cons = VT8500_CONSOLE, 544 .cons = VT8500_CONSOLE,
545}; 545};
546 546
547static int __init vt8500_serial_probe(struct platform_device *pdev) 547static int __devinit vt8500_serial_probe(struct platform_device *pdev)
548{ 548{
549 struct vt8500_port *vt8500_port; 549 struct vt8500_port *vt8500_port;
550 struct resource *mmres, *irqres; 550 struct resource *mmres, *irqres;
@@ -605,7 +605,7 @@ static int __devexit vt8500_serial_remove(struct platform_device *pdev)
605 605
606static struct platform_driver vt8500_platform_driver = { 606static struct platform_driver vt8500_platform_driver = {
607 .probe = vt8500_serial_probe, 607 .probe = vt8500_serial_probe,
608 .remove = vt8500_serial_remove, 608 .remove = __devexit_p(vt8500_serial_remove),
609 .driver = { 609 .driver = {
610 .name = "vt8500_serial", 610 .name = "vt8500_serial",
611 .owner = THIS_MODULE, 611 .owner = THIS_MODULE,