diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2011-01-13 15:10:18 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-01-13 15:10:18 -0500 |
commit | ab4382d27412e7e3e7c936e8d50d8888dfac3df8 (patch) | |
tree | 51d96dea2431140358784b6b426715f37f74fd53 /drivers/tty/serial/sa1100.c | |
parent | 728674a7e466628df2aeec6d11a2ae1ef968fb67 (diff) |
tty: move drivers/serial/ to drivers/tty/serial/
The serial drivers are really just tty drivers, so move them to
drivers/tty/ to make things a bit neater overall.
This is part of the tty/serial driver movement proceedure as proposed by
Arnd Bergmann and approved by everyone involved a number of months ago.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Rogier Wolff <R.E.Wolff@bitwizard.nl>
Cc: Michael H. Warfield <mhw@wittsend.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/tty/serial/sa1100.c')
-rw-r--r-- | drivers/tty/serial/sa1100.c | 918 |
1 files changed, 918 insertions, 0 deletions
diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c new file mode 100644 index 000000000000..2199d819a987 --- /dev/null +++ b/drivers/tty/serial/sa1100.c | |||
@@ -0,0 +1,918 @@ | |||
1 | /* | ||
2 | * linux/drivers/char/sa1100.c | ||
3 | * | ||
4 | * Driver for SA11x0 serial ports | ||
5 | * | ||
6 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | ||
7 | * | ||
8 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | */ | ||
24 | |||
25 | #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | ||
26 | #define SUPPORT_SYSRQ | ||
27 | #endif | ||
28 | |||
29 | #include <linux/module.h> | ||
30 | #include <linux/ioport.h> | ||
31 | #include <linux/init.h> | ||
32 | #include <linux/console.h> | ||
33 | #include <linux/sysrq.h> | ||
34 | #include <linux/platform_device.h> | ||
35 | #include <linux/tty.h> | ||
36 | #include <linux/tty_flip.h> | ||
37 | #include <linux/serial_core.h> | ||
38 | #include <linux/serial.h> | ||
39 | #include <linux/io.h> | ||
40 | |||
41 | #include <asm/irq.h> | ||
42 | #include <mach/hardware.h> | ||
43 | #include <asm/mach/serial_sa1100.h> | ||
44 | |||
45 | /* We've been assigned a range on the "Low-density serial ports" major */ | ||
46 | #define SERIAL_SA1100_MAJOR 204 | ||
47 | #define MINOR_START 5 | ||
48 | |||
49 | #define NR_PORTS 3 | ||
50 | |||
51 | #define SA1100_ISR_PASS_LIMIT 256 | ||
52 | |||
53 | /* | ||
54 | * Convert from ignore_status_mask or read_status_mask to UTSR[01] | ||
55 | */ | ||
56 | #define SM_TO_UTSR0(x) ((x) & 0xff) | ||
57 | #define SM_TO_UTSR1(x) ((x) >> 8) | ||
58 | #define UTSR0_TO_SM(x) ((x)) | ||
59 | #define UTSR1_TO_SM(x) ((x) << 8) | ||
60 | |||
61 | #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0) | ||
62 | #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1) | ||
63 | #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2) | ||
64 | #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3) | ||
65 | #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0) | ||
66 | #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1) | ||
67 | #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR) | ||
68 | |||
69 | #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0) | ||
70 | #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1) | ||
71 | #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2) | ||
72 | #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3) | ||
73 | #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0) | ||
74 | #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1) | ||
75 | #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR) | ||
76 | |||
77 | /* | ||
78 | * This is the size of our serial port register set. | ||
79 | */ | ||
80 | #define UART_PORT_SIZE 0x24 | ||
81 | |||
82 | /* | ||
83 | * This determines how often we check the modem status signals | ||
84 | * for any change. They generally aren't connected to an IRQ | ||
85 | * so we have to poll them. We also check immediately before | ||
86 | * filling the TX fifo incase CTS has been dropped. | ||
87 | */ | ||
88 | #define MCTRL_TIMEOUT (250*HZ/1000) | ||
89 | |||
90 | struct sa1100_port { | ||
91 | struct uart_port port; | ||
92 | struct timer_list timer; | ||
93 | unsigned int old_status; | ||
94 | }; | ||
95 | |||
96 | /* | ||
97 | * Handle any change of modem status signal since we were last called. | ||
98 | */ | ||
99 | static void sa1100_mctrl_check(struct sa1100_port *sport) | ||
100 | { | ||
101 | unsigned int status, changed; | ||
102 | |||
103 | status = sport->port.ops->get_mctrl(&sport->port); | ||
104 | changed = status ^ sport->old_status; | ||
105 | |||
106 | if (changed == 0) | ||
107 | return; | ||
108 | |||
109 | sport->old_status = status; | ||
110 | |||
111 | if (changed & TIOCM_RI) | ||
112 | sport->port.icount.rng++; | ||
113 | if (changed & TIOCM_DSR) | ||
114 | sport->port.icount.dsr++; | ||
115 | if (changed & TIOCM_CAR) | ||
116 | uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); | ||
117 | if (changed & TIOCM_CTS) | ||
118 | uart_handle_cts_change(&sport->port, status & TIOCM_CTS); | ||
119 | |||
120 | wake_up_interruptible(&sport->port.state->port.delta_msr_wait); | ||
121 | } | ||
122 | |||
123 | /* | ||
124 | * This is our per-port timeout handler, for checking the | ||
125 | * modem status signals. | ||
126 | */ | ||
127 | static void sa1100_timeout(unsigned long data) | ||
128 | { | ||
129 | struct sa1100_port *sport = (struct sa1100_port *)data; | ||
130 | unsigned long flags; | ||
131 | |||
132 | if (sport->port.state) { | ||
133 | spin_lock_irqsave(&sport->port.lock, flags); | ||
134 | sa1100_mctrl_check(sport); | ||
135 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
136 | |||
137 | mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT); | ||
138 | } | ||
139 | } | ||
140 | |||
141 | /* | ||
142 | * interrupts disabled on entry | ||
143 | */ | ||
144 | static void sa1100_stop_tx(struct uart_port *port) | ||
145 | { | ||
146 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
147 | u32 utcr3; | ||
148 | |||
149 | utcr3 = UART_GET_UTCR3(sport); | ||
150 | UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE); | ||
151 | sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS); | ||
152 | } | ||
153 | |||
154 | /* | ||
155 | * port locked and interrupts disabled | ||
156 | */ | ||
157 | static void sa1100_start_tx(struct uart_port *port) | ||
158 | { | ||
159 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
160 | u32 utcr3; | ||
161 | |||
162 | utcr3 = UART_GET_UTCR3(sport); | ||
163 | sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS); | ||
164 | UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE); | ||
165 | } | ||
166 | |||
167 | /* | ||
168 | * Interrupts enabled | ||
169 | */ | ||
170 | static void sa1100_stop_rx(struct uart_port *port) | ||
171 | { | ||
172 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
173 | u32 utcr3; | ||
174 | |||
175 | utcr3 = UART_GET_UTCR3(sport); | ||
176 | UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE); | ||
177 | } | ||
178 | |||
179 | /* | ||
180 | * Set the modem control timer to fire immediately. | ||
181 | */ | ||
182 | static void sa1100_enable_ms(struct uart_port *port) | ||
183 | { | ||
184 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
185 | |||
186 | mod_timer(&sport->timer, jiffies); | ||
187 | } | ||
188 | |||
189 | static void | ||
190 | sa1100_rx_chars(struct sa1100_port *sport) | ||
191 | { | ||
192 | struct tty_struct *tty = sport->port.state->port.tty; | ||
193 | unsigned int status, ch, flg; | ||
194 | |||
195 | status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) | | ||
196 | UTSR0_TO_SM(UART_GET_UTSR0(sport)); | ||
197 | while (status & UTSR1_TO_SM(UTSR1_RNE)) { | ||
198 | ch = UART_GET_CHAR(sport); | ||
199 | |||
200 | sport->port.icount.rx++; | ||
201 | |||
202 | flg = TTY_NORMAL; | ||
203 | |||
204 | /* | ||
205 | * note that the error handling code is | ||
206 | * out of the main execution path | ||
207 | */ | ||
208 | if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) { | ||
209 | if (status & UTSR1_TO_SM(UTSR1_PRE)) | ||
210 | sport->port.icount.parity++; | ||
211 | else if (status & UTSR1_TO_SM(UTSR1_FRE)) | ||
212 | sport->port.icount.frame++; | ||
213 | if (status & UTSR1_TO_SM(UTSR1_ROR)) | ||
214 | sport->port.icount.overrun++; | ||
215 | |||
216 | status &= sport->port.read_status_mask; | ||
217 | |||
218 | if (status & UTSR1_TO_SM(UTSR1_PRE)) | ||
219 | flg = TTY_PARITY; | ||
220 | else if (status & UTSR1_TO_SM(UTSR1_FRE)) | ||
221 | flg = TTY_FRAME; | ||
222 | |||
223 | #ifdef SUPPORT_SYSRQ | ||
224 | sport->port.sysrq = 0; | ||
225 | #endif | ||
226 | } | ||
227 | |||
228 | if (uart_handle_sysrq_char(&sport->port, ch)) | ||
229 | goto ignore_char; | ||
230 | |||
231 | uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg); | ||
232 | |||
233 | ignore_char: | ||
234 | status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) | | ||
235 | UTSR0_TO_SM(UART_GET_UTSR0(sport)); | ||
236 | } | ||
237 | tty_flip_buffer_push(tty); | ||
238 | } | ||
239 | |||
240 | static void sa1100_tx_chars(struct sa1100_port *sport) | ||
241 | { | ||
242 | struct circ_buf *xmit = &sport->port.state->xmit; | ||
243 | |||
244 | if (sport->port.x_char) { | ||
245 | UART_PUT_CHAR(sport, sport->port.x_char); | ||
246 | sport->port.icount.tx++; | ||
247 | sport->port.x_char = 0; | ||
248 | return; | ||
249 | } | ||
250 | |||
251 | /* | ||
252 | * Check the modem control lines before | ||
253 | * transmitting anything. | ||
254 | */ | ||
255 | sa1100_mctrl_check(sport); | ||
256 | |||
257 | if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { | ||
258 | sa1100_stop_tx(&sport->port); | ||
259 | return; | ||
260 | } | ||
261 | |||
262 | /* | ||
263 | * Tried using FIFO (not checking TNF) for fifo fill: | ||
264 | * still had the '4 bytes repeated' problem. | ||
265 | */ | ||
266 | while (UART_GET_UTSR1(sport) & UTSR1_TNF) { | ||
267 | UART_PUT_CHAR(sport, xmit->buf[xmit->tail]); | ||
268 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | ||
269 | sport->port.icount.tx++; | ||
270 | if (uart_circ_empty(xmit)) | ||
271 | break; | ||
272 | } | ||
273 | |||
274 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
275 | uart_write_wakeup(&sport->port); | ||
276 | |||
277 | if (uart_circ_empty(xmit)) | ||
278 | sa1100_stop_tx(&sport->port); | ||
279 | } | ||
280 | |||
281 | static irqreturn_t sa1100_int(int irq, void *dev_id) | ||
282 | { | ||
283 | struct sa1100_port *sport = dev_id; | ||
284 | unsigned int status, pass_counter = 0; | ||
285 | |||
286 | spin_lock(&sport->port.lock); | ||
287 | status = UART_GET_UTSR0(sport); | ||
288 | status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS; | ||
289 | do { | ||
290 | if (status & (UTSR0_RFS | UTSR0_RID)) { | ||
291 | /* Clear the receiver idle bit, if set */ | ||
292 | if (status & UTSR0_RID) | ||
293 | UART_PUT_UTSR0(sport, UTSR0_RID); | ||
294 | sa1100_rx_chars(sport); | ||
295 | } | ||
296 | |||
297 | /* Clear the relevant break bits */ | ||
298 | if (status & (UTSR0_RBB | UTSR0_REB)) | ||
299 | UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB)); | ||
300 | |||
301 | if (status & UTSR0_RBB) | ||
302 | sport->port.icount.brk++; | ||
303 | |||
304 | if (status & UTSR0_REB) | ||
305 | uart_handle_break(&sport->port); | ||
306 | |||
307 | if (status & UTSR0_TFS) | ||
308 | sa1100_tx_chars(sport); | ||
309 | if (pass_counter++ > SA1100_ISR_PASS_LIMIT) | ||
310 | break; | ||
311 | status = UART_GET_UTSR0(sport); | ||
312 | status &= SM_TO_UTSR0(sport->port.read_status_mask) | | ||
313 | ~UTSR0_TFS; | ||
314 | } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID)); | ||
315 | spin_unlock(&sport->port.lock); | ||
316 | |||
317 | return IRQ_HANDLED; | ||
318 | } | ||
319 | |||
320 | /* | ||
321 | * Return TIOCSER_TEMT when transmitter is not busy. | ||
322 | */ | ||
323 | static unsigned int sa1100_tx_empty(struct uart_port *port) | ||
324 | { | ||
325 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
326 | |||
327 | return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT; | ||
328 | } | ||
329 | |||
330 | static unsigned int sa1100_get_mctrl(struct uart_port *port) | ||
331 | { | ||
332 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
333 | } | ||
334 | |||
335 | static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
336 | { | ||
337 | } | ||
338 | |||
339 | /* | ||
340 | * Interrupts always disabled. | ||
341 | */ | ||
342 | static void sa1100_break_ctl(struct uart_port *port, int break_state) | ||
343 | { | ||
344 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
345 | unsigned long flags; | ||
346 | unsigned int utcr3; | ||
347 | |||
348 | spin_lock_irqsave(&sport->port.lock, flags); | ||
349 | utcr3 = UART_GET_UTCR3(sport); | ||
350 | if (break_state == -1) | ||
351 | utcr3 |= UTCR3_BRK; | ||
352 | else | ||
353 | utcr3 &= ~UTCR3_BRK; | ||
354 | UART_PUT_UTCR3(sport, utcr3); | ||
355 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
356 | } | ||
357 | |||
358 | static int sa1100_startup(struct uart_port *port) | ||
359 | { | ||
360 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
361 | int retval; | ||
362 | |||
363 | /* | ||
364 | * Allocate the IRQ | ||
365 | */ | ||
366 | retval = request_irq(sport->port.irq, sa1100_int, 0, | ||
367 | "sa11x0-uart", sport); | ||
368 | if (retval) | ||
369 | return retval; | ||
370 | |||
371 | /* | ||
372 | * Finally, clear and enable interrupts | ||
373 | */ | ||
374 | UART_PUT_UTSR0(sport, -1); | ||
375 | UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE); | ||
376 | |||
377 | /* | ||
378 | * Enable modem status interrupts | ||
379 | */ | ||
380 | spin_lock_irq(&sport->port.lock); | ||
381 | sa1100_enable_ms(&sport->port); | ||
382 | spin_unlock_irq(&sport->port.lock); | ||
383 | |||
384 | return 0; | ||
385 | } | ||
386 | |||
387 | static void sa1100_shutdown(struct uart_port *port) | ||
388 | { | ||
389 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
390 | |||
391 | /* | ||
392 | * Stop our timer. | ||
393 | */ | ||
394 | del_timer_sync(&sport->timer); | ||
395 | |||
396 | /* | ||
397 | * Free the interrupt | ||
398 | */ | ||
399 | free_irq(sport->port.irq, sport); | ||
400 | |||
401 | /* | ||
402 | * Disable all interrupts, port and break condition. | ||
403 | */ | ||
404 | UART_PUT_UTCR3(sport, 0); | ||
405 | } | ||
406 | |||
407 | static void | ||
408 | sa1100_set_termios(struct uart_port *port, struct ktermios *termios, | ||
409 | struct ktermios *old) | ||
410 | { | ||
411 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
412 | unsigned long flags; | ||
413 | unsigned int utcr0, old_utcr3, baud, quot; | ||
414 | unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; | ||
415 | |||
416 | /* | ||
417 | * We only support CS7 and CS8. | ||
418 | */ | ||
419 | while ((termios->c_cflag & CSIZE) != CS7 && | ||
420 | (termios->c_cflag & CSIZE) != CS8) { | ||
421 | termios->c_cflag &= ~CSIZE; | ||
422 | termios->c_cflag |= old_csize; | ||
423 | old_csize = CS8; | ||
424 | } | ||
425 | |||
426 | if ((termios->c_cflag & CSIZE) == CS8) | ||
427 | utcr0 = UTCR0_DSS; | ||
428 | else | ||
429 | utcr0 = 0; | ||
430 | |||
431 | if (termios->c_cflag & CSTOPB) | ||
432 | utcr0 |= UTCR0_SBS; | ||
433 | if (termios->c_cflag & PARENB) { | ||
434 | utcr0 |= UTCR0_PE; | ||
435 | if (!(termios->c_cflag & PARODD)) | ||
436 | utcr0 |= UTCR0_OES; | ||
437 | } | ||
438 | |||
439 | /* | ||
440 | * Ask the core to calculate the divisor for us. | ||
441 | */ | ||
442 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | ||
443 | quot = uart_get_divisor(port, baud); | ||
444 | |||
445 | spin_lock_irqsave(&sport->port.lock, flags); | ||
446 | |||
447 | sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS); | ||
448 | sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR); | ||
449 | if (termios->c_iflag & INPCK) | ||
450 | sport->port.read_status_mask |= | ||
451 | UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE); | ||
452 | if (termios->c_iflag & (BRKINT | PARMRK)) | ||
453 | sport->port.read_status_mask |= | ||
454 | UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB); | ||
455 | |||
456 | /* | ||
457 | * Characters to ignore | ||
458 | */ | ||
459 | sport->port.ignore_status_mask = 0; | ||
460 | if (termios->c_iflag & IGNPAR) | ||
461 | sport->port.ignore_status_mask |= | ||
462 | UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE); | ||
463 | if (termios->c_iflag & IGNBRK) { | ||
464 | sport->port.ignore_status_mask |= | ||
465 | UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB); | ||
466 | /* | ||
467 | * If we're ignoring parity and break indicators, | ||
468 | * ignore overruns too (for real raw support). | ||
469 | */ | ||
470 | if (termios->c_iflag & IGNPAR) | ||
471 | sport->port.ignore_status_mask |= | ||
472 | UTSR1_TO_SM(UTSR1_ROR); | ||
473 | } | ||
474 | |||
475 | del_timer_sync(&sport->timer); | ||
476 | |||
477 | /* | ||
478 | * Update the per-port timeout. | ||
479 | */ | ||
480 | uart_update_timeout(port, termios->c_cflag, baud); | ||
481 | |||
482 | /* | ||
483 | * disable interrupts and drain transmitter | ||
484 | */ | ||
485 | old_utcr3 = UART_GET_UTCR3(sport); | ||
486 | UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)); | ||
487 | |||
488 | while (UART_GET_UTSR1(sport) & UTSR1_TBY) | ||
489 | barrier(); | ||
490 | |||
491 | /* then, disable everything */ | ||
492 | UART_PUT_UTCR3(sport, 0); | ||
493 | |||
494 | /* set the parity, stop bits and data size */ | ||
495 | UART_PUT_UTCR0(sport, utcr0); | ||
496 | |||
497 | /* set the baud rate */ | ||
498 | quot -= 1; | ||
499 | UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8)); | ||
500 | UART_PUT_UTCR2(sport, (quot & 0xff)); | ||
501 | |||
502 | UART_PUT_UTSR0(sport, -1); | ||
503 | |||
504 | UART_PUT_UTCR3(sport, old_utcr3); | ||
505 | |||
506 | if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) | ||
507 | sa1100_enable_ms(&sport->port); | ||
508 | |||
509 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
510 | } | ||
511 | |||
512 | static const char *sa1100_type(struct uart_port *port) | ||
513 | { | ||
514 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
515 | |||
516 | return sport->port.type == PORT_SA1100 ? "SA1100" : NULL; | ||
517 | } | ||
518 | |||
519 | /* | ||
520 | * Release the memory region(s) being used by 'port'. | ||
521 | */ | ||
522 | static void sa1100_release_port(struct uart_port *port) | ||
523 | { | ||
524 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
525 | |||
526 | release_mem_region(sport->port.mapbase, UART_PORT_SIZE); | ||
527 | } | ||
528 | |||
529 | /* | ||
530 | * Request the memory region(s) being used by 'port'. | ||
531 | */ | ||
532 | static int sa1100_request_port(struct uart_port *port) | ||
533 | { | ||
534 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
535 | |||
536 | return request_mem_region(sport->port.mapbase, UART_PORT_SIZE, | ||
537 | "sa11x0-uart") != NULL ? 0 : -EBUSY; | ||
538 | } | ||
539 | |||
540 | /* | ||
541 | * Configure/autoconfigure the port. | ||
542 | */ | ||
543 | static void sa1100_config_port(struct uart_port *port, int flags) | ||
544 | { | ||
545 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
546 | |||
547 | if (flags & UART_CONFIG_TYPE && | ||
548 | sa1100_request_port(&sport->port) == 0) | ||
549 | sport->port.type = PORT_SA1100; | ||
550 | } | ||
551 | |||
552 | /* | ||
553 | * Verify the new serial_struct (for TIOCSSERIAL). | ||
554 | * The only change we allow are to the flags and type, and | ||
555 | * even then only between PORT_SA1100 and PORT_UNKNOWN | ||
556 | */ | ||
557 | static int | ||
558 | sa1100_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
559 | { | ||
560 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
561 | int ret = 0; | ||
562 | |||
563 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100) | ||
564 | ret = -EINVAL; | ||
565 | if (sport->port.irq != ser->irq) | ||
566 | ret = -EINVAL; | ||
567 | if (ser->io_type != SERIAL_IO_MEM) | ||
568 | ret = -EINVAL; | ||
569 | if (sport->port.uartclk / 16 != ser->baud_base) | ||
570 | ret = -EINVAL; | ||
571 | if ((void *)sport->port.mapbase != ser->iomem_base) | ||
572 | ret = -EINVAL; | ||
573 | if (sport->port.iobase != ser->port) | ||
574 | ret = -EINVAL; | ||
575 | if (ser->hub6 != 0) | ||
576 | ret = -EINVAL; | ||
577 | return ret; | ||
578 | } | ||
579 | |||
580 | static struct uart_ops sa1100_pops = { | ||
581 | .tx_empty = sa1100_tx_empty, | ||
582 | .set_mctrl = sa1100_set_mctrl, | ||
583 | .get_mctrl = sa1100_get_mctrl, | ||
584 | .stop_tx = sa1100_stop_tx, | ||
585 | .start_tx = sa1100_start_tx, | ||
586 | .stop_rx = sa1100_stop_rx, | ||
587 | .enable_ms = sa1100_enable_ms, | ||
588 | .break_ctl = sa1100_break_ctl, | ||
589 | .startup = sa1100_startup, | ||
590 | .shutdown = sa1100_shutdown, | ||
591 | .set_termios = sa1100_set_termios, | ||
592 | .type = sa1100_type, | ||
593 | .release_port = sa1100_release_port, | ||
594 | .request_port = sa1100_request_port, | ||
595 | .config_port = sa1100_config_port, | ||
596 | .verify_port = sa1100_verify_port, | ||
597 | }; | ||
598 | |||
599 | static struct sa1100_port sa1100_ports[NR_PORTS]; | ||
600 | |||
601 | /* | ||
602 | * Setup the SA1100 serial ports. Note that we don't include the IrDA | ||
603 | * port here since we have our own SIR/FIR driver (see drivers/net/irda) | ||
604 | * | ||
605 | * Note also that we support "console=ttySAx" where "x" is either 0 or 1. | ||
606 | * Which serial port this ends up being depends on the machine you're | ||
607 | * running this kernel on. I'm not convinced that this is a good idea, | ||
608 | * but that's the way it traditionally works. | ||
609 | * | ||
610 | * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer | ||
611 | * used here. | ||
612 | */ | ||
613 | static void __init sa1100_init_ports(void) | ||
614 | { | ||
615 | static int first = 1; | ||
616 | int i; | ||
617 | |||
618 | if (!first) | ||
619 | return; | ||
620 | first = 0; | ||
621 | |||
622 | for (i = 0; i < NR_PORTS; i++) { | ||
623 | sa1100_ports[i].port.uartclk = 3686400; | ||
624 | sa1100_ports[i].port.ops = &sa1100_pops; | ||
625 | sa1100_ports[i].port.fifosize = 8; | ||
626 | sa1100_ports[i].port.line = i; | ||
627 | sa1100_ports[i].port.iotype = UPIO_MEM; | ||
628 | init_timer(&sa1100_ports[i].timer); | ||
629 | sa1100_ports[i].timer.function = sa1100_timeout; | ||
630 | sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i]; | ||
631 | } | ||
632 | |||
633 | /* | ||
634 | * make transmit lines outputs, so that when the port | ||
635 | * is closed, the output is in the MARK state. | ||
636 | */ | ||
637 | PPDR |= PPC_TXD1 | PPC_TXD3; | ||
638 | PPSR |= PPC_TXD1 | PPC_TXD3; | ||
639 | } | ||
640 | |||
641 | void __devinit sa1100_register_uart_fns(struct sa1100_port_fns *fns) | ||
642 | { | ||
643 | if (fns->get_mctrl) | ||
644 | sa1100_pops.get_mctrl = fns->get_mctrl; | ||
645 | if (fns->set_mctrl) | ||
646 | sa1100_pops.set_mctrl = fns->set_mctrl; | ||
647 | |||
648 | sa1100_pops.pm = fns->pm; | ||
649 | sa1100_pops.set_wake = fns->set_wake; | ||
650 | } | ||
651 | |||
652 | void __init sa1100_register_uart(int idx, int port) | ||
653 | { | ||
654 | if (idx >= NR_PORTS) { | ||
655 | printk(KERN_ERR "%s: bad index number %d\n", __func__, idx); | ||
656 | return; | ||
657 | } | ||
658 | |||
659 | switch (port) { | ||
660 | case 1: | ||
661 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0; | ||
662 | sa1100_ports[idx].port.mapbase = _Ser1UTCR0; | ||
663 | sa1100_ports[idx].port.irq = IRQ_Ser1UART; | ||
664 | sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; | ||
665 | break; | ||
666 | |||
667 | case 2: | ||
668 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0; | ||
669 | sa1100_ports[idx].port.mapbase = _Ser2UTCR0; | ||
670 | sa1100_ports[idx].port.irq = IRQ_Ser2ICP; | ||
671 | sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; | ||
672 | break; | ||
673 | |||
674 | case 3: | ||
675 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0; | ||
676 | sa1100_ports[idx].port.mapbase = _Ser3UTCR0; | ||
677 | sa1100_ports[idx].port.irq = IRQ_Ser3UART; | ||
678 | sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; | ||
679 | break; | ||
680 | |||
681 | default: | ||
682 | printk(KERN_ERR "%s: bad port number %d\n", __func__, port); | ||
683 | } | ||
684 | } | ||
685 | |||
686 | |||
687 | #ifdef CONFIG_SERIAL_SA1100_CONSOLE | ||
688 | static void sa1100_console_putchar(struct uart_port *port, int ch) | ||
689 | { | ||
690 | struct sa1100_port *sport = (struct sa1100_port *)port; | ||
691 | |||
692 | while (!(UART_GET_UTSR1(sport) & UTSR1_TNF)) | ||
693 | barrier(); | ||
694 | UART_PUT_CHAR(sport, ch); | ||
695 | } | ||
696 | |||
697 | /* | ||
698 | * Interrupts are disabled on entering | ||
699 | */ | ||
700 | static void | ||
701 | sa1100_console_write(struct console *co, const char *s, unsigned int count) | ||
702 | { | ||
703 | struct sa1100_port *sport = &sa1100_ports[co->index]; | ||
704 | unsigned int old_utcr3, status; | ||
705 | |||
706 | /* | ||
707 | * First, save UTCR3 and then disable interrupts | ||
708 | */ | ||
709 | old_utcr3 = UART_GET_UTCR3(sport); | ||
710 | UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) | | ||
711 | UTCR3_TXE); | ||
712 | |||
713 | uart_console_write(&sport->port, s, count, sa1100_console_putchar); | ||
714 | |||
715 | /* | ||
716 | * Finally, wait for transmitter to become empty | ||
717 | * and restore UTCR3 | ||
718 | */ | ||
719 | do { | ||
720 | status = UART_GET_UTSR1(sport); | ||
721 | } while (status & UTSR1_TBY); | ||
722 | UART_PUT_UTCR3(sport, old_utcr3); | ||
723 | } | ||
724 | |||
725 | /* | ||
726 | * If the port was already initialised (eg, by a boot loader), | ||
727 | * try to determine the current setup. | ||
728 | */ | ||
729 | static void __init | ||
730 | sa1100_console_get_options(struct sa1100_port *sport, int *baud, | ||
731 | int *parity, int *bits) | ||
732 | { | ||
733 | unsigned int utcr3; | ||
734 | |||
735 | utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE); | ||
736 | if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) { | ||
737 | /* ok, the port was enabled */ | ||
738 | unsigned int utcr0, quot; | ||
739 | |||
740 | utcr0 = UART_GET_UTCR0(sport); | ||
741 | |||
742 | *parity = 'n'; | ||
743 | if (utcr0 & UTCR0_PE) { | ||
744 | if (utcr0 & UTCR0_OES) | ||
745 | *parity = 'e'; | ||
746 | else | ||
747 | *parity = 'o'; | ||
748 | } | ||
749 | |||
750 | if (utcr0 & UTCR0_DSS) | ||
751 | *bits = 8; | ||
752 | else | ||
753 | *bits = 7; | ||
754 | |||
755 | quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8; | ||
756 | quot &= 0xfff; | ||
757 | *baud = sport->port.uartclk / (16 * (quot + 1)); | ||
758 | } | ||
759 | } | ||
760 | |||
761 | static int __init | ||
762 | sa1100_console_setup(struct console *co, char *options) | ||
763 | { | ||
764 | struct sa1100_port *sport; | ||
765 | int baud = 9600; | ||
766 | int bits = 8; | ||
767 | int parity = 'n'; | ||
768 | int flow = 'n'; | ||
769 | |||
770 | /* | ||
771 | * Check whether an invalid uart number has been specified, and | ||
772 | * if so, search for the first available port that does have | ||
773 | * console support. | ||
774 | */ | ||
775 | if (co->index == -1 || co->index >= NR_PORTS) | ||
776 | co->index = 0; | ||
777 | sport = &sa1100_ports[co->index]; | ||
778 | |||
779 | if (options) | ||
780 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
781 | else | ||
782 | sa1100_console_get_options(sport, &baud, &parity, &bits); | ||
783 | |||
784 | return uart_set_options(&sport->port, co, baud, parity, bits, flow); | ||
785 | } | ||
786 | |||
787 | static struct uart_driver sa1100_reg; | ||
788 | static struct console sa1100_console = { | ||
789 | .name = "ttySA", | ||
790 | .write = sa1100_console_write, | ||
791 | .device = uart_console_device, | ||
792 | .setup = sa1100_console_setup, | ||
793 | .flags = CON_PRINTBUFFER, | ||
794 | .index = -1, | ||
795 | .data = &sa1100_reg, | ||
796 | }; | ||
797 | |||
798 | static int __init sa1100_rs_console_init(void) | ||
799 | { | ||
800 | sa1100_init_ports(); | ||
801 | register_console(&sa1100_console); | ||
802 | return 0; | ||
803 | } | ||
804 | console_initcall(sa1100_rs_console_init); | ||
805 | |||
806 | #define SA1100_CONSOLE &sa1100_console | ||
807 | #else | ||
808 | #define SA1100_CONSOLE NULL | ||
809 | #endif | ||
810 | |||
811 | static struct uart_driver sa1100_reg = { | ||
812 | .owner = THIS_MODULE, | ||
813 | .driver_name = "ttySA", | ||
814 | .dev_name = "ttySA", | ||
815 | .major = SERIAL_SA1100_MAJOR, | ||
816 | .minor = MINOR_START, | ||
817 | .nr = NR_PORTS, | ||
818 | .cons = SA1100_CONSOLE, | ||
819 | }; | ||
820 | |||
821 | static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state) | ||
822 | { | ||
823 | struct sa1100_port *sport = platform_get_drvdata(dev); | ||
824 | |||
825 | if (sport) | ||
826 | uart_suspend_port(&sa1100_reg, &sport->port); | ||
827 | |||
828 | return 0; | ||
829 | } | ||
830 | |||
831 | static int sa1100_serial_resume(struct platform_device *dev) | ||
832 | { | ||
833 | struct sa1100_port *sport = platform_get_drvdata(dev); | ||
834 | |||
835 | if (sport) | ||
836 | uart_resume_port(&sa1100_reg, &sport->port); | ||
837 | |||
838 | return 0; | ||
839 | } | ||
840 | |||
841 | static int sa1100_serial_probe(struct platform_device *dev) | ||
842 | { | ||
843 | struct resource *res = dev->resource; | ||
844 | int i; | ||
845 | |||
846 | for (i = 0; i < dev->num_resources; i++, res++) | ||
847 | if (res->flags & IORESOURCE_MEM) | ||
848 | break; | ||
849 | |||
850 | if (i < dev->num_resources) { | ||
851 | for (i = 0; i < NR_PORTS; i++) { | ||
852 | if (sa1100_ports[i].port.mapbase != res->start) | ||
853 | continue; | ||
854 | |||
855 | sa1100_ports[i].port.dev = &dev->dev; | ||
856 | uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port); | ||
857 | platform_set_drvdata(dev, &sa1100_ports[i]); | ||
858 | break; | ||
859 | } | ||
860 | } | ||
861 | |||
862 | return 0; | ||
863 | } | ||
864 | |||
865 | static int sa1100_serial_remove(struct platform_device *pdev) | ||
866 | { | ||
867 | struct sa1100_port *sport = platform_get_drvdata(pdev); | ||
868 | |||
869 | platform_set_drvdata(pdev, NULL); | ||
870 | |||
871 | if (sport) | ||
872 | uart_remove_one_port(&sa1100_reg, &sport->port); | ||
873 | |||
874 | return 0; | ||
875 | } | ||
876 | |||
877 | static struct platform_driver sa11x0_serial_driver = { | ||
878 | .probe = sa1100_serial_probe, | ||
879 | .remove = sa1100_serial_remove, | ||
880 | .suspend = sa1100_serial_suspend, | ||
881 | .resume = sa1100_serial_resume, | ||
882 | .driver = { | ||
883 | .name = "sa11x0-uart", | ||
884 | .owner = THIS_MODULE, | ||
885 | }, | ||
886 | }; | ||
887 | |||
888 | static int __init sa1100_serial_init(void) | ||
889 | { | ||
890 | int ret; | ||
891 | |||
892 | printk(KERN_INFO "Serial: SA11x0 driver\n"); | ||
893 | |||
894 | sa1100_init_ports(); | ||
895 | |||
896 | ret = uart_register_driver(&sa1100_reg); | ||
897 | if (ret == 0) { | ||
898 | ret = platform_driver_register(&sa11x0_serial_driver); | ||
899 | if (ret) | ||
900 | uart_unregister_driver(&sa1100_reg); | ||
901 | } | ||
902 | return ret; | ||
903 | } | ||
904 | |||
905 | static void __exit sa1100_serial_exit(void) | ||
906 | { | ||
907 | platform_driver_unregister(&sa11x0_serial_driver); | ||
908 | uart_unregister_driver(&sa1100_reg); | ||
909 | } | ||
910 | |||
911 | module_init(sa1100_serial_init); | ||
912 | module_exit(sa1100_serial_exit); | ||
913 | |||
914 | MODULE_AUTHOR("Deep Blue Solutions Ltd"); | ||
915 | MODULE_DESCRIPTION("SA1100 generic serial port driver"); | ||
916 | MODULE_LICENSE("GPL"); | ||
917 | MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR); | ||
918 | MODULE_ALIAS("platform:sa11x0-uart"); | ||