diff options
author | Govindraj.R <govindraj.raja@ti.com> | 2011-11-07 08:27:03 -0500 |
---|---|---|
committer | Kevin Hilman <khilman@ti.com> | 2011-12-14 19:05:21 -0500 |
commit | c538d20c7f437e56c5301357c492230d1d6d1b80 (patch) | |
tree | 95fd5bc4d668bd211a082e29b410e7cb86355041 /drivers/tty/serial/omap-serial.c | |
parent | 9f9ac1e84a24670eea1430040e0aef278b4daffa (diff) |
ARM: OMAP2+: UART: Ensure all reg values configured are available from port structure
Add missing uart regs to uart_port structure which can be used in
context restore. Store dll, dlh, mdr1, scr, efr, lcr, mcr reg values
into uart_port structure while configuring individual port in termios
function.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de> (for drivers/tty changes)
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'drivers/tty/serial/omap-serial.c')
-rw-r--r-- | drivers/tty/serial/omap-serial.c | 43 |
1 files changed, 26 insertions, 17 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index a834e913a6e4..5327ff0b008e 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c | |||
@@ -466,8 +466,9 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) | |||
466 | mcr |= UART_MCR_LOOP; | 466 | mcr |= UART_MCR_LOOP; |
467 | 467 | ||
468 | pm_runtime_get_sync(&up->pdev->dev); | 468 | pm_runtime_get_sync(&up->pdev->dev); |
469 | mcr |= up->mcr; | 469 | up->mcr = serial_in(up, UART_MCR); |
470 | serial_out(up, UART_MCR, mcr); | 470 | up->mcr |= mcr; |
471 | serial_out(up, UART_MCR, up->mcr); | ||
471 | pm_runtime_put(&up->pdev->dev); | 472 | pm_runtime_put(&up->pdev->dev); |
472 | } | 473 | } |
473 | 474 | ||
@@ -616,8 +617,6 @@ static inline void | |||
616 | serial_omap_configure_xonxoff | 617 | serial_omap_configure_xonxoff |
617 | (struct uart_omap_port *up, struct ktermios *termios) | 618 | (struct uart_omap_port *up, struct ktermios *termios) |
618 | { | 619 | { |
619 | unsigned char efr = 0; | ||
620 | |||
621 | up->lcr = serial_in(up, UART_LCR); | 620 | up->lcr = serial_in(up, UART_LCR); |
622 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); | 621 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
623 | up->efr = serial_in(up, UART_EFR); | 622 | up->efr = serial_in(up, UART_EFR); |
@@ -627,8 +626,7 @@ serial_omap_configure_xonxoff | |||
627 | serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); | 626 | serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); |
628 | 627 | ||
629 | /* clear SW control mode bits */ | 628 | /* clear SW control mode bits */ |
630 | efr = up->efr; | 629 | up->efr &= OMAP_UART_SW_CLR; |
631 | efr &= OMAP_UART_SW_CLR; | ||
632 | 630 | ||
633 | /* | 631 | /* |
634 | * IXON Flag: | 632 | * IXON Flag: |
@@ -636,7 +634,7 @@ serial_omap_configure_xonxoff | |||
636 | * Transmit XON1, XOFF1 | 634 | * Transmit XON1, XOFF1 |
637 | */ | 635 | */ |
638 | if (termios->c_iflag & IXON) | 636 | if (termios->c_iflag & IXON) |
639 | efr |= OMAP_UART_SW_TX; | 637 | up->efr |= OMAP_UART_SW_TX; |
640 | 638 | ||
641 | /* | 639 | /* |
642 | * IXOFF Flag: | 640 | * IXOFF Flag: |
@@ -644,7 +642,7 @@ serial_omap_configure_xonxoff | |||
644 | * Receiver compares XON1, XOFF1. | 642 | * Receiver compares XON1, XOFF1. |
645 | */ | 643 | */ |
646 | if (termios->c_iflag & IXOFF) | 644 | if (termios->c_iflag & IXOFF) |
647 | efr |= OMAP_UART_SW_RX; | 645 | up->efr |= OMAP_UART_SW_RX; |
648 | 646 | ||
649 | serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); | 647 | serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); |
650 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); | 648 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); |
@@ -667,7 +665,7 @@ serial_omap_configure_xonxoff | |||
667 | * load the new software flow control mode IXON or IXOFF | 665 | * load the new software flow control mode IXON or IXOFF |
668 | * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. | 666 | * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. |
669 | */ | 667 | */ |
670 | serial_out(up, UART_EFR, efr | UART_EFR_SCD); | 668 | serial_out(up, UART_EFR, up->efr | UART_EFR_SCD); |
671 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); | 669 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); |
672 | 670 | ||
673 | serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); | 671 | serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); |
@@ -714,6 +712,10 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
714 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); | 712 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); |
715 | quot = serial_omap_get_divisor(port, baud); | 713 | quot = serial_omap_get_divisor(port, baud); |
716 | 714 | ||
715 | up->dll = quot & 0xff; | ||
716 | up->dlh = quot >> 8; | ||
717 | up->mdr1 = UART_OMAP_MDR1_DISABLE; | ||
718 | |||
717 | up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | | 719 | up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | |
718 | UART_FCR_ENABLE_FIFO; | 720 | UART_FCR_ENABLE_FIFO; |
719 | if (up->use_dma) | 721 | if (up->use_dma) |
@@ -767,6 +769,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
767 | up->ier |= UART_IER_MSI; | 769 | up->ier |= UART_IER_MSI; |
768 | serial_out(up, UART_IER, up->ier); | 770 | serial_out(up, UART_IER, up->ier); |
769 | serial_out(up, UART_LCR, cval); /* reset DLAB */ | 771 | serial_out(up, UART_LCR, cval); /* reset DLAB */ |
772 | up->lcr = cval; | ||
770 | 773 | ||
771 | /* FIFOs and DMA Settings */ | 774 | /* FIFOs and DMA Settings */ |
772 | 775 | ||
@@ -793,17 +796,18 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
793 | 796 | ||
794 | if (up->use_dma) { | 797 | if (up->use_dma) { |
795 | serial_out(up, UART_TI752_TLR, 0); | 798 | serial_out(up, UART_TI752_TLR, 0); |
796 | serial_out(up, UART_OMAP_SCR, | 799 | up->scr |= (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8); |
797 | (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8)); | ||
798 | } | 800 | } |
799 | 801 | ||
802 | serial_out(up, UART_OMAP_SCR, up->scr); | ||
803 | |||
800 | serial_out(up, UART_EFR, up->efr); | 804 | serial_out(up, UART_EFR, up->efr); |
801 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); | 805 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); |
802 | serial_out(up, UART_MCR, up->mcr); | 806 | serial_out(up, UART_MCR, up->mcr); |
803 | 807 | ||
804 | /* Protocol, Baud Rate, and Interrupt Settings */ | 808 | /* Protocol, Baud Rate, and Interrupt Settings */ |
805 | 809 | ||
806 | serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); | 810 | serial_out(up, UART_OMAP_MDR1, up->mdr1); |
807 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); | 811 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
808 | 812 | ||
809 | up->efr = serial_in(up, UART_EFR); | 813 | up->efr = serial_in(up, UART_EFR); |
@@ -813,8 +817,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
813 | serial_out(up, UART_IER, 0); | 817 | serial_out(up, UART_IER, 0); |
814 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); | 818 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
815 | 819 | ||
816 | serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ | 820 | serial_out(up, UART_DLL, up->dll); /* LS of divisor */ |
817 | serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ | 821 | serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ |
818 | 822 | ||
819 | serial_out(up, UART_LCR, 0); | 823 | serial_out(up, UART_LCR, 0); |
820 | serial_out(up, UART_IER, up->ier); | 824 | serial_out(up, UART_IER, up->ier); |
@@ -824,9 +828,11 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
824 | serial_out(up, UART_LCR, cval); | 828 | serial_out(up, UART_LCR, cval); |
825 | 829 | ||
826 | if (baud > 230400 && baud != 3000000) | 830 | if (baud > 230400 && baud != 3000000) |
827 | serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE); | 831 | up->mdr1 = UART_OMAP_MDR1_13X_MODE; |
828 | else | 832 | else |
829 | serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE); | 833 | up->mdr1 = UART_OMAP_MDR1_16X_MODE; |
834 | |||
835 | serial_out(up, UART_OMAP_MDR1, up->mdr1); | ||
830 | 836 | ||
831 | /* Hardware Flow Control Configuration */ | 837 | /* Hardware Flow Control Configuration */ |
832 | 838 | ||
@@ -1416,15 +1422,18 @@ static void serial_omap_restore_context(struct uart_omap_port *up) | |||
1416 | serial_out(up, UART_LCR, 0x0); /* Operational mode */ | 1422 | serial_out(up, UART_LCR, 0x0); /* Operational mode */ |
1417 | serial_out(up, UART_IER, 0x0); | 1423 | serial_out(up, UART_IER, 0x0); |
1418 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ | 1424 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ |
1425 | serial_out(up, UART_DLL, up->dll); | ||
1426 | serial_out(up, UART_DLM, up->dlh); | ||
1419 | serial_out(up, UART_LCR, 0x0); /* Operational mode */ | 1427 | serial_out(up, UART_LCR, 0x0); /* Operational mode */ |
1420 | serial_out(up, UART_IER, up->ier); | 1428 | serial_out(up, UART_IER, up->ier); |
1421 | serial_out(up, UART_FCR, up->fcr); | 1429 | serial_out(up, UART_FCR, up->fcr); |
1422 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); | 1430 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); |
1423 | serial_out(up, UART_MCR, up->mcr); | 1431 | serial_out(up, UART_MCR, up->mcr); |
1424 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ | 1432 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ |
1433 | serial_out(up, UART_OMAP_SCR, up->scr); | ||
1425 | serial_out(up, UART_EFR, up->efr); | 1434 | serial_out(up, UART_EFR, up->efr); |
1426 | serial_out(up, UART_LCR, up->lcr); | 1435 | serial_out(up, UART_LCR, up->lcr); |
1427 | serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE); | 1436 | serial_out(up, UART_OMAP_MDR1, up->mdr1); |
1428 | } | 1437 | } |
1429 | 1438 | ||
1430 | #ifdef CONFIG_PM_RUNTIME | 1439 | #ifdef CONFIG_PM_RUNTIME |