diff options
author | Magnus Damm <damm@opensource.se> | 2012-05-02 08:47:00 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-05-02 17:06:19 -0400 |
commit | 6b4160313c239d61c3907b2aaaeeec156911c9d1 (patch) | |
tree | 7ab348eb327d3e3cae4304a5e75a3a0d3ca9cf35 /drivers/tty/serial/8250 | |
parent | cc419fa0d38c425e4ea7bffeed931b07b0a3e461 (diff) |
serial8250: Use dl_read()/dl_write() on Alchemy
Convert the 8250 Alchemy support code to make
use of the new dl_read()/dl_write() callbacks.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/8250')
-rw-r--r-- | drivers/tty/serial/8250/8250.c | 67 |
1 files changed, 26 insertions, 41 deletions
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c index 590ee85150bf..2d62c89195e9 100644 --- a/drivers/tty/serial/8250/8250.c +++ b/drivers/tty/serial/8250/8250.c | |||
@@ -297,24 +297,7 @@ static void default_dl_write(struct uart_8250_port *up, int value) | |||
297 | serial_out(up, UART_DLM, value >> 8 & 0xff); | 297 | serial_out(up, UART_DLM, value >> 8 & 0xff); |
298 | } | 298 | } |
299 | 299 | ||
300 | #if defined(CONFIG_MIPS_ALCHEMY) | 300 | #if defined(CONFIG_SERIAL_8250_RM9K) |
301 | /* Au1x00 haven't got a standard divisor latch */ | ||
302 | static int _serial_dl_read(struct uart_8250_port *up) | ||
303 | { | ||
304 | if (up->port.iotype == UPIO_AU) | ||
305 | return __raw_readl(up->port.membase + 0x28); | ||
306 | else | ||
307 | return default_dl_read(up); | ||
308 | } | ||
309 | |||
310 | static void _serial_dl_write(struct uart_8250_port *up, int value) | ||
311 | { | ||
312 | if (up->port.iotype == UPIO_AU) | ||
313 | __raw_writel(value, up->port.membase + 0x28); | ||
314 | else | ||
315 | default_dl_write(up, value); | ||
316 | } | ||
317 | #elif defined(CONFIG_SERIAL_8250_RM9K) | ||
318 | static int _serial_dl_read(struct uart_8250_port *up) | 301 | static int _serial_dl_read(struct uart_8250_port *up) |
319 | { | 302 | { |
320 | return (up->port.iotype == UPIO_RM9000) ? | 303 | return (up->port.iotype == UPIO_RM9000) ? |
@@ -344,7 +327,7 @@ static void _serial_dl_write(struct uart_8250_port *up, int value) | |||
344 | } | 327 | } |
345 | #endif | 328 | #endif |
346 | 329 | ||
347 | #if defined(CONFIG_MIPS_ALCHEMY) | 330 | #ifdef CONFIG_MIPS_ALCHEMY |
348 | 331 | ||
349 | /* Au1x00 UART hardware has a weird register layout */ | 332 | /* Au1x00 UART hardware has a weird register layout */ |
350 | static const u8 au_io_in_map[] = { | 333 | static const u8 au_io_in_map[] = { |
@@ -365,22 +348,32 @@ static const u8 au_io_out_map[] = { | |||
365 | [UART_MCR] = 6, | 348 | [UART_MCR] = 6, |
366 | }; | 349 | }; |
367 | 350 | ||
368 | /* sane hardware needs no mapping */ | 351 | static unsigned int au_serial_in(struct uart_port *p, int offset) |
369 | static inline int map_8250_in_reg(struct uart_port *p, int offset) | ||
370 | { | 352 | { |
371 | if (p->iotype != UPIO_AU) | 353 | offset = au_io_in_map[offset] << p->regshift; |
372 | return offset; | 354 | return __raw_readl(p->membase + offset); |
373 | return au_io_in_map[offset]; | ||
374 | } | 355 | } |
375 | 356 | ||
376 | static inline int map_8250_out_reg(struct uart_port *p, int offset) | 357 | static void au_serial_out(struct uart_port *p, int offset, int value) |
377 | { | 358 | { |
378 | if (p->iotype != UPIO_AU) | 359 | offset = au_io_out_map[offset] << p->regshift; |
379 | return offset; | 360 | __raw_writel(value, p->membase + offset); |
380 | return au_io_out_map[offset]; | 361 | } |
362 | |||
363 | /* Au1x00 haven't got a standard divisor latch */ | ||
364 | static int au_serial_dl_read(struct uart_8250_port *up) | ||
365 | { | ||
366 | return __raw_readl(up->port.membase + 0x28); | ||
381 | } | 367 | } |
382 | 368 | ||
383 | #elif defined(CONFIG_SERIAL_8250_RM9K) | 369 | static void au_serial_dl_write(struct uart_8250_port *up, int value) |
370 | { | ||
371 | __raw_writel(value, up->port.membase + 0x28); | ||
372 | } | ||
373 | |||
374 | #endif | ||
375 | |||
376 | #if defined(CONFIG_SERIAL_8250_RM9K) | ||
384 | 377 | ||
385 | static const u8 | 378 | static const u8 |
386 | regmap_in[8] = { | 379 | regmap_in[8] = { |
@@ -464,18 +457,6 @@ static unsigned int mem32_serial_in(struct uart_port *p, int offset) | |||
464 | return readl(p->membase + offset); | 457 | return readl(p->membase + offset); |
465 | } | 458 | } |
466 | 459 | ||
467 | static unsigned int au_serial_in(struct uart_port *p, int offset) | ||
468 | { | ||
469 | offset = map_8250_in_reg(p, offset) << p->regshift; | ||
470 | return __raw_readl(p->membase + offset); | ||
471 | } | ||
472 | |||
473 | static void au_serial_out(struct uart_port *p, int offset, int value) | ||
474 | { | ||
475 | offset = map_8250_out_reg(p, offset) << p->regshift; | ||
476 | __raw_writel(value, p->membase + offset); | ||
477 | } | ||
478 | |||
479 | static unsigned int io_serial_in(struct uart_port *p, int offset) | 460 | static unsigned int io_serial_in(struct uart_port *p, int offset) |
480 | { | 461 | { |
481 | offset = map_8250_in_reg(p, offset) << p->regshift; | 462 | offset = map_8250_in_reg(p, offset) << p->regshift; |
@@ -515,10 +496,14 @@ static void set_io_from_upio(struct uart_port *p) | |||
515 | p->serial_out = mem32_serial_out; | 496 | p->serial_out = mem32_serial_out; |
516 | break; | 497 | break; |
517 | 498 | ||
499 | #ifdef CONFIG_MIPS_ALCHEMY | ||
518 | case UPIO_AU: | 500 | case UPIO_AU: |
519 | p->serial_in = au_serial_in; | 501 | p->serial_in = au_serial_in; |
520 | p->serial_out = au_serial_out; | 502 | p->serial_out = au_serial_out; |
503 | up->dl_read = au_serial_dl_read; | ||
504 | up->dl_write = au_serial_dl_write; | ||
521 | break; | 505 | break; |
506 | #endif | ||
522 | 507 | ||
523 | default: | 508 | default: |
524 | p->serial_in = io_serial_in; | 509 | p->serial_in = io_serial_in; |