diff options
author | Lukasz Majewski <l.majewski@samsung.com> | 2015-01-23 07:10:08 -0500 |
---|---|---|
committer | Eduardo Valentin <edubezval@gmail.com> | 2015-01-24 16:39:32 -0500 |
commit | 3b6a1a805f342472a0e68e2a0eb1decaadf7fa02 (patch) | |
tree | c0b614566c843b5339a0485c1b253589c6e4f029 /drivers/thermal | |
parent | d29f0a10955bb1c5564e186202047cadd52ba3f2 (diff) |
thermal: samsung: core: Exynos TMU rework to use device tree for configuration
This patch brings support for providing configuration via device tree.
Previously this data has been hardcoded in the exynos_tmu_data.c file.
Such approach was not scalable and very often required copying the whole
data.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal')
-rw-r--r-- | drivers/thermal/samsung/Makefile | 2 | ||||
-rw-r--r-- | drivers/thermal/samsung/exynos_tmu.c | 339 | ||||
-rw-r--r-- | drivers/thermal/samsung/exynos_tmu.h | 61 |
3 files changed, 220 insertions, 182 deletions
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile index c09d83095dc2..1e47d0d89ce0 100644 --- a/drivers/thermal/samsung/Makefile +++ b/drivers/thermal/samsung/Makefile | |||
@@ -3,5 +3,3 @@ | |||
3 | # | 3 | # |
4 | obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o | 4 | obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o |
5 | exynos_thermal-y := exynos_tmu.o | 5 | exynos_thermal-y := exynos_tmu.o |
6 | exynos_thermal-y += exynos_tmu_data.o | ||
7 | exynos_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o | ||
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index ae30f6af05e0..864eec8f5164 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c | |||
@@ -1,6 +1,10 @@ | |||
1 | /* | 1 | /* |
2 | * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit) | 2 | * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit) |
3 | * | 3 | * |
4 | * Copyright (C) 2014 Samsung Electronics | ||
5 | * Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | ||
6 | * Lukasz Majewski <l.majewski@samsung.com> | ||
7 | * | ||
4 | * Copyright (C) 2011 Samsung Electronics | 8 | * Copyright (C) 2011 Samsung Electronics |
5 | * Donggeun Kim <dg77.kim@samsung.com> | 9 | * Donggeun Kim <dg77.kim@samsung.com> |
6 | * Amit Daniel Kachhap <amit.kachhap@linaro.org> | 10 | * Amit Daniel Kachhap <amit.kachhap@linaro.org> |
@@ -31,8 +35,8 @@ | |||
31 | #include <linux/platform_device.h> | 35 | #include <linux/platform_device.h> |
32 | #include <linux/regulator/consumer.h> | 36 | #include <linux/regulator/consumer.h> |
33 | 37 | ||
34 | #include "exynos_thermal_common.h" | ||
35 | #include "exynos_tmu.h" | 38 | #include "exynos_tmu.h" |
39 | #include "../thermal_core.h" | ||
36 | 40 | ||
37 | /* Exynos generic registers */ | 41 | /* Exynos generic registers */ |
38 | #define EXYNOS_TMU_REG_TRIMINFO 0x0 | 42 | #define EXYNOS_TMU_REG_TRIMINFO 0x0 |
@@ -115,6 +119,7 @@ | |||
115 | #define EXYNOS5440_TMU_TH_RISE4_SHIFT 24 | 119 | #define EXYNOS5440_TMU_TH_RISE4_SHIFT 24 |
116 | #define EXYNOS5440_EFUSE_SWAP_OFFSET 8 | 120 | #define EXYNOS5440_EFUSE_SWAP_OFFSET 8 |
117 | 121 | ||
122 | #define MCELSIUS 1000 | ||
118 | /** | 123 | /** |
119 | * struct exynos_tmu_data : A structure to hold the private data of the TMU | 124 | * struct exynos_tmu_data : A structure to hold the private data of the TMU |
120 | driver | 125 | driver |
@@ -150,7 +155,8 @@ struct exynos_tmu_data { | |||
150 | struct clk *clk, *clk_sec; | 155 | struct clk *clk, *clk_sec; |
151 | u8 temp_error1, temp_error2; | 156 | u8 temp_error1, temp_error2; |
152 | struct regulator *regulator; | 157 | struct regulator *regulator; |
153 | struct thermal_sensor_conf *reg_conf; | 158 | struct thermal_zone_device *tzd; |
159 | |||
154 | int (*tmu_initialize)(struct platform_device *pdev); | 160 | int (*tmu_initialize)(struct platform_device *pdev); |
155 | void (*tmu_control)(struct platform_device *pdev, bool on); | 161 | void (*tmu_control)(struct platform_device *pdev, bool on); |
156 | int (*tmu_read)(struct exynos_tmu_data *data); | 162 | int (*tmu_read)(struct exynos_tmu_data *data); |
@@ -159,6 +165,33 @@ struct exynos_tmu_data { | |||
159 | void (*tmu_clear_irqs)(struct exynos_tmu_data *data); | 165 | void (*tmu_clear_irqs)(struct exynos_tmu_data *data); |
160 | }; | 166 | }; |
161 | 167 | ||
168 | static void exynos_report_trigger(struct exynos_tmu_data *p) | ||
169 | { | ||
170 | char data[10], *envp[] = { data, NULL }; | ||
171 | struct thermal_zone_device *tz = p->tzd; | ||
172 | unsigned long temp; | ||
173 | unsigned int i; | ||
174 | |||
175 | if (!p) { | ||
176 | pr_err("Wrong temperature configuration data\n"); | ||
177 | return; | ||
178 | } | ||
179 | |||
180 | thermal_zone_device_update(tz); | ||
181 | |||
182 | mutex_lock(&tz->lock); | ||
183 | /* Find the level for which trip happened */ | ||
184 | for (i = 0; i < of_thermal_get_ntrips(tz); i++) { | ||
185 | tz->ops->get_trip_temp(tz, i, &temp); | ||
186 | if (tz->last_temperature < temp) | ||
187 | break; | ||
188 | } | ||
189 | |||
190 | snprintf(data, sizeof(data), "%u", i); | ||
191 | kobject_uevent_env(&tz->device.kobj, KOBJ_CHANGE, envp); | ||
192 | mutex_unlock(&tz->lock); | ||
193 | } | ||
194 | |||
162 | /* | 195 | /* |
163 | * TMU treats temperature as a mapped temperature code. | 196 | * TMU treats temperature as a mapped temperature code. |
164 | * The temperature is converted differently depending on the calibration type. | 197 | * The temperature is converted differently depending on the calibration type. |
@@ -234,14 +267,25 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info) | |||
234 | 267 | ||
235 | static u32 get_th_reg(struct exynos_tmu_data *data, u32 threshold, bool falling) | 268 | static u32 get_th_reg(struct exynos_tmu_data *data, u32 threshold, bool falling) |
236 | { | 269 | { |
237 | struct exynos_tmu_platform_data *pdata = data->pdata; | 270 | struct thermal_zone_device *tz = data->tzd; |
271 | const struct thermal_trip * const trips = | ||
272 | of_thermal_get_trip_points(tz); | ||
273 | unsigned long temp; | ||
238 | int i; | 274 | int i; |
239 | 275 | ||
240 | for (i = 0; i < pdata->non_hw_trigger_levels; i++) { | 276 | if (!trips) { |
241 | u8 temp = pdata->trigger_levels[i]; | 277 | pr_err("%s: Cannot get trip points from of-thermal.c!\n", |
278 | __func__); | ||
279 | return 0; | ||
280 | } | ||
242 | 281 | ||
282 | for (i = 0; i < of_thermal_get_ntrips(tz); i++) { | ||
283 | if (trips[i].type == THERMAL_TRIP_CRITICAL) | ||
284 | continue; | ||
285 | |||
286 | temp = trips[i].temperature / MCELSIUS; | ||
243 | if (falling) | 287 | if (falling) |
244 | temp -= pdata->threshold_falling; | 288 | temp -= (trips[i].hysteresis / MCELSIUS); |
245 | else | 289 | else |
246 | threshold &= ~(0xff << 8 * i); | 290 | threshold &= ~(0xff << 8 * i); |
247 | 291 | ||
@@ -305,9 +349,19 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on) | |||
305 | static int exynos4210_tmu_initialize(struct platform_device *pdev) | 349 | static int exynos4210_tmu_initialize(struct platform_device *pdev) |
306 | { | 350 | { |
307 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); | 351 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); |
308 | struct exynos_tmu_platform_data *pdata = data->pdata; | 352 | struct thermal_zone_device *tz = data->tzd; |
309 | unsigned int status; | 353 | const struct thermal_trip * const trips = |
354 | of_thermal_get_trip_points(tz); | ||
310 | int ret = 0, threshold_code, i; | 355 | int ret = 0, threshold_code, i; |
356 | unsigned long reference, temp; | ||
357 | unsigned int status; | ||
358 | |||
359 | if (!trips) { | ||
360 | pr_err("%s: Cannot get trip points from of-thermal.c!\n", | ||
361 | __func__); | ||
362 | ret = -ENODEV; | ||
363 | goto out; | ||
364 | } | ||
311 | 365 | ||
312 | status = readb(data->base + EXYNOS_TMU_REG_STATUS); | 366 | status = readb(data->base + EXYNOS_TMU_REG_STATUS); |
313 | if (!status) { | 367 | if (!status) { |
@@ -318,12 +372,19 @@ static int exynos4210_tmu_initialize(struct platform_device *pdev) | |||
318 | sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO)); | 372 | sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO)); |
319 | 373 | ||
320 | /* Write temperature code for threshold */ | 374 | /* Write temperature code for threshold */ |
321 | threshold_code = temp_to_code(data, pdata->threshold); | 375 | reference = trips[0].temperature / MCELSIUS; |
376 | threshold_code = temp_to_code(data, reference); | ||
377 | if (threshold_code < 0) { | ||
378 | ret = threshold_code; | ||
379 | goto out; | ||
380 | } | ||
322 | writeb(threshold_code, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP); | 381 | writeb(threshold_code, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP); |
323 | 382 | ||
324 | for (i = 0; i < pdata->non_hw_trigger_levels; i++) | 383 | for (i = 0; i < of_thermal_get_ntrips(tz); i++) { |
325 | writeb(pdata->trigger_levels[i], data->base + | 384 | temp = trips[i].temperature / MCELSIUS; |
385 | writeb(temp - reference, data->base + | ||
326 | EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4); | 386 | EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4); |
387 | } | ||
327 | 388 | ||
328 | data->tmu_clear_irqs(data); | 389 | data->tmu_clear_irqs(data); |
329 | out: | 390 | out: |
@@ -333,9 +394,11 @@ out: | |||
333 | static int exynos4412_tmu_initialize(struct platform_device *pdev) | 394 | static int exynos4412_tmu_initialize(struct platform_device *pdev) |
334 | { | 395 | { |
335 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); | 396 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); |
336 | struct exynos_tmu_platform_data *pdata = data->pdata; | 397 | const struct thermal_trip * const trips = |
398 | of_thermal_get_trip_points(data->tzd); | ||
337 | unsigned int status, trim_info, con, ctrl, rising_threshold; | 399 | unsigned int status, trim_info, con, ctrl, rising_threshold; |
338 | int ret = 0, threshold_code, i; | 400 | int ret = 0, threshold_code, i; |
401 | unsigned long crit_temp = 0; | ||
339 | 402 | ||
340 | status = readb(data->base + EXYNOS_TMU_REG_STATUS); | 403 | status = readb(data->base + EXYNOS_TMU_REG_STATUS); |
341 | if (!status) { | 404 | if (!status) { |
@@ -373,17 +436,29 @@ static int exynos4412_tmu_initialize(struct platform_device *pdev) | |||
373 | data->tmu_clear_irqs(data); | 436 | data->tmu_clear_irqs(data); |
374 | 437 | ||
375 | /* if last threshold limit is also present */ | 438 | /* if last threshold limit is also present */ |
376 | i = pdata->max_trigger_level - 1; | 439 | for (i = 0; i < of_thermal_get_ntrips(data->tzd); i++) { |
377 | if (pdata->trigger_levels[i] && pdata->trigger_type[i] == HW_TRIP) { | 440 | if (trips[i].type == THERMAL_TRIP_CRITICAL) { |
378 | threshold_code = temp_to_code(data, pdata->trigger_levels[i]); | 441 | crit_temp = trips[i].temperature; |
379 | /* 1-4 level to be assigned in th0 reg */ | 442 | break; |
380 | rising_threshold &= ~(0xff << 8 * i); | 443 | } |
381 | rising_threshold |= threshold_code << 8 * i; | 444 | } |
382 | writel(rising_threshold, data->base + EXYNOS_THD_TEMP_RISE); | 445 | |
383 | con = readl(data->base + EXYNOS_TMU_REG_CONTROL); | 446 | if (i == of_thermal_get_ntrips(data->tzd)) { |
384 | con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); | 447 | pr_err("%s: No CRITICAL trip point defined at of-thermal.c!\n", |
385 | writel(con, data->base + EXYNOS_TMU_REG_CONTROL); | 448 | __func__); |
449 | ret = -EINVAL; | ||
450 | goto out; | ||
386 | } | 451 | } |
452 | |||
453 | threshold_code = temp_to_code(data, crit_temp / MCELSIUS); | ||
454 | /* 1-4 level to be assigned in th0 reg */ | ||
455 | rising_threshold &= ~(0xff << 8 * i); | ||
456 | rising_threshold |= threshold_code << 8 * i; | ||
457 | writel(rising_threshold, data->base + EXYNOS_THD_TEMP_RISE); | ||
458 | con = readl(data->base + EXYNOS_TMU_REG_CONTROL); | ||
459 | con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); | ||
460 | writel(con, data->base + EXYNOS_TMU_REG_CONTROL); | ||
461 | |||
387 | out: | 462 | out: |
388 | return ret; | 463 | return ret; |
389 | } | 464 | } |
@@ -391,9 +466,9 @@ out: | |||
391 | static int exynos5440_tmu_initialize(struct platform_device *pdev) | 466 | static int exynos5440_tmu_initialize(struct platform_device *pdev) |
392 | { | 467 | { |
393 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); | 468 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); |
394 | struct exynos_tmu_platform_data *pdata = data->pdata; | ||
395 | unsigned int trim_info = 0, con, rising_threshold; | 469 | unsigned int trim_info = 0, con, rising_threshold; |
396 | int ret = 0, threshold_code, i; | 470 | int ret = 0, threshold_code; |
471 | unsigned long crit_temp = 0; | ||
397 | 472 | ||
398 | /* | 473 | /* |
399 | * For exynos5440 soc triminfo value is swapped between TMU0 and | 474 | * For exynos5440 soc triminfo value is swapped between TMU0 and |
@@ -422,9 +497,8 @@ static int exynos5440_tmu_initialize(struct platform_device *pdev) | |||
422 | data->tmu_clear_irqs(data); | 497 | data->tmu_clear_irqs(data); |
423 | 498 | ||
424 | /* if last threshold limit is also present */ | 499 | /* if last threshold limit is also present */ |
425 | i = pdata->max_trigger_level - 1; | 500 | if (!data->tzd->ops->get_crit_temp(data->tzd, &crit_temp)) { |
426 | if (pdata->trigger_levels[i] && pdata->trigger_type[i] == HW_TRIP) { | 501 | threshold_code = temp_to_code(data, crit_temp / MCELSIUS); |
427 | threshold_code = temp_to_code(data, pdata->trigger_levels[i]); | ||
428 | /* 5th level to be assigned in th2 reg */ | 502 | /* 5th level to be assigned in th2 reg */ |
429 | rising_threshold = | 503 | rising_threshold = |
430 | threshold_code << EXYNOS5440_TMU_TH_RISE4_SHIFT; | 504 | threshold_code << EXYNOS5440_TMU_TH_RISE4_SHIFT; |
@@ -442,7 +516,7 @@ static int exynos5440_tmu_initialize(struct platform_device *pdev) | |||
442 | static void exynos4210_tmu_control(struct platform_device *pdev, bool on) | 516 | static void exynos4210_tmu_control(struct platform_device *pdev, bool on) |
443 | { | 517 | { |
444 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); | 518 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); |
445 | struct exynos_tmu_platform_data *pdata = data->pdata; | 519 | struct thermal_zone_device *tz = data->tzd; |
446 | unsigned int con, interrupt_en; | 520 | unsigned int con, interrupt_en; |
447 | 521 | ||
448 | con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL)); | 522 | con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL)); |
@@ -450,10 +524,15 @@ static void exynos4210_tmu_control(struct platform_device *pdev, bool on) | |||
450 | if (on) { | 524 | if (on) { |
451 | con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); | 525 | con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); |
452 | interrupt_en = | 526 | interrupt_en = |
453 | pdata->trigger_enable[3] << EXYNOS_TMU_INTEN_RISE3_SHIFT | | 527 | (of_thermal_is_trip_valid(tz, 3) |
454 | pdata->trigger_enable[2] << EXYNOS_TMU_INTEN_RISE2_SHIFT | | 528 | << EXYNOS_TMU_INTEN_RISE3_SHIFT) | |
455 | pdata->trigger_enable[1] << EXYNOS_TMU_INTEN_RISE1_SHIFT | | 529 | (of_thermal_is_trip_valid(tz, 2) |
456 | pdata->trigger_enable[0] << EXYNOS_TMU_INTEN_RISE0_SHIFT; | 530 | << EXYNOS_TMU_INTEN_RISE2_SHIFT) | |
531 | (of_thermal_is_trip_valid(tz, 1) | ||
532 | << EXYNOS_TMU_INTEN_RISE1_SHIFT) | | ||
533 | (of_thermal_is_trip_valid(tz, 0) | ||
534 | << EXYNOS_TMU_INTEN_RISE0_SHIFT); | ||
535 | |||
457 | if (data->soc != SOC_ARCH_EXYNOS4210) | 536 | if (data->soc != SOC_ARCH_EXYNOS4210) |
458 | interrupt_en |= | 537 | interrupt_en |= |
459 | interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; | 538 | interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; |
@@ -468,7 +547,7 @@ static void exynos4210_tmu_control(struct platform_device *pdev, bool on) | |||
468 | static void exynos5440_tmu_control(struct platform_device *pdev, bool on) | 547 | static void exynos5440_tmu_control(struct platform_device *pdev, bool on) |
469 | { | 548 | { |
470 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); | 549 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); |
471 | struct exynos_tmu_platform_data *pdata = data->pdata; | 550 | struct thermal_zone_device *tz = data->tzd; |
472 | unsigned int con, interrupt_en; | 551 | unsigned int con, interrupt_en; |
473 | 552 | ||
474 | con = get_con_reg(data, readl(data->base + EXYNOS5440_TMU_S0_7_CTRL)); | 553 | con = get_con_reg(data, readl(data->base + EXYNOS5440_TMU_S0_7_CTRL)); |
@@ -476,11 +555,16 @@ static void exynos5440_tmu_control(struct platform_device *pdev, bool on) | |||
476 | if (on) { | 555 | if (on) { |
477 | con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); | 556 | con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); |
478 | interrupt_en = | 557 | interrupt_en = |
479 | pdata->trigger_enable[3] << EXYNOS5440_TMU_INTEN_RISE3_SHIFT | | 558 | (of_thermal_is_trip_valid(tz, 3) |
480 | pdata->trigger_enable[2] << EXYNOS5440_TMU_INTEN_RISE2_SHIFT | | 559 | << EXYNOS5440_TMU_INTEN_RISE3_SHIFT) | |
481 | pdata->trigger_enable[1] << EXYNOS5440_TMU_INTEN_RISE1_SHIFT | | 560 | (of_thermal_is_trip_valid(tz, 2) |
482 | pdata->trigger_enable[0] << EXYNOS5440_TMU_INTEN_RISE0_SHIFT; | 561 | << EXYNOS5440_TMU_INTEN_RISE2_SHIFT) | |
483 | interrupt_en |= interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT; | 562 | (of_thermal_is_trip_valid(tz, 1) |
563 | << EXYNOS5440_TMU_INTEN_RISE1_SHIFT) | | ||
564 | (of_thermal_is_trip_valid(tz, 0) | ||
565 | << EXYNOS5440_TMU_INTEN_RISE0_SHIFT); | ||
566 | interrupt_en |= | ||
567 | interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT; | ||
484 | } else { | 568 | } else { |
485 | con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); | 569 | con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); |
486 | interrupt_en = 0; /* Disable all interrupts */ | 570 | interrupt_en = 0; /* Disable all interrupts */ |
@@ -489,19 +573,22 @@ static void exynos5440_tmu_control(struct platform_device *pdev, bool on) | |||
489 | writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL); | 573 | writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL); |
490 | } | 574 | } |
491 | 575 | ||
492 | static int exynos_tmu_read(struct exynos_tmu_data *data) | 576 | static int exynos_get_temp(void *p, long *temp) |
493 | { | 577 | { |
494 | int ret; | 578 | struct exynos_tmu_data *data = p; |
579 | |||
580 | if (!data) | ||
581 | return -EINVAL; | ||
495 | 582 | ||
496 | mutex_lock(&data->lock); | 583 | mutex_lock(&data->lock); |
497 | clk_enable(data->clk); | 584 | clk_enable(data->clk); |
498 | ret = data->tmu_read(data); | 585 | |
499 | if (ret >= 0) | 586 | *temp = code_to_temp(data, data->tmu_read(data)) * MCELSIUS; |
500 | ret = code_to_temp(data, ret); | 587 | |
501 | clk_disable(data->clk); | 588 | clk_disable(data->clk); |
502 | mutex_unlock(&data->lock); | 589 | mutex_unlock(&data->lock); |
503 | 590 | ||
504 | return ret; | 591 | return 0; |
505 | } | 592 | } |
506 | 593 | ||
507 | #ifdef CONFIG_THERMAL_EMULATION | 594 | #ifdef CONFIG_THERMAL_EMULATION |
@@ -613,7 +700,7 @@ static void exynos_tmu_work(struct work_struct *work) | |||
613 | if (!IS_ERR(data->clk_sec)) | 700 | if (!IS_ERR(data->clk_sec)) |
614 | clk_disable(data->clk_sec); | 701 | clk_disable(data->clk_sec); |
615 | 702 | ||
616 | exynos_report_trigger(data->reg_conf); | 703 | exynos_report_trigger(data); |
617 | mutex_lock(&data->lock); | 704 | mutex_lock(&data->lock); |
618 | clk_enable(data->clk); | 705 | clk_enable(data->clk); |
619 | 706 | ||
@@ -673,55 +760,89 @@ static irqreturn_t exynos_tmu_irq(int irq, void *id) | |||
673 | static const struct of_device_id exynos_tmu_match[] = { | 760 | static const struct of_device_id exynos_tmu_match[] = { |
674 | { | 761 | { |
675 | .compatible = "samsung,exynos3250-tmu", | 762 | .compatible = "samsung,exynos3250-tmu", |
676 | .data = &exynos3250_default_tmu_data, | ||
677 | }, | 763 | }, |
678 | { | 764 | { |
679 | .compatible = "samsung,exynos4210-tmu", | 765 | .compatible = "samsung,exynos4210-tmu", |
680 | .data = &exynos4210_default_tmu_data, | ||
681 | }, | 766 | }, |
682 | { | 767 | { |
683 | .compatible = "samsung,exynos4412-tmu", | 768 | .compatible = "samsung,exynos4412-tmu", |
684 | .data = &exynos4412_default_tmu_data, | ||
685 | }, | 769 | }, |
686 | { | 770 | { |
687 | .compatible = "samsung,exynos5250-tmu", | 771 | .compatible = "samsung,exynos5250-tmu", |
688 | .data = &exynos5250_default_tmu_data, | ||
689 | }, | 772 | }, |
690 | { | 773 | { |
691 | .compatible = "samsung,exynos5260-tmu", | 774 | .compatible = "samsung,exynos5260-tmu", |
692 | .data = &exynos5260_default_tmu_data, | ||
693 | }, | 775 | }, |
694 | { | 776 | { |
695 | .compatible = "samsung,exynos5420-tmu", | 777 | .compatible = "samsung,exynos5420-tmu", |
696 | .data = &exynos5420_default_tmu_data, | ||
697 | }, | 778 | }, |
698 | { | 779 | { |
699 | .compatible = "samsung,exynos5420-tmu-ext-triminfo", | 780 | .compatible = "samsung,exynos5420-tmu-ext-triminfo", |
700 | .data = &exynos5420_default_tmu_data, | ||
701 | }, | 781 | }, |
702 | { | 782 | { |
703 | .compatible = "samsung,exynos5440-tmu", | 783 | .compatible = "samsung,exynos5440-tmu", |
704 | .data = &exynos5440_default_tmu_data, | ||
705 | }, | 784 | }, |
706 | {}, | 785 | {}, |
707 | }; | 786 | }; |
708 | MODULE_DEVICE_TABLE(of, exynos_tmu_match); | 787 | MODULE_DEVICE_TABLE(of, exynos_tmu_match); |
709 | 788 | ||
710 | static inline struct exynos_tmu_platform_data *exynos_get_driver_data( | 789 | static int exynos_of_get_soc_type(struct device_node *np) |
711 | struct platform_device *pdev, int id) | ||
712 | { | 790 | { |
713 | struct exynos_tmu_init_data *data_table; | 791 | if (of_device_is_compatible(np, "samsung,exynos3250-tmu")) |
714 | struct exynos_tmu_platform_data *tmu_data; | 792 | return SOC_ARCH_EXYNOS3250; |
715 | const struct of_device_id *match; | 793 | else if (of_device_is_compatible(np, "samsung,exynos4210-tmu")) |
794 | return SOC_ARCH_EXYNOS4210; | ||
795 | else if (of_device_is_compatible(np, "samsung,exynos4412-tmu")) | ||
796 | return SOC_ARCH_EXYNOS4412; | ||
797 | else if (of_device_is_compatible(np, "samsung,exynos5250-tmu")) | ||
798 | return SOC_ARCH_EXYNOS5250; | ||
799 | else if (of_device_is_compatible(np, "samsung,exynos5260-tmu")) | ||
800 | return SOC_ARCH_EXYNOS5260; | ||
801 | else if (of_device_is_compatible(np, "samsung,exynos5420-tmu")) | ||
802 | return SOC_ARCH_EXYNOS5420; | ||
803 | else if (of_device_is_compatible(np, | ||
804 | "samsung,exynos5420-tmu-ext-triminfo")) | ||
805 | return SOC_ARCH_EXYNOS5420_TRIMINFO; | ||
806 | else if (of_device_is_compatible(np, "samsung,exynos5440-tmu")) | ||
807 | return SOC_ARCH_EXYNOS5440; | ||
808 | |||
809 | return -EINVAL; | ||
810 | } | ||
716 | 811 | ||
717 | match = of_match_node(exynos_tmu_match, pdev->dev.of_node); | 812 | static int exynos_of_sensor_conf(struct device_node *np, |
718 | if (!match) | 813 | struct exynos_tmu_platform_data *pdata) |
719 | return NULL; | 814 | { |
720 | data_table = (struct exynos_tmu_init_data *) match->data; | 815 | u32 value; |
721 | if (!data_table || id >= data_table->tmu_count) | 816 | int ret; |
722 | return NULL; | 817 | |
723 | tmu_data = data_table->tmu_data; | 818 | of_node_get(np); |
724 | return (struct exynos_tmu_platform_data *) (tmu_data + id); | 819 | |
820 | ret = of_property_read_u32(np, "samsung,tmu_gain", &value); | ||
821 | pdata->gain = (u8)value; | ||
822 | of_property_read_u32(np, "samsung,tmu_reference_voltage", &value); | ||
823 | pdata->reference_voltage = (u8)value; | ||
824 | of_property_read_u32(np, "samsung,tmu_noise_cancel_mode", &value); | ||
825 | pdata->noise_cancel_mode = (u8)value; | ||
826 | |||
827 | of_property_read_u32(np, "samsung,tmu_efuse_value", | ||
828 | &pdata->efuse_value); | ||
829 | of_property_read_u32(np, "samsung,tmu_min_efuse_value", | ||
830 | &pdata->min_efuse_value); | ||
831 | of_property_read_u32(np, "samsung,tmu_max_efuse_value", | ||
832 | &pdata->max_efuse_value); | ||
833 | |||
834 | of_property_read_u32(np, "samsung,tmu_first_point_trim", &value); | ||
835 | pdata->first_point_trim = (u8)value; | ||
836 | of_property_read_u32(np, "samsung,tmu_second_point_trim", &value); | ||
837 | pdata->second_point_trim = (u8)value; | ||
838 | of_property_read_u32(np, "samsung,tmu_default_temp_offset", &value); | ||
839 | pdata->default_temp_offset = (u8)value; | ||
840 | |||
841 | of_property_read_u32(np, "samsung,tmu_cal_type", &pdata->cal_type); | ||
842 | of_property_read_u32(np, "samsung,tmu_cal_mode", &pdata->cal_mode); | ||
843 | |||
844 | of_node_put(np); | ||
845 | return 0; | ||
725 | } | 846 | } |
726 | 847 | ||
727 | static int exynos_map_dt_data(struct platform_device *pdev) | 848 | static int exynos_map_dt_data(struct platform_device *pdev) |
@@ -771,14 +892,15 @@ static int exynos_map_dt_data(struct platform_device *pdev) | |||
771 | return -EADDRNOTAVAIL; | 892 | return -EADDRNOTAVAIL; |
772 | } | 893 | } |
773 | 894 | ||
774 | pdata = exynos_get_driver_data(pdev, data->id); | 895 | pdata = devm_kzalloc(&pdev->dev, |
775 | if (!pdata) { | 896 | sizeof(struct exynos_tmu_platform_data), |
776 | dev_err(&pdev->dev, "No platform init data supplied.\n"); | 897 | GFP_KERNEL); |
777 | return -ENODEV; | 898 | if (!pdata) |
778 | } | 899 | return -ENOMEM; |
779 | 900 | ||
901 | exynos_of_sensor_conf(pdev->dev.of_node, pdata); | ||
780 | data->pdata = pdata; | 902 | data->pdata = pdata; |
781 | data->soc = pdata->type; | 903 | data->soc = exynos_of_get_soc_type(pdev->dev.of_node); |
782 | 904 | ||
783 | switch (data->soc) { | 905 | switch (data->soc) { |
784 | case SOC_ARCH_EXYNOS4210: | 906 | case SOC_ARCH_EXYNOS4210: |
@@ -834,12 +956,16 @@ static int exynos_map_dt_data(struct platform_device *pdev) | |||
834 | return 0; | 956 | return 0; |
835 | } | 957 | } |
836 | 958 | ||
959 | static struct thermal_zone_of_device_ops exynos_sensor_ops = { | ||
960 | .get_temp = exynos_get_temp, | ||
961 | .set_emul_temp = exynos_tmu_set_emulation, | ||
962 | }; | ||
963 | |||
837 | static int exynos_tmu_probe(struct platform_device *pdev) | 964 | static int exynos_tmu_probe(struct platform_device *pdev) |
838 | { | 965 | { |
839 | struct exynos_tmu_data *data; | ||
840 | struct exynos_tmu_platform_data *pdata; | 966 | struct exynos_tmu_platform_data *pdata; |
841 | struct thermal_sensor_conf *sensor_conf; | 967 | struct exynos_tmu_data *data; |
842 | int ret, i; | 968 | int ret; |
843 | 969 | ||
844 | data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data), | 970 | data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data), |
845 | GFP_KERNEL); | 971 | GFP_KERNEL); |
@@ -849,9 +975,15 @@ static int exynos_tmu_probe(struct platform_device *pdev) | |||
849 | platform_set_drvdata(pdev, data); | 975 | platform_set_drvdata(pdev, data); |
850 | mutex_init(&data->lock); | 976 | mutex_init(&data->lock); |
851 | 977 | ||
978 | data->tzd = thermal_zone_of_sensor_register(&pdev->dev, 0, data, | ||
979 | &exynos_sensor_ops); | ||
980 | if (IS_ERR(data->tzd)) { | ||
981 | pr_err("thermal: tz: %p ERROR\n", data->tzd); | ||
982 | return PTR_ERR(data->tzd); | ||
983 | } | ||
852 | ret = exynos_map_dt_data(pdev); | 984 | ret = exynos_map_dt_data(pdev); |
853 | if (ret) | 985 | if (ret) |
854 | return ret; | 986 | goto err_sensor; |
855 | 987 | ||
856 | pdata = data->pdata; | 988 | pdata = data->pdata; |
857 | 989 | ||
@@ -860,20 +992,22 @@ static int exynos_tmu_probe(struct platform_device *pdev) | |||
860 | data->clk = devm_clk_get(&pdev->dev, "tmu_apbif"); | 992 | data->clk = devm_clk_get(&pdev->dev, "tmu_apbif"); |
861 | if (IS_ERR(data->clk)) { | 993 | if (IS_ERR(data->clk)) { |
862 | dev_err(&pdev->dev, "Failed to get clock\n"); | 994 | dev_err(&pdev->dev, "Failed to get clock\n"); |
863 | return PTR_ERR(data->clk); | 995 | ret = PTR_ERR(data->clk); |
996 | goto err_sensor; | ||
864 | } | 997 | } |
865 | 998 | ||
866 | data->clk_sec = devm_clk_get(&pdev->dev, "tmu_triminfo_apbif"); | 999 | data->clk_sec = devm_clk_get(&pdev->dev, "tmu_triminfo_apbif"); |
867 | if (IS_ERR(data->clk_sec)) { | 1000 | if (IS_ERR(data->clk_sec)) { |
868 | if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) { | 1001 | if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) { |
869 | dev_err(&pdev->dev, "Failed to get triminfo clock\n"); | 1002 | dev_err(&pdev->dev, "Failed to get triminfo clock\n"); |
870 | return PTR_ERR(data->clk_sec); | 1003 | ret = PTR_ERR(data->clk_sec); |
1004 | goto err_sensor; | ||
871 | } | 1005 | } |
872 | } else { | 1006 | } else { |
873 | ret = clk_prepare(data->clk_sec); | 1007 | ret = clk_prepare(data->clk_sec); |
874 | if (ret) { | 1008 | if (ret) { |
875 | dev_err(&pdev->dev, "Failed to get clock\n"); | 1009 | dev_err(&pdev->dev, "Failed to get clock\n"); |
876 | return ret; | 1010 | goto err_sensor; |
877 | } | 1011 | } |
878 | } | 1012 | } |
879 | 1013 | ||
@@ -889,45 +1023,6 @@ static int exynos_tmu_probe(struct platform_device *pdev) | |||
889 | goto err_clk; | 1023 | goto err_clk; |
890 | } | 1024 | } |
891 | 1025 | ||
892 | exynos_tmu_control(pdev, true); | ||
893 | |||
894 | /* Allocate a structure to register with the exynos core thermal */ | ||
895 | sensor_conf = devm_kzalloc(&pdev->dev, | ||
896 | sizeof(struct thermal_sensor_conf), GFP_KERNEL); | ||
897 | if (!sensor_conf) { | ||
898 | ret = -ENOMEM; | ||
899 | goto err_clk; | ||
900 | } | ||
901 | sprintf(sensor_conf->name, "therm_zone%d", data->id); | ||
902 | sensor_conf->read_temperature = (int (*)(void *))exynos_tmu_read; | ||
903 | sensor_conf->write_emul_temp = | ||
904 | (int (*)(void *, unsigned long))exynos_tmu_set_emulation; | ||
905 | sensor_conf->driver_data = data; | ||
906 | sensor_conf->trip_data.trip_count = pdata->trigger_enable[0] + | ||
907 | pdata->trigger_enable[1] + pdata->trigger_enable[2]+ | ||
908 | pdata->trigger_enable[3]; | ||
909 | |||
910 | for (i = 0; i < sensor_conf->trip_data.trip_count; i++) { | ||
911 | sensor_conf->trip_data.trip_val[i] = | ||
912 | pdata->threshold + pdata->trigger_levels[i]; | ||
913 | sensor_conf->trip_data.trip_type[i] = | ||
914 | pdata->trigger_type[i]; | ||
915 | } | ||
916 | |||
917 | sensor_conf->trip_data.trigger_falling = pdata->threshold_falling; | ||
918 | |||
919 | sensor_conf->dev = &pdev->dev; | ||
920 | /* Register the sensor with thermal management interface */ | ||
921 | ret = exynos_register_thermal(sensor_conf); | ||
922 | if (ret) { | ||
923 | if (ret != -EPROBE_DEFER) | ||
924 | dev_err(&pdev->dev, | ||
925 | "Failed to register thermal interface: %d\n", | ||
926 | ret); | ||
927 | goto err_clk; | ||
928 | } | ||
929 | data->reg_conf = sensor_conf; | ||
930 | |||
931 | ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq, | 1026 | ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq, |
932 | IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data); | 1027 | IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data); |
933 | if (ret) { | 1028 | if (ret) { |
@@ -935,21 +1030,25 @@ static int exynos_tmu_probe(struct platform_device *pdev) | |||
935 | goto err_clk; | 1030 | goto err_clk; |
936 | } | 1031 | } |
937 | 1032 | ||
1033 | exynos_tmu_control(pdev, true); | ||
938 | return 0; | 1034 | return 0; |
939 | err_clk: | 1035 | err_clk: |
940 | clk_unprepare(data->clk); | 1036 | clk_unprepare(data->clk); |
941 | err_clk_sec: | 1037 | err_clk_sec: |
942 | if (!IS_ERR(data->clk_sec)) | 1038 | if (!IS_ERR(data->clk_sec)) |
943 | clk_unprepare(data->clk_sec); | 1039 | clk_unprepare(data->clk_sec); |
1040 | err_sensor: | ||
1041 | thermal_zone_of_sensor_unregister(&pdev->dev, data->tzd); | ||
1042 | |||
944 | return ret; | 1043 | return ret; |
945 | } | 1044 | } |
946 | 1045 | ||
947 | static int exynos_tmu_remove(struct platform_device *pdev) | 1046 | static int exynos_tmu_remove(struct platform_device *pdev) |
948 | { | 1047 | { |
949 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); | 1048 | struct exynos_tmu_data *data = platform_get_drvdata(pdev); |
1049 | struct thermal_zone_device *tzd = data->tzd; | ||
950 | 1050 | ||
951 | exynos_unregister_thermal(data->reg_conf); | 1051 | thermal_zone_of_sensor_unregister(&pdev->dev, tzd); |
952 | |||
953 | exynos_tmu_control(pdev, false); | 1052 | exynos_tmu_control(pdev, false); |
954 | 1053 | ||
955 | clk_unprepare(data->clk); | 1054 | clk_unprepare(data->clk); |
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h index 627dec92ec1b..9f9b1b810269 100644 --- a/drivers/thermal/samsung/exynos_tmu.h +++ b/drivers/thermal/samsung/exynos_tmu.h | |||
@@ -23,8 +23,7 @@ | |||
23 | #ifndef _EXYNOS_TMU_H | 23 | #ifndef _EXYNOS_TMU_H |
24 | #define _EXYNOS_TMU_H | 24 | #define _EXYNOS_TMU_H |
25 | #include <linux/cpu_cooling.h> | 25 | #include <linux/cpu_cooling.h> |
26 | 26 | #include <dt-bindings/thermal/thermal_exynos.h> | |
27 | #include "exynos_thermal_common.h" | ||
28 | 27 | ||
29 | enum soc_type { | 28 | enum soc_type { |
30 | SOC_ARCH_EXYNOS3250 = 1, | 29 | SOC_ARCH_EXYNOS3250 = 1, |
@@ -36,38 +35,9 @@ enum soc_type { | |||
36 | SOC_ARCH_EXYNOS5420_TRIMINFO, | 35 | SOC_ARCH_EXYNOS5420_TRIMINFO, |
37 | SOC_ARCH_EXYNOS5440, | 36 | SOC_ARCH_EXYNOS5440, |
38 | }; | 37 | }; |
39 | #include <dt-bindings/thermal/thermal_exynos.h> | ||
40 | 38 | ||
41 | /** | 39 | /** |
42 | * struct exynos_tmu_platform_data | 40 | * struct exynos_tmu_platform_data |
43 | * @threshold: basic temperature for generating interrupt | ||
44 | * 25 <= threshold <= 125 [unit: degree Celsius] | ||
45 | * @threshold_falling: differntial value for setting threshold | ||
46 | * of temperature falling interrupt. | ||
47 | * @trigger_levels: array for each interrupt levels | ||
48 | * [unit: degree Celsius] | ||
49 | * 0: temperature for trigger_level0 interrupt | ||
50 | * condition for trigger_level0 interrupt: | ||
51 | * current temperature > threshold + trigger_levels[0] | ||
52 | * 1: temperature for trigger_level1 interrupt | ||
53 | * condition for trigger_level1 interrupt: | ||
54 | * current temperature > threshold + trigger_levels[1] | ||
55 | * 2: temperature for trigger_level2 interrupt | ||
56 | * condition for trigger_level2 interrupt: | ||
57 | * current temperature > threshold + trigger_levels[2] | ||
58 | * 3: temperature for trigger_level3 interrupt | ||
59 | * condition for trigger_level3 interrupt: | ||
60 | * current temperature > threshold + trigger_levels[3] | ||
61 | * @trigger_type: defines the type of trigger. Possible values are, | ||
62 | * THROTTLE_ACTIVE trigger type | ||
63 | * THROTTLE_PASSIVE trigger type | ||
64 | * SW_TRIP trigger type | ||
65 | * HW_TRIP | ||
66 | * @trigger_enable[]: array to denote which trigger levels are enabled. | ||
67 | * 1 = enable trigger_level[] interrupt, | ||
68 | * 0 = disable trigger_level[] interrupt | ||
69 | * @max_trigger_level: max trigger level supported by the TMU | ||
70 | * @non_hw_trigger_levels: number of defined non-hardware trigger levels | ||
71 | * @gain: gain of amplifier in the positive-TC generator block | 41 | * @gain: gain of amplifier in the positive-TC generator block |
72 | * 0 < gain <= 15 | 42 | * 0 < gain <= 15 |
73 | * @reference_voltage: reference voltage of amplifier | 43 | * @reference_voltage: reference voltage of amplifier |
@@ -79,21 +49,12 @@ enum soc_type { | |||
79 | * @efuse_value: platform defined fuse value | 49 | * @efuse_value: platform defined fuse value |
80 | * @min_efuse_value: minimum valid trimming data | 50 | * @min_efuse_value: minimum valid trimming data |
81 | * @max_efuse_value: maximum valid trimming data | 51 | * @max_efuse_value: maximum valid trimming data |
82 | * @first_point_trim: temp value of the first point trimming | ||
83 | * @second_point_trim: temp value of the second point trimming | ||
84 | * @default_temp_offset: default temperature offset in case of no trimming | 52 | * @default_temp_offset: default temperature offset in case of no trimming |
85 | * @cal_type: calibration type for temperature | 53 | * @cal_type: calibration type for temperature |
86 | * | 54 | * |
87 | * This structure is required for configuration of exynos_tmu driver. | 55 | * This structure is required for configuration of exynos_tmu driver. |
88 | */ | 56 | */ |
89 | struct exynos_tmu_platform_data { | 57 | struct exynos_tmu_platform_data { |
90 | u8 threshold; | ||
91 | u8 threshold_falling; | ||
92 | u8 trigger_levels[MAX_TRIP_COUNT]; | ||
93 | enum trigger_type trigger_type[MAX_TRIP_COUNT]; | ||
94 | bool trigger_enable[MAX_TRIP_COUNT]; | ||
95 | u8 max_trigger_level; | ||
96 | u8 non_hw_trigger_levels; | ||
97 | u8 gain; | 58 | u8 gain; |
98 | u8 reference_voltage; | 59 | u8 reference_voltage; |
99 | u8 noise_cancel_mode; | 60 | u8 noise_cancel_mode; |
@@ -110,24 +71,4 @@ struct exynos_tmu_platform_data { | |||
110 | u32 cal_mode; | 71 | u32 cal_mode; |
111 | }; | 72 | }; |
112 | 73 | ||
113 | /** | ||
114 | * struct exynos_tmu_init_data | ||
115 | * @tmu_count: number of TMU instances. | ||
116 | * @tmu_data: platform data of all TMU instances. | ||
117 | * This structure is required to store data for multi-instance exynos tmu | ||
118 | * driver. | ||
119 | */ | ||
120 | struct exynos_tmu_init_data { | ||
121 | int tmu_count; | ||
122 | struct exynos_tmu_platform_data tmu_data[]; | ||
123 | }; | ||
124 | |||
125 | extern struct exynos_tmu_init_data const exynos3250_default_tmu_data; | ||
126 | extern struct exynos_tmu_init_data const exynos4210_default_tmu_data; | ||
127 | extern struct exynos_tmu_init_data const exynos4412_default_tmu_data; | ||
128 | extern struct exynos_tmu_init_data const exynos5250_default_tmu_data; | ||
129 | extern struct exynos_tmu_init_data const exynos5260_default_tmu_data; | ||
130 | extern struct exynos_tmu_init_data const exynos5420_default_tmu_data; | ||
131 | extern struct exynos_tmu_init_data const exynos5440_default_tmu_data; | ||
132 | |||
133 | #endif /* _EXYNOS_TMU_H */ | 74 | #endif /* _EXYNOS_TMU_H */ |