diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2013-04-02 09:57:26 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2013-04-10 10:31:26 -0400 |
commit | 46fc4c909339f5a84d1679045297d9d2fb596987 (patch) | |
tree | 361fe36ee6dfe478112d10688d1bad7db49640bd /drivers/ssb | |
parent | 25b5632fb35ca61b8ae3eee235edcdc2883f7a5e (diff) |
ssb: implement spurious tone avoidance
And make use of it in b43. This fixes a regression introduced with
49d55cef5b1925a5c1efb6aaddaa40fc7c693335
b43: N-PHY: implement spurious tone avoidance
This commit made BCM4322 use only MCS 0 on channel 13, which of course
resulted in performance drop (down to 0.7Mb/s).
Reported-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb')
-rw-r--r-- | drivers/ssb/driver_chipcommon_pmu.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c index 4c0f6d883dd3..7b0bce936762 100644 --- a/drivers/ssb/driver_chipcommon_pmu.c +++ b/drivers/ssb/driver_chipcommon_pmu.c | |||
@@ -675,3 +675,32 @@ u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc) | |||
675 | return 0; | 675 | return 0; |
676 | } | 676 | } |
677 | } | 677 | } |
678 | |||
679 | void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid) | ||
680 | { | ||
681 | u32 pmu_ctl = 0; | ||
682 | |||
683 | switch (cc->dev->bus->chip_id) { | ||
684 | case 0x4322: | ||
685 | ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100070); | ||
686 | ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x1014140a); | ||
687 | ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888854); | ||
688 | if (spuravoid == 1) | ||
689 | ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05201828); | ||
690 | else | ||
691 | ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05001828); | ||
692 | pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD; | ||
693 | break; | ||
694 | case 43222: | ||
695 | /* TODO: BCM43222 requires updating PLLs too */ | ||
696 | return; | ||
697 | default: | ||
698 | ssb_printk(KERN_ERR PFX | ||
699 | "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n", | ||
700 | cc->dev->bus->chip_id); | ||
701 | return; | ||
702 | } | ||
703 | |||
704 | chipco_set32(cc, SSB_CHIPCO_PMU_CTL, pmu_ctl); | ||
705 | } | ||
706 | EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate); | ||