Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem

Conflicts:
	drivers/net/wireless/ath/ar9170/main.c
	drivers/net/wireless/ath/ar9170/phy.c
	drivers/net/wireless/zd1211rw/zd_rf_rf2959.c

2 files changed, 101 insertions, 5 deletions

diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index 0e8d35224614..1ba9f0ee6f94 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -15,6 +15,11 @@
 
 #include "ssb_private.h"
 
+static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address);
+static void ssb_pcie_write(struct ssb_pcicore *pc, u32 address, u32 data);
+static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address);
+static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
+                                u8 address, u16 data);
 
 static inline
 u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset)
@@ -403,6 +408,27 @@ static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
 }
 #endif /* CONFIG_SSB_PCICORE_HOSTMODE */
 
+/**************************************************
+ * Workarounds.
+ **************************************************/
+
+static u8 ssb_pcicore_polarity_workaround(struct ssb_pcicore *pc)
+{
+        return (ssb_pcie_read(pc, 0x204) & 0x10) ? 0xC0 : 0x80;
+}
+
+static void ssb_pcicore_serdes_workaround(struct ssb_pcicore *pc)
+{
+        const u8 serdes_pll_device = 0x1D;
+        const u8 serdes_rx_device = 0x1F;
+        u16 tmp;
+
+        ssb_pcie_mdio_write(pc, serdes_rx_device, 1 /* Control */,
+                            ssb_pcicore_polarity_workaround(pc));
+        tmp = ssb_pcie_mdio_read(pc, serdes_pll_device, 1 /* Control */);
+        if (tmp & 0x4000)
+                ssb_pcie_mdio_write(pc, serdes_pll_device, 1, tmp & ~0x4000);
+}
 
 /**************************************************
  * Generic and Clientmode operation code.
@@ -417,11 +443,9 @@ static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
 void ssb_pcicore_init(struct ssb_pcicore *pc)
 {
         struct ssb_device *dev = pc->dev;
-        struct ssb_bus *bus;
 
         if (!dev)
                 return;
-        bus = dev->bus;
         if (!ssb_device_is_enabled(dev))
                 ssb_device_enable(dev, 0);
 
@@ -432,6 +456,8 @@ void ssb_pcicore_init(struct ssb_pcicore *pc)
 #endif /* CONFIG_SSB_PCICORE_HOSTMODE */
         if (!pc->hostmode)
                 ssb_pcicore_init_clientmode(pc);
+
+        ssb_pcicore_serdes_workaround(pc);
 }
 
 static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address)
@@ -446,11 +472,75 @@ static void ssb_pcie_write(struct ssb_pcicore *pc, u32 address, u32 data)
         pcicore_write32(pc, 0x134, data);
 }
 
+static void ssb_pcie_mdio_set_phy(struct ssb_pcicore *pc, u8 phy)
+{
+        const u16 mdio_control = 0x128;
+        const u16 mdio_data = 0x12C;
+        u32 v;
+        int i;
+
+        v = (1 << 30); /* Start of Transaction */
+        v |= (1 << 28); /* Write Transaction */
+        v |= (1 << 17); /* Turnaround */
+        v |= (0x1F << 18);
+        v |= (phy << 4);
+        pcicore_write32(pc, mdio_data, v);
+
+        udelay(10);
+        for (i = 0; i < 200; i++) {
+                v = pcicore_read32(pc, mdio_control);
+                if (v & 0x100 /* Trans complete */)
+                        break;
+                msleep(1);
+        }
+}
+
+static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address)
+{
+        const u16 mdio_control = 0x128;
+        const u16 mdio_data = 0x12C;
+        int max_retries = 10;
+        u16 ret = 0;
+        u32 v;
+        int i;
+
+        v = 0x80; /* Enable Preamble Sequence */
+        v |= 0x2; /* MDIO Clock Divisor */
+        pcicore_write32(pc, mdio_control, v);
+
+        if (pc->dev->id.revision >= 10) {
+                max_retries = 200;
+                ssb_pcie_mdio_set_phy(pc, device);
+        }
+
+        v = (1 << 30); /* Start of Transaction */
+        v |= (1 << 29); /* Read Transaction */
+        v |= (1 << 17); /* Turnaround */
+        if (pc->dev->id.revision < 10)
+                v |= (u32)device << 22;
+        v |= (u32)address << 18;
+        pcicore_write32(pc, mdio_data, v);
+        /* Wait for the device to complete the transaction */
+        udelay(10);
+        for (i = 0; i < 200; i++) {
+                v = pcicore_read32(pc, mdio_control);
+                if (v & 0x100 /* Trans complete */) {
+                        udelay(10);
+                        ret = pcicore_read32(pc, mdio_data);
+                        break;
+                }
+                msleep(1);
+        }
+        pcicore_write32(pc, mdio_control, 0);
+        return ret;
+}
+
 static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
                                 u8 address, u16 data)
 {
         const u16 mdio_control = 0x128;
         const u16 mdio_data = 0x12C;
+        int max_retries = 10;
         u32 v;
         int i;
 
@@ -458,16 +548,22 @@ static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
         v |= 0x2; /* MDIO Clock Divisor */
         pcicore_write32(pc, mdio_control, v);
 
+        if (pc->dev->id.revision >= 10) {
+                max_retries = 200;
+                ssb_pcie_mdio_set_phy(pc, device);
+        }
+
         v = (1 << 30); /* Start of Transaction */
         v |= (1 << 28); /* Write Transaction */
         v |= (1 << 17); /* Turnaround */
-        v |= (u32)device << 22;
+        if (pc->dev->id.revision < 10)
+                v |= (u32)device << 22;
         v |= (u32)address << 18;
         v |= data;
         pcicore_write32(pc, mdio_data, v);
         /* Wait for the device to complete the transaction */
         udelay(10);
-        for (i = 0; i < 10; i++) {
+        for (i = 0; i < max_retries; i++) {
                 v = pcicore_read32(pc, mdio_control);
                 if (v & 0x100 /* Trans complete */)
                         break;
diff --git a/drivers/ssb/scan.c b/drivers/ssb/scan.c
index 29884c00c4d5..7dca719fbcfb 100644
--- a/drivers/ssb/scan.c
+++ b/drivers/ssb/scan.c
@@ -307,7 +307,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
         } else {
                 if (bus->bustype == SSB_BUSTYPE_PCI) {
                         bus->chip_id = pcidev_to_chipid(bus->host_pci);
-                        pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
+                        pci_read_config_byte(bus->host_pci, PCI_REVISION_ID,
                                              &bus->chip_rev);
                         bus->chip_package = 0;
                 } else {