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authorMichael Buesch <mb@bu3sch.de>2008-02-16 12:13:36 -0500
committerJohn W. Linville <linville@tuxdriver.com>2008-02-20 20:11:55 -0500
commitfc71acc846c577473ada72a46c5ea9c935eca086 (patch)
treeaa867b9fdc1f9dcaaf8186c84e101587d67481ce /drivers/ssb
parent5078ed50712aa3df1099540b524d01075aee653f (diff)
ssb: Fix support for PCI devices behind a SSB->PCI bridge
We must pin all resources and make sure the PCI subsystem won't relocate us, as the addresses are hardwired into hardware. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb')
-rw-r--r--drivers/ssb/driver_pcicore.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index 059452fbb168..6d99a9880055 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -79,6 +79,7 @@ int pcibios_plat_dev_init(struct pci_dev *d)
79 base = &ssb_pcicore_pcibus_iobase; 79 base = &ssb_pcicore_pcibus_iobase;
80 else 80 else
81 base = &ssb_pcicore_pcibus_membase; 81 base = &ssb_pcicore_pcibus_membase;
82 res->flags |= IORESOURCE_PCI_FIXED;
82 if (res->end) { 83 if (res->end) {
83 size = res->end - res->start + 1; 84 size = res->end - res->start + 1;
84 if (*base & (size - 1)) 85 if (*base & (size - 1))
@@ -101,10 +102,12 @@ int pcibios_plat_dev_init(struct pci_dev *d)
101 102
102static void __init ssb_fixup_pcibridge(struct pci_dev *dev) 103static void __init ssb_fixup_pcibridge(struct pci_dev *dev)
103{ 104{
105 u8 lat;
106
104 if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0) 107 if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0)
105 return; 108 return;
106 109
107 ssb_printk(KERN_INFO "PCI: fixing up bridge\n"); 110 ssb_printk(KERN_INFO "PCI: Fixing up bridge %s\n", pci_name(dev));
108 111
109 /* Enable PCI bridge bus mastering and memory space */ 112 /* Enable PCI bridge bus mastering and memory space */
110 pci_set_master(dev); 113 pci_set_master(dev);
@@ -114,7 +117,10 @@ static void __init ssb_fixup_pcibridge(struct pci_dev *dev)
114 pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3); 117 pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3);
115 118
116 /* Make sure our latency is high enough to handle the devices behind us */ 119 /* Make sure our latency is high enough to handle the devices behind us */
117 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xa8); 120 lat = 168;
121 ssb_printk(KERN_INFO "PCI: Fixing latency timer of device %s to %u\n",
122 pci_name(dev), lat);
123 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
118} 124}
119DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge); 125DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge);
120 126
@@ -294,14 +300,14 @@ static struct resource ssb_pcicore_mem_resource = {
294 .name = "SSB PCIcore external memory", 300 .name = "SSB PCIcore external memory",
295 .start = SSB_PCI_DMA, 301 .start = SSB_PCI_DMA,
296 .end = SSB_PCI_DMA + SSB_PCI_DMA_SZ - 1, 302 .end = SSB_PCI_DMA + SSB_PCI_DMA_SZ - 1,
297 .flags = IORESOURCE_MEM, 303 .flags = IORESOURCE_MEM | IORESOURCE_PCI_FIXED,
298}; 304};
299 305
300static struct resource ssb_pcicore_io_resource = { 306static struct resource ssb_pcicore_io_resource = {
301 .name = "SSB PCIcore external I/O", 307 .name = "SSB PCIcore external I/O",
302 .start = 0x100, 308 .start = 0x100,
303 .end = 0x7FF, 309 .end = 0x7FF,
304 .flags = IORESOURCE_IO, 310 .flags = IORESOURCE_IO | IORESOURCE_PCI_FIXED,
305}; 311};
306 312
307static struct pci_controller ssb_pcicore_controller = { 313static struct pci_controller ssb_pcicore_controller = {
@@ -368,7 +374,8 @@ static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
368 /* Ok, ready to run, register it to the system. 374 /* Ok, ready to run, register it to the system.
369 * The following needs change, if we want to port hostmode 375 * The following needs change, if we want to port hostmode
370 * to non-MIPS platform. */ 376 * to non-MIPS platform. */
371 set_io_port_base((unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000)); 377 ssb_pcicore_controller.io_map_base = (unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000);
378 set_io_port_base(ssb_pcicore_controller.io_map_base);
372 /* Give some time to the PCI controller to configure itself with the new 379 /* Give some time to the PCI controller to configure itself with the new
373 * values. Not waiting at this point causes crashes of the machine. */ 380 * values. Not waiting at this point causes crashes of the machine. */
374 mdelay(10); 381 mdelay(10);