Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:
 "The MIPS bits for 3.8.  This also includes a bunch fixes that were
  sitting in the linux-mips.org git tree for a long time.  This pull
  request contains updates to several OCTEON drivers and the board
  support code for BCM47XX, BCM63XX, XLP, XLR, XLS, lantiq, Loongson1B,
  updates to the SSB bus support, MIPS kexec code and adds support for
  kdump.

  When pulling this, there are two expected merge conflicts in
  include/linux/bcma/bcma_driver_chipcommon.h which are trivial to
  resolve, just remove the conflict markers and keep both alternatives."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (90 commits)
  MIPS: PMC-Sierra Yosemite: Remove support.
  VIDEO: Newport Fix console crashes
  MIPS: wrppmc: Fix build of PCI code.
  MIPS: IP22/IP28: Fix build of EISA code.
  MIPS: RB532: Fix build of prom code.
  MIPS: PowerTV: Fix build.
  MIPS: IP27: Correct fucked grammar in ops-bridge.c
  MIPS: Highmem: Fix build error if CONFIG_DEBUG_HIGHMEM is disabled
  MIPS: Fix potencial corruption
  MIPS: Fix for warning from FPU emulation code
  MIPS: Handle COP3 Unusable exception as COP1X for FP emulation
  MIPS: Fix poweroff failure when HOTPLUG_CPU configured.
  MIPS: MT: Fix build with CONFIG_UIDGID_STRICT_TYPE_CHECKS=y
  MIPS: Remove unused smvp.h
  MIPS/EDAC: Improve OCTEON EDAC support.
  MIPS: OCTEON: Add definitions for OCTEON memory contoller registers.
  MIPS: OCTEON: Add OCTEON family definitions to octeon-model.h
  ata: pata_octeon_cf: Use correct byte order for DMA in when built little-endian.
  MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.
  MIPS: Remove usage of CEVT_R4K_LIB config option.
  ...

7 files changed, 322 insertions, 9 deletions

diff --git a/drivers/ssb/Kconfig b/drivers/ssb/Kconfig
index 42cdaa9a4d8a..ff3c8a21f10d 100644
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -160,4 +160,13 @@ config SSB_DRIVER_GIGE
 
           If unsure, say N
 
+config SSB_DRIVER_GPIO
+        bool "SSB GPIO driver"
+        depends on SSB
+        select GPIOLIB
+        help
+          Driver to provide access to the GPIO pins on the bus.
+
+          If unsure, say N
+
 endmenu
diff --git a/drivers/ssb/Makefile b/drivers/ssb/Makefile
index 656e58b92618..9159ba77c388 100644
--- a/drivers/ssb/Makefile
+++ b/drivers/ssb/Makefile
@@ -15,6 +15,7 @@ ssb-$(CONFIG_SSB_DRIVER_MIPS)		+= driver_mipscore.o
 ssb-$(CONFIG_SSB_DRIVER_EXTIF)          += driver_extif.o
 ssb-$(CONFIG_SSB_DRIVER_PCICORE)        += driver_pcicore.o
 ssb-$(CONFIG_SSB_DRIVER_GIGE)           += driver_gige.o
+ssb-$(CONFIG_SSB_DRIVER_GPIO)           += driver_gpio.o
 
 # b43 pci-ssb-bridge driver
 # Not strictly a part of SSB, but kept here for convenience
diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c
index 95c33a05f434..71098a7b5fed 100644
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
@@ -349,6 +349,9 @@ void ssb_chipcommon_init(struct ssb_chipcommon *cc)
 {
         if (!cc->dev)
                 return; /* We don't have a ChipCommon */
+
+        spin_lock_init(&cc->gpio_lock);
+
         if (cc->dev->id.revision >= 11)
                 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
         ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
@@ -505,28 +508,93 @@ u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask)
 
 u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value)
 {
-        return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&cc->gpio_lock, flags);
+        res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
+        spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value)
 {
-        return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&cc->gpio_lock, flags);
+        res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
+        spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value)
 {
-        return chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&cc->gpio_lock, flags);
+        res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value);
+        spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+        return res;
 }
 EXPORT_SYMBOL(ssb_chipco_gpio_control);
 
 u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value)
 {
-        return chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&cc->gpio_lock, flags);
+        res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value);
+        spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value)
 {
-        return chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&cc->gpio_lock, flags);
+        res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value);
+        spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+        return res;
+}
+
+u32 ssb_chipco_gpio_pullup(struct ssb_chipcommon *cc, u32 mask, u32 value)
+{
+        unsigned long flags;
+        u32 res = 0;
+
+        if (cc->dev->id.revision < 20)
+                return 0xffffffff;
+
+        spin_lock_irqsave(&cc->gpio_lock, flags);
+        res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOPULLUP, mask, value);
+        spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+        return res;
+}
+
+u32 ssb_chipco_gpio_pulldown(struct ssb_chipcommon *cc, u32 mask, u32 value)
+{
+        unsigned long flags;
+        u32 res = 0;
+
+        if (cc->dev->id.revision < 20)
+                return 0xffffffff;
+
+        spin_lock_irqsave(&cc->gpio_lock, flags);
+        res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOPULLDOWN, mask, value);
+        spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+        return res;
 }
 
 #ifdef CONFIG_SSB_SERIAL
diff --git a/drivers/ssb/driver_extif.c b/drivers/ssb/driver_extif.c
index 553227a3062d..59385fdab5b0 100644
--- a/drivers/ssb/driver_extif.c
+++ b/drivers/ssb/driver_extif.c
@@ -138,6 +138,13 @@ u32 ssb_extif_watchdog_timer_set(struct ssb_extif *extif, u32 ticks)
         return ticks;
 }
 
+void ssb_extif_init(struct ssb_extif *extif)
+{
+        if (!extif->dev)
+                return; /* We don't have a Extif core */
+        spin_lock_init(&extif->gpio_lock);
+}
+
 u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
 {
         return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask;
@@ -145,22 +152,50 @@ u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
 
 u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
 {
-        return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&extif->gpio_lock, flags);
+        res = extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
                                    mask, value);
+        spin_unlock_irqrestore(&extif->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
 {
-        return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&extif->gpio_lock, flags);
+        res = extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
                                    mask, value);
+        spin_unlock_irqrestore(&extif->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value)
 {
-        return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&extif->gpio_lock, flags);
+        res = extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
+        spin_unlock_irqrestore(&extif->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value)
 {
-        return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&extif->gpio_lock, flags);
+        res = extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
+        spin_unlock_irqrestore(&extif->gpio_lock, flags);
+
+        return res;
 }
diff --git a/drivers/ssb/driver_gpio.c b/drivers/ssb/driver_gpio.c
new file mode 100644
index 000000000000..97ac0a38e3d0
--- /dev/null
+++ b/drivers/ssb/driver_gpio.c
@@ -0,0 +1,176 @@
+/*
+ * Sonics Silicon Backplane
+ * GPIO driver
+ *
+ * Copyright 2011, Broadcom Corporation
+ * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+#include <linux/gpio.h>
+#include <linux/export.h>
+#include <linux/ssb/ssb.h>
+
+#include "ssb_private.h"
+
+static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
+{
+        return container_of(chip, struct ssb_bus, gpio);
+}
+
+static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
+}
+
+static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio,
+                                      int value)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
+}
+
+static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
+                                           unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
+        return 0;
+}
+
+static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
+                                            unsigned gpio, int value)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
+        ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
+        return 0;
+}
+
+static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
+        /* clear pulldown */
+        ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
+        /* Set pullup */
+        ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);
+
+        return 0;
+}
+
+static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        /* clear pullup */
+        ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
+}
+
+static int ssb_gpio_chipco_init(struct ssb_bus *bus)
+{
+        struct gpio_chip *chip = &bus->gpio;
+
+        chip->label             = "ssb_chipco_gpio";
+        chip->owner             = THIS_MODULE;
+        chip->request           = ssb_gpio_chipco_request;
+        chip->free              = ssb_gpio_chipco_free;
+        chip->get               = ssb_gpio_chipco_get_value;
+        chip->set               = ssb_gpio_chipco_set_value;
+        chip->direction_input   = ssb_gpio_chipco_direction_input;
+        chip->direction_output  = ssb_gpio_chipco_direction_output;
+        chip->ngpio             = 16;
+        /* There is just one SoC in one device and its GPIO addresses should be
+         * deterministic to address them more easily. The other buses could get
+         * a random base number. */
+        if (bus->bustype == SSB_BUSTYPE_SSB)
+                chip->base              = 0;
+        else
+                chip->base              = -1;
+
+        return gpiochip_add(chip);
+}
+
+#ifdef CONFIG_SSB_DRIVER_EXTIF
+
+static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
+}
+
+static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio,
+                                     int value)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
+}
+
+static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
+                                          unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
+        return 0;
+}
+
+static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
+                                           unsigned gpio, int value)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
+        ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
+        return 0;
+}
+
+static int ssb_gpio_extif_init(struct ssb_bus *bus)
+{
+        struct gpio_chip *chip = &bus->gpio;
+
+        chip->label             = "ssb_extif_gpio";
+        chip->owner             = THIS_MODULE;
+        chip->get               = ssb_gpio_extif_get_value;
+        chip->set               = ssb_gpio_extif_set_value;
+        chip->direction_input   = ssb_gpio_extif_direction_input;
+        chip->direction_output  = ssb_gpio_extif_direction_output;
+        chip->ngpio             = 5;
+        /* There is just one SoC in one device and its GPIO addresses should be
+         * deterministic to address them more easily. The other buses could get
+         * a random base number. */
+        if (bus->bustype == SSB_BUSTYPE_SSB)
+                chip->base              = 0;
+        else
+                chip->base              = -1;
+
+        return gpiochip_add(chip);
+}
+
+#else
+static int ssb_gpio_extif_init(struct ssb_bus *bus)
+{
+        return -ENOTSUPP;
+}
+#endif
+
+int ssb_gpio_init(struct ssb_bus *bus)
+{
+        if (ssb_chipco_available(&bus->chipco))
+                return ssb_gpio_chipco_init(bus);
+        else if (ssb_extif_available(&bus->extif))
+                return ssb_gpio_extif_init(bus);
+        else
+                SSB_WARN_ON(1);
+
+        return -1;
+}
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 6e0daaa0e04b..c82c5c95fe85 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -804,7 +804,14 @@ static int __devinit ssb_bus_register(struct ssb_bus *bus,
         if (err)
                 goto err_pcmcia_exit;
         ssb_chipcommon_init(&bus->chipco);
+        ssb_extif_init(&bus->extif);
         ssb_mipscore_init(&bus->mipscore);
+        err = ssb_gpio_init(bus);
+        if (err == -ENOTSUPP)
+                ssb_dprintk(KERN_DEBUG PFX "GPIO driver not activated\n");
+        else if (err)
+                ssb_dprintk(KERN_ERR PFX
+                           "Error registering GPIO driver: %i\n", err);
         err = ssb_fetch_invariants(bus, get_invariants);
         if (err) {
                 ssb_bus_may_powerdown(bus);
diff --git a/drivers/ssb/ssb_private.h b/drivers/ssb/ssb_private.h
index 8942db1d855a..6c10b66c796c 100644
--- a/drivers/ssb/ssb_private.h
+++ b/drivers/ssb/ssb_private.h
@@ -242,4 +242,21 @@ static inline int ssb_watchdog_register(struct ssb_bus *bus)
 }
 #endif /* CONFIG_SSB_EMBEDDED */
 
+#ifdef CONFIG_SSB_DRIVER_EXTIF
+extern void ssb_extif_init(struct ssb_extif *extif);
+#else
+static inline void ssb_extif_init(struct ssb_extif *extif)
+{
+}
+#endif
+
+#ifdef CONFIG_SSB_DRIVER_GPIO
+extern int ssb_gpio_init(struct ssb_bus *bus);
+#else /* CONFIG_SSB_DRIVER_GPIO */
+static inline int ssb_gpio_init(struct ssb_bus *bus)
+{
+        return -ENOTSUPP;
+}
+#endif /* CONFIG_SSB_DRIVER_GPIO */
+
 #endif /* LINUX_SSB_PRIVATE_H_ */