diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2012-08-08 13:37:04 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2012-08-10 15:27:02 -0400 |
commit | 902d9e0f48ddc18fb37c1b1edf5e3b27aaba1505 (patch) | |
tree | c922aceb9e0ef671da2529eef5e82f51976f02d3 /drivers/ssb | |
parent | 85ce5ae52690aab0b3a4a6e9a1c2f951d2d8a5cc (diff) |
ssb: check for flash presentence
We can not assume parallel flash is always present, there are boards
with *serial* flash and probably some without flash at all.
Define some bits by the way.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Reviewed-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb')
-rw-r--r-- | drivers/ssb/driver_mipscore.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c index 7e2ddc042f5b..c6250867a95d 100644 --- a/drivers/ssb/driver_mipscore.c +++ b/drivers/ssb/driver_mipscore.c | |||
@@ -190,16 +190,30 @@ static void ssb_mips_flash_detect(struct ssb_mipscore *mcore) | |||
190 | { | 190 | { |
191 | struct ssb_bus *bus = mcore->dev->bus; | 191 | struct ssb_bus *bus = mcore->dev->bus; |
192 | 192 | ||
193 | mcore->flash_buswidth = 2; | 193 | /* When there is no chipcommon on the bus there is 4MB flash */ |
194 | if (bus->chipco.dev) { | 194 | if (!bus->chipco.dev) { |
195 | mcore->flash_window = 0x1c000000; | 195 | mcore->flash_buswidth = 2; |
196 | mcore->flash_window_size = 0x02000000; | 196 | mcore->flash_window = SSB_FLASH1; |
197 | mcore->flash_window_size = SSB_FLASH1_SZ; | ||
198 | return; | ||
199 | } | ||
200 | |||
201 | /* There is ChipCommon, so use it to read info about flash */ | ||
202 | switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) { | ||
203 | case SSB_CHIPCO_FLASHT_STSER: | ||
204 | case SSB_CHIPCO_FLASHT_ATSER: | ||
205 | pr_err("Serial flash not supported\n"); | ||
206 | break; | ||
207 | case SSB_CHIPCO_FLASHT_PARA: | ||
208 | pr_debug("Found parallel flash\n"); | ||
209 | mcore->flash_window = SSB_FLASH2; | ||
210 | mcore->flash_window_size = SSB_FLASH2_SZ; | ||
197 | if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG) | 211 | if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG) |
198 | & SSB_CHIPCO_CFG_DS16) == 0) | 212 | & SSB_CHIPCO_CFG_DS16) == 0) |
199 | mcore->flash_buswidth = 1; | 213 | mcore->flash_buswidth = 1; |
200 | } else { | 214 | else |
201 | mcore->flash_window = 0x1fc00000; | 215 | mcore->flash_buswidth = 2; |
202 | mcore->flash_window_size = 0x00400000; | 216 | break; |
203 | } | 217 | } |
204 | } | 218 | } |
205 | 219 | ||