diff options
author | Michael Buesch <mb@bu3sch.de> | 2008-02-20 13:08:10 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-02-29 15:37:26 -0500 |
commit | ffc7689ddae5cbe12bde437ae0f2b386d568b5cd (patch) | |
tree | 638e7dcf083c88cf45763953aa244504d357a220 /drivers/ssb/pcmcia.c | |
parent | 004c872e78d433f84f0a5cd4db7a6c780c0946e1 (diff) |
ssb: Add support for 8bit register access
This adds support for 8bit wide register reads/writes.
This is needed in order to support the gigabit ethernet core.
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb/pcmcia.c')
-rw-r--r-- | drivers/ssb/pcmcia.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/ssb/pcmcia.c b/drivers/ssb/pcmcia.c index 46816cda8b98..84b3a845a8a8 100644 --- a/drivers/ssb/pcmcia.c +++ b/drivers/ssb/pcmcia.c | |||
@@ -172,6 +172,22 @@ static int select_core_and_segment(struct ssb_device *dev, | |||
172 | return 0; | 172 | return 0; |
173 | } | 173 | } |
174 | 174 | ||
175 | static u8 ssb_pcmcia_read8(struct ssb_device *dev, u16 offset) | ||
176 | { | ||
177 | struct ssb_bus *bus = dev->bus; | ||
178 | unsigned long flags; | ||
179 | int err; | ||
180 | u8 value = 0xFF; | ||
181 | |||
182 | spin_lock_irqsave(&bus->bar_lock, flags); | ||
183 | err = select_core_and_segment(dev, &offset); | ||
184 | if (likely(!err)) | ||
185 | value = readb(bus->mmio + offset); | ||
186 | spin_unlock_irqrestore(&bus->bar_lock, flags); | ||
187 | |||
188 | return value; | ||
189 | } | ||
190 | |||
175 | static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset) | 191 | static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset) |
176 | { | 192 | { |
177 | struct ssb_bus *bus = dev->bus; | 193 | struct ssb_bus *bus = dev->bus; |
@@ -206,6 +222,20 @@ static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset) | |||
206 | return (lo | (hi << 16)); | 222 | return (lo | (hi << 16)); |
207 | } | 223 | } |
208 | 224 | ||
225 | static void ssb_pcmcia_write8(struct ssb_device *dev, u16 offset, u8 value) | ||
226 | { | ||
227 | struct ssb_bus *bus = dev->bus; | ||
228 | unsigned long flags; | ||
229 | int err; | ||
230 | |||
231 | spin_lock_irqsave(&bus->bar_lock, flags); | ||
232 | err = select_core_and_segment(dev, &offset); | ||
233 | if (likely(!err)) | ||
234 | writeb(value, bus->mmio + offset); | ||
235 | mmiowb(); | ||
236 | spin_unlock_irqrestore(&bus->bar_lock, flags); | ||
237 | } | ||
238 | |||
209 | static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value) | 239 | static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value) |
210 | { | 240 | { |
211 | struct ssb_bus *bus = dev->bus; | 241 | struct ssb_bus *bus = dev->bus; |
@@ -238,8 +268,10 @@ static void ssb_pcmcia_write32(struct ssb_device *dev, u16 offset, u32 value) | |||
238 | 268 | ||
239 | /* Not "static", as it's used in main.c */ | 269 | /* Not "static", as it's used in main.c */ |
240 | const struct ssb_bus_ops ssb_pcmcia_ops = { | 270 | const struct ssb_bus_ops ssb_pcmcia_ops = { |
271 | .read8 = ssb_pcmcia_read8, | ||
241 | .read16 = ssb_pcmcia_read16, | 272 | .read16 = ssb_pcmcia_read16, |
242 | .read32 = ssb_pcmcia_read32, | 273 | .read32 = ssb_pcmcia_read32, |
274 | .write8 = ssb_pcmcia_write8, | ||
243 | .write16 = ssb_pcmcia_write16, | 275 | .write16 = ssb_pcmcia_write16, |
244 | .write32 = ssb_pcmcia_write32, | 276 | .write32 = ssb_pcmcia_write32, |
245 | }; | 277 | }; |