diff options
author | Larry Finger <Larry.Finger@lwfinger.net> | 2010-10-20 10:59:33 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-11-15 13:23:28 -0500 |
commit | e081685c1bbe8da37c7f61726fdb783ff277f14f (patch) | |
tree | 333e95f2e541b72dec38e76ae8d371bd8942e53c /drivers/ssb/pcihost_wrapper.c | |
parent | 14fb7c17e97ea0fcc545393fb1f34e6541647b5b (diff) |
ssb: Clear RETRY_TIMEOUT in PCI Configuration for normal devices
MMIO log traces obtained using the Broadcom wl hybrid driver show that
the RETRY_TIMEOUT register (0x41) in PCI configuration space is cleared
if non-zero. Similar code found in other drivers such as ipw2100 show
this operation is needed to keep PCI Tx retries from interfering with
C3 CPU state. There are no known cases where omission of this code has
caused a problem, but this patch is offered just in case such a situation
occurs.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb/pcihost_wrapper.c')
-rw-r--r-- | drivers/ssb/pcihost_wrapper.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/ssb/pcihost_wrapper.c b/drivers/ssb/pcihost_wrapper.c index 6536a041d90d..f6c8c81a0025 100644 --- a/drivers/ssb/pcihost_wrapper.c +++ b/drivers/ssb/pcihost_wrapper.c | |||
@@ -59,6 +59,7 @@ static int ssb_pcihost_probe(struct pci_dev *dev, | |||
59 | struct ssb_bus *ssb; | 59 | struct ssb_bus *ssb; |
60 | int err = -ENOMEM; | 60 | int err = -ENOMEM; |
61 | const char *name; | 61 | const char *name; |
62 | u32 val; | ||
62 | 63 | ||
63 | ssb = kzalloc(sizeof(*ssb), GFP_KERNEL); | 64 | ssb = kzalloc(sizeof(*ssb), GFP_KERNEL); |
64 | if (!ssb) | 65 | if (!ssb) |
@@ -74,6 +75,12 @@ static int ssb_pcihost_probe(struct pci_dev *dev, | |||
74 | goto err_pci_disable; | 75 | goto err_pci_disable; |
75 | pci_set_master(dev); | 76 | pci_set_master(dev); |
76 | 77 | ||
78 | /* Disable the RETRY_TIMEOUT register (0x41) to keep | ||
79 | * PCI Tx retries from interfering with C3 CPU state */ | ||
80 | pci_read_config_dword(dev, 0x40, &val); | ||
81 | if ((val & 0x0000ff00) != 0) | ||
82 | pci_write_config_dword(dev, 0x40, val & 0xffff00ff); | ||
83 | |||
77 | err = ssb_bus_pcibus_register(ssb, dev); | 84 | err = ssb_bus_pcibus_register(ssb, dev); |
78 | if (err) | 85 | if (err) |
79 | goto err_pci_release_regions; | 86 | goto err_pci_release_regions; |