ssb: add locking around gpio register accesses

The GPIOs are access through some registers in the chip common core or
over extif. We need locking around these GPIO accesses, all GPIOs are
accessed through the same registers and parallel writes will cause
problems.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4590
Acked-by: Florian Fainelli <florian@openwrt.org>

1 files changed, 39 insertions, 4 deletions

diff --git a/drivers/ssb/driver_extif.c b/drivers/ssb/driver_extif.c
index dc47f30e9cf7..e1d0bb8ad725 100644
--- a/drivers/ssb/driver_extif.c
+++ b/drivers/ssb/driver_extif.c
@@ -118,6 +118,13 @@ void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
         extif_write32(extif, SSB_EXTIF_WATCHDOG, ticks);
 }
 
+void ssb_extif_init(struct ssb_extif *extif)
+{
+        if (!extif->dev)
+                return; /* We don't have a Extif core */
+        spin_lock_init(&extif->gpio_lock);
+}
+
 u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
 {
         return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask;
@@ -125,22 +132,50 @@ u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
 
 u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
 {
-        return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&extif->gpio_lock, flags);
+        res = extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
                                    mask, value);
+        spin_unlock_irqrestore(&extif->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
 {
-        return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&extif->gpio_lock, flags);
+        res = extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
                                    mask, value);
+        spin_unlock_irqrestore(&extif->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value)
 {
-        return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&extif->gpio_lock, flags);
+        res = extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
+        spin_unlock_irqrestore(&extif->gpio_lock, flags);
+
+        return res;
 }
 
 u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value)
 {
-        return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
+        unsigned long flags;
+        u32 res = 0;
+
+        spin_lock_irqsave(&extif->gpio_lock, flags);
+        res = extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
+        spin_unlock_irqrestore(&extif->gpio_lock, flags);
+
+        return res;
 }