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authorPatrice Chotard <patrice.chotard@stericsson.com>2012-09-19 08:23:46 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-09-20 09:02:53 -0400
commit4f5e1b370845a0a5789ff7271004ca49e5baa46f (patch)
tree9af15a890152ad9970c5a24d1aa135d4828a19c8 /drivers/spi
parentd7b4394e780b02511c8a7a499380cdd56316c770 (diff)
spi/pl022: adopt pinctrl support
Amend the PL022 pin controller to optionally take a pin control handle and set the state of the pins to "default" on boot and runtime resume, and to "sleep" at runtime suspend. This way we will dynamically save power on the SPI busses, for example some electronic designs may be able to ground the pins when unused instead of pull-up. Some pin controllers may want to set the pins as wake-up sources when sleeping. Effect on platforms using the PL022 driver: - If the platform does not use pin control - no semantic effect, the pinctrl stubs will kick in and resolve the situation. - Platforms using this driver and have pin control but no function defined for the PL022 need to either supply a "default" function in their map or enable pinctrl dummies so the driver is satisfied. - Platforms using this driver with hogs for setting up the PL022 pin control - stop using hogs to take the pl022 pin control handle, let the driver handle this. I'be looked at some platforms that may be affected: - SPEAr: appears to define the proper functions in their device trees and not hogging them, so things should be smooth, the driver will simply start to take its pins. - Ux500: the proper function is defined and will be taken properly by the driver. New sleep states introduced by a separate patch to ux500 but no regression, since the default state is sufficient. - U300: old hog deleted as part of this patch. - LPC32xx: does not appear to be using pinctrl. - ARM Integrator IMPD1, RealView & Versatile: does not use pinctrl. Tested-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-pl022.c46
1 files changed, 46 insertions, 0 deletions
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 827ad5152d8b..b6cfb7b3a599 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -42,6 +42,7 @@
42#include <linux/pm_runtime.h> 42#include <linux/pm_runtime.h>
43#include <linux/gpio.h> 43#include <linux/gpio.h>
44#include <linux/of_gpio.h> 44#include <linux/of_gpio.h>
45#include <linux/pinctrl/consumer.h>
45 46
46/* 47/*
47 * This macro is used to define some register default values. 48 * This macro is used to define some register default values.
@@ -367,6 +368,10 @@ struct pl022 {
367 resource_size_t phybase; 368 resource_size_t phybase;
368 void __iomem *virtbase; 369 void __iomem *virtbase;
369 struct clk *clk; 370 struct clk *clk;
371 /* Two optional pin states - default & sleep */
372 struct pinctrl *pinctrl;
373 struct pinctrl_state *pins_default;
374 struct pinctrl_state *pins_sleep;
370 struct spi_master *master; 375 struct spi_master *master;
371 struct pl022_ssp_controller *master_info; 376 struct pl022_ssp_controller *master_info;
372 /* Message per-transfer pump */ 377 /* Message per-transfer pump */
@@ -2068,6 +2073,28 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id)
2068 pl022->chipselects = devm_kzalloc(dev, num_cs * sizeof(int), 2073 pl022->chipselects = devm_kzalloc(dev, num_cs * sizeof(int),
2069 GFP_KERNEL); 2074 GFP_KERNEL);
2070 2075
2076 pl022->pinctrl = devm_pinctrl_get(dev);
2077 if (IS_ERR(pl022->pinctrl)) {
2078 status = PTR_ERR(pl022->pinctrl);
2079 goto err_no_pinctrl;
2080 }
2081
2082 pl022->pins_default = pinctrl_lookup_state(pl022->pinctrl,
2083 PINCTRL_STATE_DEFAULT);
2084 /* enable pins to be muxed in and configured */
2085 if (!IS_ERR(pl022->pins_default)) {
2086 status = pinctrl_select_state(pl022->pinctrl,
2087 pl022->pins_default);
2088 if (status)
2089 dev_err(dev, "could not set default pins\n");
2090 } else
2091 dev_err(dev, "could not get default pinstate\n");
2092
2093 pl022->pins_sleep = pinctrl_lookup_state(pl022->pinctrl,
2094 PINCTRL_STATE_SLEEP);
2095 if (IS_ERR(pl022->pins_sleep))
2096 dev_dbg(dev, "could not get sleep pinstate\n");
2097
2071 /* 2098 /*
2072 * Bus Number Which has been Assigned to this SSP controller 2099 * Bus Number Which has been Assigned to this SSP controller
2073 * on this board 2100 * on this board
@@ -2218,6 +2245,7 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id)
2218 amba_release_regions(adev); 2245 amba_release_regions(adev);
2219 err_no_ioregion: 2246 err_no_ioregion:
2220 err_no_gpio: 2247 err_no_gpio:
2248 err_no_pinctrl:
2221 spi_master_put(master); 2249 spi_master_put(master);
2222 err_no_master: 2250 err_no_master:
2223 err_no_pdata: 2251 err_no_pdata:
@@ -2291,15 +2319,33 @@ static int pl022_resume(struct device *dev)
2291static int pl022_runtime_suspend(struct device *dev) 2319static int pl022_runtime_suspend(struct device *dev)
2292{ 2320{
2293 struct pl022 *pl022 = dev_get_drvdata(dev); 2321 struct pl022 *pl022 = dev_get_drvdata(dev);
2322 int status = 0;
2294 2323
2295 clk_disable(pl022->clk); 2324 clk_disable(pl022->clk);
2296 2325
2326 /* Optionally let pins go into sleep states */
2327 if (!IS_ERR(pl022->pins_sleep)) {
2328 status = pinctrl_select_state(pl022->pinctrl,
2329 pl022->pins_sleep);
2330 if (status)
2331 dev_err(dev, "could not set pins to sleep state\n");
2332 }
2333
2297 return 0; 2334 return 0;
2298} 2335}
2299 2336
2300static int pl022_runtime_resume(struct device *dev) 2337static int pl022_runtime_resume(struct device *dev)
2301{ 2338{
2302 struct pl022 *pl022 = dev_get_drvdata(dev); 2339 struct pl022 *pl022 = dev_get_drvdata(dev);
2340 int status = 0;
2341
2342 /* Optionaly enable pins to be muxed in and configured */
2343 if (!IS_ERR(pl022->pins_default)) {
2344 status = pinctrl_select_state(pl022->pinctrl,
2345 pl022->pins_default);
2346 if (status)
2347 dev_err(dev, "could not set default pins\n");
2348 }
2303 2349
2304 clk_enable(pl022->clk); 2350 clk_enable(pl022->clk);
2305 2351