diff options
author | Shubhrajyoti D <shubhrajyoti@ti.com> | 2012-11-06 04:00:19 -0500 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-11-06 04:03:03 -0500 |
commit | e47a682ace0cd56eb8e09b806c2b0f034b491520 (patch) | |
tree | e04b7d3f681021650e7c1967c3b84ea7409599a3 /drivers/spi | |
parent | 3d70f8c617a436c7146ecb81df2265b4626dfe89 (diff) |
spi: omap2-mcspi: Reorder the wait_for_completion for tx
The commit d7b4394e[Cleanup the omap2_mcspi_txrx_dma function]
changed the wait_for_completion order. Move the wait so that the
rx doesnot wait for the tx to complete.
Reported-and-tested-by: Sørensen, Stefan <Sorensen@polycom.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/spi-omap2-mcspi.c | 39 |
1 files changed, 19 insertions, 20 deletions
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 3542fdc664b1..b1a651ef9579 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c | |||
@@ -323,18 +323,13 @@ static void omap2_mcspi_tx_dma(struct spi_device *spi, | |||
323 | struct omap2_mcspi *mcspi; | 323 | struct omap2_mcspi *mcspi; |
324 | struct omap2_mcspi_dma *mcspi_dma; | 324 | struct omap2_mcspi_dma *mcspi_dma; |
325 | unsigned int count; | 325 | unsigned int count; |
326 | u8 * rx; | ||
327 | const u8 * tx; | 326 | const u8 * tx; |
328 | void __iomem *chstat_reg; | ||
329 | struct omap2_mcspi_cs *cs = spi->controller_state; | ||
330 | 327 | ||
331 | mcspi = spi_master_get_devdata(spi->master); | 328 | mcspi = spi_master_get_devdata(spi->master); |
332 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; | 329 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; |
333 | count = xfer->len; | 330 | count = xfer->len; |
334 | 331 | ||
335 | rx = xfer->rx_buf; | ||
336 | tx = xfer->tx_buf; | 332 | tx = xfer->tx_buf; |
337 | chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0; | ||
338 | 333 | ||
339 | if (mcspi_dma->dma_tx) { | 334 | if (mcspi_dma->dma_tx) { |
340 | struct dma_async_tx_descriptor *tx; | 335 | struct dma_async_tx_descriptor *tx; |
@@ -359,19 +354,6 @@ static void omap2_mcspi_tx_dma(struct spi_device *spi, | |||
359 | dma_async_issue_pending(mcspi_dma->dma_tx); | 354 | dma_async_issue_pending(mcspi_dma->dma_tx); |
360 | omap2_mcspi_set_dma_req(spi, 0, 1); | 355 | omap2_mcspi_set_dma_req(spi, 0, 1); |
361 | 356 | ||
362 | wait_for_completion(&mcspi_dma->dma_tx_completion); | ||
363 | dma_unmap_single(mcspi->dev, xfer->tx_dma, count, | ||
364 | DMA_TO_DEVICE); | ||
365 | |||
366 | /* for TX_ONLY mode, be sure all words have shifted out */ | ||
367 | if (rx == NULL) { | ||
368 | if (mcspi_wait_for_reg_bit(chstat_reg, | ||
369 | OMAP2_MCSPI_CHSTAT_TXS) < 0) | ||
370 | dev_err(&spi->dev, "TXS timed out\n"); | ||
371 | else if (mcspi_wait_for_reg_bit(chstat_reg, | ||
372 | OMAP2_MCSPI_CHSTAT_EOT) < 0) | ||
373 | dev_err(&spi->dev, "EOT timed out\n"); | ||
374 | } | ||
375 | } | 357 | } |
376 | 358 | ||
377 | static unsigned | 359 | static unsigned |
@@ -492,6 +474,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) | |||
492 | struct dma_slave_config cfg; | 474 | struct dma_slave_config cfg; |
493 | enum dma_slave_buswidth width; | 475 | enum dma_slave_buswidth width; |
494 | unsigned es; | 476 | unsigned es; |
477 | void __iomem *chstat_reg; | ||
495 | 478 | ||
496 | mcspi = spi_master_get_devdata(spi->master); | 479 | mcspi = spi_master_get_devdata(spi->master); |
497 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; | 480 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; |
@@ -526,8 +509,24 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) | |||
526 | omap2_mcspi_tx_dma(spi, xfer, cfg); | 509 | omap2_mcspi_tx_dma(spi, xfer, cfg); |
527 | 510 | ||
528 | if (rx != NULL) | 511 | if (rx != NULL) |
529 | return omap2_mcspi_rx_dma(spi, xfer, cfg, es); | 512 | count = omap2_mcspi_rx_dma(spi, xfer, cfg, es); |
530 | 513 | ||
514 | if (tx != NULL) { | ||
515 | chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0; | ||
516 | wait_for_completion(&mcspi_dma->dma_tx_completion); | ||
517 | dma_unmap_single(mcspi->dev, xfer->tx_dma, xfer->len, | ||
518 | DMA_TO_DEVICE); | ||
519 | |||
520 | /* for TX_ONLY mode, be sure all words have shifted out */ | ||
521 | if (rx == NULL) { | ||
522 | if (mcspi_wait_for_reg_bit(chstat_reg, | ||
523 | OMAP2_MCSPI_CHSTAT_TXS) < 0) | ||
524 | dev_err(&spi->dev, "TXS timed out\n"); | ||
525 | else if (mcspi_wait_for_reg_bit(chstat_reg, | ||
526 | OMAP2_MCSPI_CHSTAT_EOT) < 0) | ||
527 | dev_err(&spi->dev, "EOT timed out\n"); | ||
528 | } | ||
529 | } | ||
531 | return count; | 530 | return count; |
532 | } | 531 | } |
533 | 532 | ||