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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-24 16:56:24 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-24 16:56:24 -0400
commitbe122abe4bcd6d39b37892daae28c8bf5e4030fc (patch)
treee8ad84c41c2acde27c77fa212b8865cd3acfe6fb /drivers/spi
parentb343c8beec664ef6f0e9964d3001c7c7966331ae (diff)
parent1e8a52e18cfb381bc9cc1f0b720540364d2a6edd (diff)
Merge tag 'spi-for-linus' of git://git.secretlab.ca/git/linux-2.6
Pull SPI changes from Grant Likely: "Bug fixes and new features for SPI device drivers. Also move device tree support code out of drivers/of and into drivers/spi/spi.c where it makes more sense." * tag 'spi-for-linus' of git://git.secretlab.ca/git/linux-2.6: spi: By default setup spi_masters with 1 chipselect and dynamics bus number SPI: PRIMA2: use the newest APIs of PINCTRL to fix compiling errors spi/spi-fsl-spi: reference correct pdata in fsl_spi_cs_control spi: refactor spi-coldfire-qspi to use SPI queue framework. spi/omap2-mcspi: convert to the pump message infrastructure spi/rspi: add dmaengine support spi/topcliff: use correct __devexit_p annotation spi: Dont call prepare/unprepare transfer if not populated spi/ep93xx: clean probe/remove routines spi/devicetree: Move devicetree support code into spi directory spi: use module_pci_driver spi/omap2-mcspi: Trivial optimisation spi: omap2-mcspi: add support for pm_runtime autosuspend spi/omap: Remove bus_num usage for instance index OMAP : SPI : use devm_* functions spi: omap2-mcspi: convert to module_platform_driver spi: omap2-mcspi: make it behave as a module
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-ath79.c3
-rw-r--r--drivers/spi/spi-coldfire-qspi.c255
-rw-r--r--drivers/spi/spi-dw-pci.c13
-rw-r--r--drivers/spi/spi-ep93xx.c37
-rw-r--r--drivers/spi/spi-fsl-espi.c1
-rw-r--r--drivers/spi/spi-fsl-lib.c2
-rw-r--r--drivers/spi/spi-fsl-spi.c2
-rw-r--r--drivers/spi/spi-lm70llp.c3
-rw-r--r--drivers/spi/spi-mpc52xx.c3
-rw-r--r--drivers/spi/spi-omap2-mcspi.c373
-rw-r--r--drivers/spi/spi-ppc4xx.c4
-rw-r--r--drivers/spi/spi-pxa2xx-pci.c12
-rw-r--r--drivers/spi/spi-rspi.c320
-rw-r--r--drivers/spi/spi-sirf.c20
-rw-r--r--drivers/spi/spi-topcliff-pch.c3
-rw-r--r--drivers/spi/spi.c98
16 files changed, 705 insertions, 444 deletions
diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
index acc88b4d2869..249077e5cc48 100644
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -216,9 +216,6 @@ static __devinit int ath79_spi_probe(struct platform_device *pdev)
216 if (pdata) { 216 if (pdata) {
217 master->bus_num = pdata->bus_num; 217 master->bus_num = pdata->bus_num;
218 master->num_chipselect = pdata->num_chipselect; 218 master->num_chipselect = pdata->num_chipselect;
219 } else {
220 master->bus_num = -1;
221 master->num_chipselect = 1;
222 } 219 }
223 220
224 sp->bitbang.master = spi_master_get(master); 221 sp->bitbang.master = spi_master_get(master);
diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c
index 6eee64a5d240..b2d4b9e4e010 100644
--- a/drivers/spi/spi-coldfire-qspi.c
+++ b/drivers/spi/spi-coldfire-qspi.c
@@ -25,12 +25,12 @@
25#include <linux/errno.h> 25#include <linux/errno.h>
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/sched.h> 27#include <linux/sched.h>
28#include <linux/workqueue.h>
29#include <linux/delay.h> 28#include <linux/delay.h>
30#include <linux/io.h> 29#include <linux/io.h>
31#include <linux/clk.h> 30#include <linux/clk.h>
32#include <linux/err.h> 31#include <linux/err.h>
33#include <linux/spi/spi.h> 32#include <linux/spi/spi.h>
33#include <linux/pm_runtime.h>
34 34
35#include <asm/coldfire.h> 35#include <asm/coldfire.h>
36#include <asm/mcfsim.h> 36#include <asm/mcfsim.h>
@@ -78,10 +78,7 @@ struct mcfqspi {
78 78
79 wait_queue_head_t waitq; 79 wait_queue_head_t waitq;
80 80
81 struct work_struct work; 81 struct device *dev;
82 struct workqueue_struct *workq;
83 spinlock_t lock;
84 struct list_head msgq;
85}; 82};
86 83
87static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val) 84static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val)
@@ -303,120 +300,80 @@ static void mcfqspi_transfer_msg16(struct mcfqspi *mcfqspi, unsigned count,
303 } 300 }
304} 301}
305 302
306static void mcfqspi_work(struct work_struct *work) 303static int mcfqspi_transfer_one_message(struct spi_master *master,
304 struct spi_message *msg)
307{ 305{
308 struct mcfqspi *mcfqspi = container_of(work, struct mcfqspi, work); 306 struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
309 unsigned long flags; 307 struct spi_device *spi = msg->spi;
310 308 struct spi_transfer *t;
311 spin_lock_irqsave(&mcfqspi->lock, flags); 309 int status = 0;
312 while (!list_empty(&mcfqspi->msgq)) { 310
313 struct spi_message *msg; 311 list_for_each_entry(t, &msg->transfers, transfer_list) {
314 struct spi_device *spi; 312 bool cs_high = spi->mode & SPI_CS_HIGH;
315 struct spi_transfer *xfer; 313 u16 qmr = MCFQSPI_QMR_MSTR;
316 int status = 0; 314
317 315 if (t->bits_per_word)
318 msg = container_of(mcfqspi->msgq.next, struct spi_message, 316 qmr |= t->bits_per_word << 10;
319 queue); 317 else
320 318 qmr |= spi->bits_per_word << 10;
321 list_del_init(&msg->queue); 319 if (spi->mode & SPI_CPHA)
322 spin_unlock_irqrestore(&mcfqspi->lock, flags); 320 qmr |= MCFQSPI_QMR_CPHA;
323 321 if (spi->mode & SPI_CPOL)
324 spi = msg->spi; 322 qmr |= MCFQSPI_QMR_CPOL;
325 323 if (t->speed_hz)
326 list_for_each_entry(xfer, &msg->transfers, transfer_list) { 324 qmr |= mcfqspi_qmr_baud(t->speed_hz);
327 bool cs_high = spi->mode & SPI_CS_HIGH; 325 else
328 u16 qmr = MCFQSPI_QMR_MSTR; 326 qmr |= mcfqspi_qmr_baud(spi->max_speed_hz);
329 327 mcfqspi_wr_qmr(mcfqspi, qmr);
330 if (xfer->bits_per_word) 328
331 qmr |= xfer->bits_per_word << 10; 329 mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high);
332 else 330
333 qmr |= spi->bits_per_word << 10; 331 mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE);
334 if (spi->mode & SPI_CPHA) 332 if ((t->bits_per_word ? t->bits_per_word :
335 qmr |= MCFQSPI_QMR_CPHA; 333 spi->bits_per_word) == 8)
336 if (spi->mode & SPI_CPOL) 334 mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf,
337 qmr |= MCFQSPI_QMR_CPOL; 335 t->rx_buf);
338 if (xfer->speed_hz) 336 else
339 qmr |= mcfqspi_qmr_baud(xfer->speed_hz); 337 mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf,
340 else 338 t->rx_buf);
341 qmr |= mcfqspi_qmr_baud(spi->max_speed_hz); 339 mcfqspi_wr_qir(mcfqspi, 0);
342 mcfqspi_wr_qmr(mcfqspi, qmr); 340
343 341 if (t->delay_usecs)
344 mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high); 342 udelay(t->delay_usecs);
345 343 if (t->cs_change) {
346 mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE); 344 if (!list_is_last(&t->transfer_list, &msg->transfers))
347 if ((xfer->bits_per_word ? xfer->bits_per_word : 345 mcfqspi_cs_deselect(mcfqspi, spi->chip_select,
348 spi->bits_per_word) == 8) 346 cs_high);
349 mcfqspi_transfer_msg8(mcfqspi, xfer->len, 347 } else {
350 xfer->tx_buf, 348 if (list_is_last(&t->transfer_list, &msg->transfers))
351 xfer->rx_buf); 349 mcfqspi_cs_deselect(mcfqspi, spi->chip_select,
352 else 350 cs_high);
353 mcfqspi_transfer_msg16(mcfqspi, xfer->len / 2,
354 xfer->tx_buf,
355 xfer->rx_buf);
356 mcfqspi_wr_qir(mcfqspi, 0);
357
358 if (xfer->delay_usecs)
359 udelay(xfer->delay_usecs);
360 if (xfer->cs_change) {
361 if (!list_is_last(&xfer->transfer_list,
362 &msg->transfers))
363 mcfqspi_cs_deselect(mcfqspi,
364 spi->chip_select,
365 cs_high);
366 } else {
367 if (list_is_last(&xfer->transfer_list,
368 &msg->transfers))
369 mcfqspi_cs_deselect(mcfqspi,
370 spi->chip_select,
371 cs_high);
372 }
373 msg->actual_length += xfer->len;
374 } 351 }
375 msg->status = status; 352 msg->actual_length += t->len;
376 msg->complete(msg->context);
377
378 spin_lock_irqsave(&mcfqspi->lock, flags);
379 } 353 }
380 spin_unlock_irqrestore(&mcfqspi->lock, flags); 354 msg->status = status;
355 spi_finalize_current_message(master);
356
357 return status;
358
381} 359}
382 360
383static int mcfqspi_transfer(struct spi_device *spi, struct spi_message *msg) 361static int mcfqspi_prepare_transfer_hw(struct spi_master *master)
384{ 362{
385 struct mcfqspi *mcfqspi; 363 struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
386 struct spi_transfer *xfer;
387 unsigned long flags;
388
389 mcfqspi = spi_master_get_devdata(spi->master);
390
391 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
392 if (xfer->bits_per_word && ((xfer->bits_per_word < 8)
393 || (xfer->bits_per_word > 16))) {
394 dev_dbg(&spi->dev,
395 "%d bits per word is not supported\n",
396 xfer->bits_per_word);
397 goto fail;
398 }
399 if (xfer->speed_hz) {
400 u32 real_speed = MCFQSPI_BUSCLK /
401 mcfqspi_qmr_baud(xfer->speed_hz);
402 if (real_speed != xfer->speed_hz)
403 dev_dbg(&spi->dev,
404 "using speed %d instead of %d\n",
405 real_speed, xfer->speed_hz);
406 }
407 }
408 msg->status = -EINPROGRESS;
409 msg->actual_length = 0;
410 364
411 spin_lock_irqsave(&mcfqspi->lock, flags); 365 pm_runtime_get_sync(mcfqspi->dev);
412 list_add_tail(&msg->queue, &mcfqspi->msgq); 366
413 queue_work(mcfqspi->workq, &mcfqspi->work); 367 return 0;
414 spin_unlock_irqrestore(&mcfqspi->lock, flags); 368}
369
370static int mcfqspi_unprepare_transfer_hw(struct spi_master *master)
371{
372 struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
373
374 pm_runtime_put_sync(mcfqspi->dev);
415 375
416 return 0; 376 return 0;
417fail:
418 msg->status = -EINVAL;
419 return -EINVAL;
420} 377}
421 378
422static int mcfqspi_setup(struct spi_device *spi) 379static int mcfqspi_setup(struct spi_device *spi)
@@ -502,21 +459,10 @@ static int __devinit mcfqspi_probe(struct platform_device *pdev)
502 } 459 }
503 clk_enable(mcfqspi->clk); 460 clk_enable(mcfqspi->clk);
504 461
505 mcfqspi->workq = create_singlethread_workqueue(dev_name(master->dev.parent));
506 if (!mcfqspi->workq) {
507 dev_dbg(&pdev->dev, "create_workqueue failed\n");
508 status = -ENOMEM;
509 goto fail4;
510 }
511 INIT_WORK(&mcfqspi->work, mcfqspi_work);
512 spin_lock_init(&mcfqspi->lock);
513 INIT_LIST_HEAD(&mcfqspi->msgq);
514 init_waitqueue_head(&mcfqspi->waitq);
515
516 pdata = pdev->dev.platform_data; 462 pdata = pdev->dev.platform_data;
517 if (!pdata) { 463 if (!pdata) {
518 dev_dbg(&pdev->dev, "platform data is missing\n"); 464 dev_dbg(&pdev->dev, "platform data is missing\n");
519 goto fail5; 465 goto fail4;
520 } 466 }
521 master->bus_num = pdata->bus_num; 467 master->bus_num = pdata->bus_num;
522 master->num_chipselect = pdata->num_chipselect; 468 master->num_chipselect = pdata->num_chipselect;
@@ -525,28 +471,33 @@ static int __devinit mcfqspi_probe(struct platform_device *pdev)
525 status = mcfqspi_cs_setup(mcfqspi); 471 status = mcfqspi_cs_setup(mcfqspi);
526 if (status) { 472 if (status) {
527 dev_dbg(&pdev->dev, "error initializing cs_control\n"); 473 dev_dbg(&pdev->dev, "error initializing cs_control\n");
528 goto fail5; 474 goto fail4;
529 } 475 }
530 476
477 init_waitqueue_head(&mcfqspi->waitq);
478 mcfqspi->dev = &pdev->dev;
479
531 master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; 480 master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA;
532 master->setup = mcfqspi_setup; 481 master->setup = mcfqspi_setup;
533 master->transfer = mcfqspi_transfer; 482 master->transfer_one_message = mcfqspi_transfer_one_message;
483 master->prepare_transfer_hardware = mcfqspi_prepare_transfer_hw;
484 master->unprepare_transfer_hardware = mcfqspi_unprepare_transfer_hw;
534 485
535 platform_set_drvdata(pdev, master); 486 platform_set_drvdata(pdev, master);
536 487
537 status = spi_register_master(master); 488 status = spi_register_master(master);
538 if (status) { 489 if (status) {
539 dev_dbg(&pdev->dev, "spi_register_master failed\n"); 490 dev_dbg(&pdev->dev, "spi_register_master failed\n");
540 goto fail6; 491 goto fail5;
541 } 492 }
493 pm_runtime_enable(mcfqspi->dev);
494
542 dev_info(&pdev->dev, "Coldfire QSPI bus driver\n"); 495 dev_info(&pdev->dev, "Coldfire QSPI bus driver\n");
543 496
544 return 0; 497 return 0;
545 498
546fail6:
547 mcfqspi_cs_teardown(mcfqspi);
548fail5: 499fail5:
549 destroy_workqueue(mcfqspi->workq); 500 mcfqspi_cs_teardown(mcfqspi);
550fail4: 501fail4:
551 clk_disable(mcfqspi->clk); 502 clk_disable(mcfqspi->clk);
552 clk_put(mcfqspi->clk); 503 clk_put(mcfqspi->clk);
@@ -570,12 +521,12 @@ static int __devexit mcfqspi_remove(struct platform_device *pdev)
570 struct mcfqspi *mcfqspi = spi_master_get_devdata(master); 521 struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
571 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 522 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
572 523
524 pm_runtime_disable(mcfqspi->dev);
573 /* disable the hardware (set the baud rate to 0) */ 525 /* disable the hardware (set the baud rate to 0) */
574 mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR); 526 mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR);
575 527
576 platform_set_drvdata(pdev, NULL); 528 platform_set_drvdata(pdev, NULL);
577 mcfqspi_cs_teardown(mcfqspi); 529 mcfqspi_cs_teardown(mcfqspi);
578 destroy_workqueue(mcfqspi->workq);
579 clk_disable(mcfqspi->clk); 530 clk_disable(mcfqspi->clk);
580 clk_put(mcfqspi->clk); 531 clk_put(mcfqspi->clk);
581 free_irq(mcfqspi->irq, mcfqspi); 532 free_irq(mcfqspi->irq, mcfqspi);
@@ -587,11 +538,13 @@ static int __devexit mcfqspi_remove(struct platform_device *pdev)
587 return 0; 538 return 0;
588} 539}
589 540
590#ifdef CONFIG_PM 541#ifdef CONFIG_PM_SLEEP
591
592static int mcfqspi_suspend(struct device *dev) 542static int mcfqspi_suspend(struct device *dev)
593{ 543{
594 struct mcfqspi *mcfqspi = platform_get_drvdata(to_platform_device(dev)); 544 struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
545 struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
546
547 spi_master_suspend(master);
595 548
596 clk_disable(mcfqspi->clk); 549 clk_disable(mcfqspi->clk);
597 550
@@ -600,27 +553,47 @@ static int mcfqspi_suspend(struct device *dev)
600 553
601static int mcfqspi_resume(struct device *dev) 554static int mcfqspi_resume(struct device *dev)
602{ 555{
603 struct mcfqspi *mcfqspi = platform_get_drvdata(to_platform_device(dev)); 556 struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
557 struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
558
559 spi_master_resume(master);
604 560
605 clk_enable(mcfqspi->clk); 561 clk_enable(mcfqspi->clk);
606 562
607 return 0; 563 return 0;
608} 564}
565#endif
609 566
610static struct dev_pm_ops mcfqspi_dev_pm_ops = { 567#ifdef CONFIG_PM_RUNTIME
611 .suspend = mcfqspi_suspend, 568static int mcfqspi_runtime_suspend(struct device *dev)
612 .resume = mcfqspi_resume, 569{
613}; 570 struct mcfqspi *mcfqspi = platform_get_drvdata(to_platform_device(dev));
614 571
615#define MCFQSPI_DEV_PM_OPS (&mcfqspi_dev_pm_ops) 572 clk_disable(mcfqspi->clk);
616#else 573
617#define MCFQSPI_DEV_PM_OPS NULL 574 return 0;
575}
576
577static int mcfqspi_runtime_resume(struct device *dev)
578{
579 struct mcfqspi *mcfqspi = platform_get_drvdata(to_platform_device(dev));
580
581 clk_enable(mcfqspi->clk);
582
583 return 0;
584}
618#endif 585#endif
619 586
587static const struct dev_pm_ops mcfqspi_pm = {
588 SET_SYSTEM_SLEEP_PM_OPS(mcfqspi_suspend, mcfqspi_resume)
589 SET_RUNTIME_PM_OPS(mcfqspi_runtime_suspend, mcfqspi_runtime_resume,
590 NULL)
591};
592
620static struct platform_driver mcfqspi_driver = { 593static struct platform_driver mcfqspi_driver = {
621 .driver.name = DRIVER_NAME, 594 .driver.name = DRIVER_NAME,
622 .driver.owner = THIS_MODULE, 595 .driver.owner = THIS_MODULE,
623 .driver.pm = MCFQSPI_DEV_PM_OPS, 596 .driver.pm = &mcfqspi_pm,
624 .probe = mcfqspi_probe, 597 .probe = mcfqspi_probe,
625 .remove = __devexit_p(mcfqspi_remove), 598 .remove = __devexit_p(mcfqspi_remove),
626}; 599};
diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
index 14f7cc9523f0..ff81abbb3066 100644
--- a/drivers/spi/spi-dw-pci.c
+++ b/drivers/spi/spi-dw-pci.c
@@ -164,18 +164,7 @@ static struct pci_driver dw_spi_driver = {
164 .resume = spi_resume, 164 .resume = spi_resume,
165}; 165};
166 166
167static int __init mrst_spi_init(void) 167module_pci_driver(dw_spi_driver);
168{
169 return pci_register_driver(&dw_spi_driver);
170}
171
172static void __exit mrst_spi_exit(void)
173{
174 pci_unregister_driver(&dw_spi_driver);
175}
176
177module_init(mrst_spi_init);
178module_exit(mrst_spi_exit);
179 168
180MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>"); 169MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
181MODULE_DESCRIPTION("PCI interface driver for DW SPI Core"); 170MODULE_DESCRIPTION("PCI interface driver for DW SPI Core");
diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c
index e8055073e84d..f97f1d248800 100644
--- a/drivers/spi/spi-ep93xx.c
+++ b/drivers/spi/spi-ep93xx.c
@@ -76,7 +76,6 @@
76 * @clk: clock for the controller 76 * @clk: clock for the controller
77 * @regs_base: pointer to ioremap()'d registers 77 * @regs_base: pointer to ioremap()'d registers
78 * @sspdr_phys: physical address of the SSPDR register 78 * @sspdr_phys: physical address of the SSPDR register
79 * @irq: IRQ number used by the driver
80 * @min_rate: minimum clock rate (in Hz) supported by the controller 79 * @min_rate: minimum clock rate (in Hz) supported by the controller
81 * @max_rate: maximum clock rate (in Hz) supported by the controller 80 * @max_rate: maximum clock rate (in Hz) supported by the controller
82 * @running: is the queue running 81 * @running: is the queue running
@@ -114,7 +113,6 @@ struct ep93xx_spi {
114 struct clk *clk; 113 struct clk *clk;
115 void __iomem *regs_base; 114 void __iomem *regs_base;
116 unsigned long sspdr_phys; 115 unsigned long sspdr_phys;
117 int irq;
118 unsigned long min_rate; 116 unsigned long min_rate;
119 unsigned long max_rate; 117 unsigned long max_rate;
120 bool running; 118 bool running;
@@ -1031,6 +1029,7 @@ static int __devinit ep93xx_spi_probe(struct platform_device *pdev)
1031 struct ep93xx_spi_info *info; 1029 struct ep93xx_spi_info *info;
1032 struct ep93xx_spi *espi; 1030 struct ep93xx_spi *espi;
1033 struct resource *res; 1031 struct resource *res;
1032 int irq;
1034 int error; 1033 int error;
1035 1034
1036 info = pdev->dev.platform_data; 1035 info = pdev->dev.platform_data;
@@ -1070,8 +1069,8 @@ static int __devinit ep93xx_spi_probe(struct platform_device *pdev)
1070 espi->min_rate = clk_get_rate(espi->clk) / (254 * 256); 1069 espi->min_rate = clk_get_rate(espi->clk) / (254 * 256);
1071 espi->pdev = pdev; 1070 espi->pdev = pdev;
1072 1071
1073 espi->irq = platform_get_irq(pdev, 0); 1072 irq = platform_get_irq(pdev, 0);
1074 if (espi->irq < 0) { 1073 if (irq < 0) {
1075 error = -EBUSY; 1074 error = -EBUSY;
1076 dev_err(&pdev->dev, "failed to get irq resources\n"); 1075 dev_err(&pdev->dev, "failed to get irq resources\n");
1077 goto fail_put_clock; 1076 goto fail_put_clock;
@@ -1084,26 +1083,20 @@ static int __devinit ep93xx_spi_probe(struct platform_device *pdev)
1084 goto fail_put_clock; 1083 goto fail_put_clock;
1085 } 1084 }
1086 1085
1087 res = request_mem_region(res->start, resource_size(res), pdev->name);
1088 if (!res) {
1089 dev_err(&pdev->dev, "unable to request iomem resources\n");
1090 error = -EBUSY;
1091 goto fail_put_clock;
1092 }
1093
1094 espi->sspdr_phys = res->start + SSPDR; 1086 espi->sspdr_phys = res->start + SSPDR;
1095 espi->regs_base = ioremap(res->start, resource_size(res)); 1087
1088 espi->regs_base = devm_request_and_ioremap(&pdev->dev, res);
1096 if (!espi->regs_base) { 1089 if (!espi->regs_base) {
1097 dev_err(&pdev->dev, "failed to map resources\n"); 1090 dev_err(&pdev->dev, "failed to map resources\n");
1098 error = -ENODEV; 1091 error = -ENODEV;
1099 goto fail_free_mem; 1092 goto fail_put_clock;
1100 } 1093 }
1101 1094
1102 error = request_irq(espi->irq, ep93xx_spi_interrupt, 0, 1095 error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt,
1103 "ep93xx-spi", espi); 1096 0, "ep93xx-spi", espi);
1104 if (error) { 1097 if (error) {
1105 dev_err(&pdev->dev, "failed to request irq\n"); 1098 dev_err(&pdev->dev, "failed to request irq\n");
1106 goto fail_unmap_regs; 1099 goto fail_put_clock;
1107 } 1100 }
1108 1101
1109 if (info->use_dma && ep93xx_spi_setup_dma(espi)) 1102 if (info->use_dma && ep93xx_spi_setup_dma(espi))
@@ -1128,7 +1121,7 @@ static int __devinit ep93xx_spi_probe(struct platform_device *pdev)
1128 } 1121 }
1129 1122
1130 dev_info(&pdev->dev, "EP93xx SPI Controller at 0x%08lx irq %d\n", 1123 dev_info(&pdev->dev, "EP93xx SPI Controller at 0x%08lx irq %d\n",
1131 (unsigned long)res->start, espi->irq); 1124 (unsigned long)res->start, irq);
1132 1125
1133 return 0; 1126 return 0;
1134 1127
@@ -1136,11 +1129,6 @@ fail_free_queue:
1136 destroy_workqueue(espi->wq); 1129 destroy_workqueue(espi->wq);
1137fail_free_dma: 1130fail_free_dma:
1138 ep93xx_spi_release_dma(espi); 1131 ep93xx_spi_release_dma(espi);
1139 free_irq(espi->irq, espi);
1140fail_unmap_regs:
1141 iounmap(espi->regs_base);
1142fail_free_mem:
1143 release_mem_region(res->start, resource_size(res));
1144fail_put_clock: 1132fail_put_clock:
1145 clk_put(espi->clk); 1133 clk_put(espi->clk);
1146fail_release_master: 1134fail_release_master:
@@ -1154,7 +1142,6 @@ static int __devexit ep93xx_spi_remove(struct platform_device *pdev)
1154{ 1142{
1155 struct spi_master *master = platform_get_drvdata(pdev); 1143 struct spi_master *master = platform_get_drvdata(pdev);
1156 struct ep93xx_spi *espi = spi_master_get_devdata(master); 1144 struct ep93xx_spi *espi = spi_master_get_devdata(master);
1157 struct resource *res;
1158 1145
1159 spin_lock_irq(&espi->lock); 1146 spin_lock_irq(&espi->lock);
1160 espi->running = false; 1147 espi->running = false;
@@ -1180,10 +1167,6 @@ static int __devexit ep93xx_spi_remove(struct platform_device *pdev)
1180 spin_unlock_irq(&espi->lock); 1167 spin_unlock_irq(&espi->lock);
1181 1168
1182 ep93xx_spi_release_dma(espi); 1169 ep93xx_spi_release_dma(espi);
1183 free_irq(espi->irq, espi);
1184 iounmap(espi->regs_base);
1185 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1186 release_mem_region(res->start, resource_size(res));
1187 clk_put(espi->clk); 1170 clk_put(espi->clk);
1188 platform_set_drvdata(pdev, NULL); 1171 platform_set_drvdata(pdev, NULL);
1189 1172
diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c
index 7523a2429d09..27bdc47b5250 100644
--- a/drivers/spi/spi-fsl-espi.c
+++ b/drivers/spi/spi-fsl-espi.c
@@ -17,7 +17,6 @@
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/of.h> 18#include <linux/of.h>
19#include <linux/of_platform.h> 19#include <linux/of_platform.h>
20#include <linux/of_spi.h>
21#include <linux/interrupt.h> 20#include <linux/interrupt.h>
22#include <linux/err.h> 21#include <linux/err.h>
23#include <sysdev/fsl_soc.h> 22#include <sysdev/fsl_soc.h>
diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c
index 2674fad7f68a..1503574b215a 100644
--- a/drivers/spi/spi-fsl-lib.c
+++ b/drivers/spi/spi-fsl-lib.c
@@ -22,7 +22,7 @@
22#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/mm.h> 23#include <linux/mm.h>
24#include <linux/of_platform.h> 24#include <linux/of_platform.h>
25#include <linux/of_spi.h> 25#include <linux/spi/spi.h>
26#include <sysdev/fsl_soc.h> 26#include <sysdev/fsl_soc.h>
27 27
28#include "spi-fsl-lib.h" 28#include "spi-fsl-lib.h"
diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c
index 5f748c0d96bd..6a62934ca74c 100644
--- a/drivers/spi/spi-fsl-spi.c
+++ b/drivers/spi/spi-fsl-spi.c
@@ -933,7 +933,7 @@ err:
933 933
934static void fsl_spi_cs_control(struct spi_device *spi, bool on) 934static void fsl_spi_cs_control(struct spi_device *spi, bool on)
935{ 935{
936 struct device *dev = spi->dev.parent; 936 struct device *dev = spi->dev.parent->parent;
937 struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data); 937 struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data);
938 u16 cs = spi->chip_select; 938 u16 cs = spi->chip_select;
939 int gpio = pinfo->gpios[cs]; 939 int gpio = pinfo->gpios[cs];
diff --git a/drivers/spi/spi-lm70llp.c b/drivers/spi/spi-lm70llp.c
index 933eb9d9ddd4..0759b5db9883 100644
--- a/drivers/spi/spi-lm70llp.c
+++ b/drivers/spi/spi-lm70llp.c
@@ -219,9 +219,6 @@ static void spi_lm70llp_attach(struct parport *p)
219 } 219 }
220 pp = spi_master_get_devdata(master); 220 pp = spi_master_get_devdata(master);
221 221
222 master->bus_num = -1; /* dynamic alloc of a bus number */
223 master->num_chipselect = 1;
224
225 /* 222 /*
226 * SPI and bitbang hookup. 223 * SPI and bitbang hookup.
227 */ 224 */
diff --git a/drivers/spi/spi-mpc52xx.c b/drivers/spi/spi-mpc52xx.c
index 57633d963456..cb3a3830b0a5 100644
--- a/drivers/spi/spi-mpc52xx.c
+++ b/drivers/spi/spi-mpc52xx.c
@@ -433,7 +433,6 @@ static int __devinit mpc52xx_spi_probe(struct platform_device *op)
433 goto err_alloc; 433 goto err_alloc;
434 } 434 }
435 435
436 master->bus_num = -1;
437 master->setup = mpc52xx_spi_setup; 436 master->setup = mpc52xx_spi_setup;
438 master->transfer = mpc52xx_spi_transfer; 437 master->transfer = mpc52xx_spi_transfer;
439 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; 438 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
@@ -479,8 +478,6 @@ static int __devinit mpc52xx_spi_probe(struct platform_device *op)
479 gpio_direction_output(gpio_cs, 1); 478 gpio_direction_output(gpio_cs, 1);
480 ms->gpio_cs[i] = gpio_cs; 479 ms->gpio_cs[i] = gpio_cs;
481 } 480 }
482 } else {
483 master->num_chipselect = 1;
484 } 481 }
485 482
486 spin_lock_init(&ms->lock); 483 spin_lock_init(&ms->lock);
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index bb9274c2526d..46ef5fe51db5 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -44,9 +44,7 @@
44#include <plat/mcspi.h> 44#include <plat/mcspi.h>
45 45
46#define OMAP2_MCSPI_MAX_FREQ 48000000 46#define OMAP2_MCSPI_MAX_FREQ 48000000
47 47#define SPI_AUTOSUSPEND_TIMEOUT 2000
48/* OMAP2 has 3 SPI controllers, while OMAP3 has 4 */
49#define OMAP2_MCSPI_MAX_CTRL 4
50 48
51#define OMAP2_MCSPI_REVISION 0x00 49#define OMAP2_MCSPI_REVISION 0x00
52#define OMAP2_MCSPI_SYSSTATUS 0x14 50#define OMAP2_MCSPI_SYSSTATUS 0x14
@@ -111,19 +109,25 @@ struct omap2_mcspi_dma {
111#define DMA_MIN_BYTES 160 109#define DMA_MIN_BYTES 160
112 110
113 111
112/*
113 * Used for context save and restore, structure members to be updated whenever
114 * corresponding registers are modified.
115 */
116struct omap2_mcspi_regs {
117 u32 modulctrl;
118 u32 wakeupenable;
119 struct list_head cs;
120};
121
114struct omap2_mcspi { 122struct omap2_mcspi {
115 struct work_struct work;
116 /* lock protects queue and registers */
117 spinlock_t lock;
118 struct list_head msg_queue;
119 struct spi_master *master; 123 struct spi_master *master;
120 /* Virtual base address of the controller */ 124 /* Virtual base address of the controller */
121 void __iomem *base; 125 void __iomem *base;
122 unsigned long phys; 126 unsigned long phys;
123 /* SPI1 has 4 channels, while SPI2 has 2 */ 127 /* SPI1 has 4 channels, while SPI2 has 2 */
124 struct omap2_mcspi_dma *dma_channels; 128 struct omap2_mcspi_dma *dma_channels;
125 struct device *dev; 129 struct device *dev;
126 struct workqueue_struct *wq; 130 struct omap2_mcspi_regs ctx;
127}; 131};
128 132
129struct omap2_mcspi_cs { 133struct omap2_mcspi_cs {
@@ -135,17 +139,6 @@ struct omap2_mcspi_cs {
135 u32 chconf0; 139 u32 chconf0;
136}; 140};
137 141
138/* used for context save and restore, structure members to be updated whenever
139 * corresponding registers are modified.
140 */
141struct omap2_mcspi_regs {
142 u32 modulctrl;
143 u32 wakeupenable;
144 struct list_head cs;
145};
146
147static struct omap2_mcspi_regs omap2_mcspi_ctx[OMAP2_MCSPI_MAX_CTRL];
148
149#define MOD_REG_BIT(val, mask, set) do { \ 142#define MOD_REG_BIT(val, mask, set) do { \
150 if (set) \ 143 if (set) \
151 val |= mask; \ 144 val |= mask; \
@@ -236,9 +229,12 @@ static void omap2_mcspi_force_cs(struct spi_device *spi, int cs_active)
236 229
237static void omap2_mcspi_set_master_mode(struct spi_master *master) 230static void omap2_mcspi_set_master_mode(struct spi_master *master)
238{ 231{
232 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
233 struct omap2_mcspi_regs *ctx = &mcspi->ctx;
239 u32 l; 234 u32 l;
240 235
241 /* setup when switching from (reset default) slave mode 236 /*
237 * Setup when switching from (reset default) slave mode
242 * to single-channel master mode 238 * to single-channel master mode
243 */ 239 */
244 l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL); 240 l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL);
@@ -247,29 +243,26 @@ static void omap2_mcspi_set_master_mode(struct spi_master *master)
247 MOD_REG_BIT(l, OMAP2_MCSPI_MODULCTRL_SINGLE, 1); 243 MOD_REG_BIT(l, OMAP2_MCSPI_MODULCTRL_SINGLE, 1);
248 mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l); 244 mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l);
249 245
250 omap2_mcspi_ctx[master->bus_num - 1].modulctrl = l; 246 ctx->modulctrl = l;
251} 247}
252 248
253static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi) 249static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
254{ 250{
255 struct spi_master *spi_cntrl; 251 struct spi_master *spi_cntrl = mcspi->master;
256 struct omap2_mcspi_cs *cs; 252 struct omap2_mcspi_regs *ctx = &mcspi->ctx;
257 spi_cntrl = mcspi->master; 253 struct omap2_mcspi_cs *cs;
258 254
259 /* McSPI: context restore */ 255 /* McSPI: context restore */
260 mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL, 256 mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL, ctx->modulctrl);
261 omap2_mcspi_ctx[spi_cntrl->bus_num - 1].modulctrl); 257 mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE, ctx->wakeupenable);
262
263 mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
264 omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
265 258
266 list_for_each_entry(cs, &omap2_mcspi_ctx[spi_cntrl->bus_num - 1].cs, 259 list_for_each_entry(cs, &ctx->cs, node)
267 node)
268 __raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0); 260 __raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0);
269} 261}
270static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi) 262static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
271{ 263{
272 pm_runtime_put_sync(mcspi->dev); 264 pm_runtime_mark_last_busy(mcspi->dev);
265 pm_runtime_put_autosuspend(mcspi->dev);
273} 266}
274 267
275static int omap2_mcspi_enable_clocks(struct omap2_mcspi *mcspi) 268static int omap2_mcspi_enable_clocks(struct omap2_mcspi *mcspi)
@@ -277,6 +270,23 @@ static int omap2_mcspi_enable_clocks(struct omap2_mcspi *mcspi)
277 return pm_runtime_get_sync(mcspi->dev); 270 return pm_runtime_get_sync(mcspi->dev);
278} 271}
279 272
273static int omap2_prepare_transfer(struct spi_master *master)
274{
275 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
276
277 pm_runtime_get_sync(mcspi->dev);
278 return 0;
279}
280
281static int omap2_unprepare_transfer(struct spi_master *master)
282{
283 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
284
285 pm_runtime_mark_last_busy(mcspi->dev);
286 pm_runtime_put_autosuspend(mcspi->dev);
287 return 0;
288}
289
280static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit) 290static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit)
281{ 291{
282 unsigned long timeout; 292 unsigned long timeout;
@@ -777,7 +787,8 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
777static int omap2_mcspi_setup(struct spi_device *spi) 787static int omap2_mcspi_setup(struct spi_device *spi)
778{ 788{
779 int ret; 789 int ret;
780 struct omap2_mcspi *mcspi; 790 struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);
791 struct omap2_mcspi_regs *ctx = &mcspi->ctx;
781 struct omap2_mcspi_dma *mcspi_dma; 792 struct omap2_mcspi_dma *mcspi_dma;
782 struct omap2_mcspi_cs *cs = spi->controller_state; 793 struct omap2_mcspi_cs *cs = spi->controller_state;
783 794
@@ -787,11 +798,10 @@ static int omap2_mcspi_setup(struct spi_device *spi)
787 return -EINVAL; 798 return -EINVAL;
788 } 799 }
789 800
790 mcspi = spi_master_get_devdata(spi->master);
791 mcspi_dma = &mcspi->dma_channels[spi->chip_select]; 801 mcspi_dma = &mcspi->dma_channels[spi->chip_select];
792 802
793 if (!cs) { 803 if (!cs) {
794 cs = kzalloc(sizeof *cs, GFP_KERNEL); 804 cs = devm_kzalloc(&spi->dev , sizeof *cs, GFP_KERNEL);
795 if (!cs) 805 if (!cs)
796 return -ENOMEM; 806 return -ENOMEM;
797 cs->base = mcspi->base + spi->chip_select * 0x14; 807 cs->base = mcspi->base + spi->chip_select * 0x14;
@@ -799,8 +809,7 @@ static int omap2_mcspi_setup(struct spi_device *spi)
799 cs->chconf0 = 0; 809 cs->chconf0 = 0;
800 spi->controller_state = cs; 810 spi->controller_state = cs;
801 /* Link this to context save list */ 811 /* Link this to context save list */
802 list_add_tail(&cs->node, 812 list_add_tail(&cs->node, &ctx->cs);
803 &omap2_mcspi_ctx[mcspi->master->bus_num - 1].cs);
804 } 813 }
805 814
806 if (mcspi_dma->dma_rx_channel == -1 815 if (mcspi_dma->dma_rx_channel == -1
@@ -833,7 +842,6 @@ static void omap2_mcspi_cleanup(struct spi_device *spi)
833 cs = spi->controller_state; 842 cs = spi->controller_state;
834 list_del(&cs->node); 843 list_del(&cs->node);
835 844
836 kfree(spi->controller_state);
837 } 845 }
838 846
839 if (spi->chip_select < spi->master->num_chipselect) { 847 if (spi->chip_select < spi->master->num_chipselect) {
@@ -850,144 +858,122 @@ static void omap2_mcspi_cleanup(struct spi_device *spi)
850 } 858 }
851} 859}
852 860
853static void omap2_mcspi_work(struct work_struct *work) 861static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m)
854{ 862{
855 struct omap2_mcspi *mcspi;
856
857 mcspi = container_of(work, struct omap2_mcspi, work);
858
859 if (omap2_mcspi_enable_clocks(mcspi) < 0)
860 return;
861
862 spin_lock_irq(&mcspi->lock);
863 863
864 /* We only enable one channel at a time -- the one whose message is 864 /* We only enable one channel at a time -- the one whose message is
865 * at the head of the queue -- although this controller would gladly 865 * -- although this controller would gladly
866 * arbitrate among multiple channels. This corresponds to "single 866 * arbitrate among multiple channels. This corresponds to "single
867 * channel" master mode. As a side effect, we need to manage the 867 * channel" master mode. As a side effect, we need to manage the
868 * chipselect with the FORCE bit ... CS != channel enable. 868 * chipselect with the FORCE bit ... CS != channel enable.
869 */ 869 */
870 while (!list_empty(&mcspi->msg_queue)) {
871 struct spi_message *m;
872 struct spi_device *spi;
873 struct spi_transfer *t = NULL;
874 int cs_active = 0;
875 struct omap2_mcspi_cs *cs;
876 struct omap2_mcspi_device_config *cd;
877 int par_override = 0;
878 int status = 0;
879 u32 chconf;
880
881 m = container_of(mcspi->msg_queue.next, struct spi_message,
882 queue);
883
884 list_del_init(&m->queue);
885 spin_unlock_irq(&mcspi->lock);
886
887 spi = m->spi;
888 cs = spi->controller_state;
889 cd = spi->controller_data;
890 870
891 omap2_mcspi_set_enable(spi, 1); 871 struct spi_device *spi;
892 list_for_each_entry(t, &m->transfers, transfer_list) { 872 struct spi_transfer *t = NULL;
893 if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) { 873 int cs_active = 0;
894 status = -EINVAL; 874 struct omap2_mcspi_cs *cs;
895 break; 875 struct omap2_mcspi_device_config *cd;
896 } 876 int par_override = 0;
897 if (par_override || t->speed_hz || t->bits_per_word) { 877 int status = 0;
898 par_override = 1; 878 u32 chconf;
899 status = omap2_mcspi_setup_transfer(spi, t);
900 if (status < 0)
901 break;
902 if (!t->speed_hz && !t->bits_per_word)
903 par_override = 0;
904 }
905 879
906 if (!cs_active) { 880 spi = m->spi;
907 omap2_mcspi_force_cs(spi, 1); 881 cs = spi->controller_state;
908 cs_active = 1; 882 cd = spi->controller_data;
909 }
910 883
911 chconf = mcspi_cached_chconf0(spi); 884 omap2_mcspi_set_enable(spi, 1);
912 chconf &= ~OMAP2_MCSPI_CHCONF_TRM_MASK; 885 list_for_each_entry(t, &m->transfers, transfer_list) {
913 chconf &= ~OMAP2_MCSPI_CHCONF_TURBO; 886 if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
887 status = -EINVAL;
888 break;
889 }
890 if (par_override || t->speed_hz || t->bits_per_word) {
891 par_override = 1;
892 status = omap2_mcspi_setup_transfer(spi, t);
893 if (status < 0)
894 break;
895 if (!t->speed_hz && !t->bits_per_word)
896 par_override = 0;
897 }
914 898
915 if (t->tx_buf == NULL) 899 if (!cs_active) {
916 chconf |= OMAP2_MCSPI_CHCONF_TRM_RX_ONLY; 900 omap2_mcspi_force_cs(spi, 1);
917 else if (t->rx_buf == NULL) 901 cs_active = 1;
918 chconf |= OMAP2_MCSPI_CHCONF_TRM_TX_ONLY; 902 }
919
920 if (cd && cd->turbo_mode && t->tx_buf == NULL) {
921 /* Turbo mode is for more than one word */
922 if (t->len > ((cs->word_len + 7) >> 3))
923 chconf |= OMAP2_MCSPI_CHCONF_TURBO;
924 }
925 903
926 mcspi_write_chconf0(spi, chconf); 904 chconf = mcspi_cached_chconf0(spi);
905 chconf &= ~OMAP2_MCSPI_CHCONF_TRM_MASK;
906 chconf &= ~OMAP2_MCSPI_CHCONF_TURBO;
927 907
928 if (t->len) { 908 if (t->tx_buf == NULL)
929 unsigned count; 909 chconf |= OMAP2_MCSPI_CHCONF_TRM_RX_ONLY;
910 else if (t->rx_buf == NULL)
911 chconf |= OMAP2_MCSPI_CHCONF_TRM_TX_ONLY;
930 912
931 /* RX_ONLY mode needs dummy data in TX reg */ 913 if (cd && cd->turbo_mode && t->tx_buf == NULL) {
932 if (t->tx_buf == NULL) 914 /* Turbo mode is for more than one word */
933 __raw_writel(0, cs->base 915 if (t->len > ((cs->word_len + 7) >> 3))
934 + OMAP2_MCSPI_TX0); 916 chconf |= OMAP2_MCSPI_CHCONF_TURBO;
917 }
935 918
936 if (m->is_dma_mapped || t->len >= DMA_MIN_BYTES) 919 mcspi_write_chconf0(spi, chconf);
937 count = omap2_mcspi_txrx_dma(spi, t);
938 else
939 count = omap2_mcspi_txrx_pio(spi, t);
940 m->actual_length += count;
941 920
942 if (count != t->len) { 921 if (t->len) {
943 status = -EIO; 922 unsigned count;
944 break;
945 }
946 }
947 923
948 if (t->delay_usecs) 924 /* RX_ONLY mode needs dummy data in TX reg */
949 udelay(t->delay_usecs); 925 if (t->tx_buf == NULL)
926 __raw_writel(0, cs->base
927 + OMAP2_MCSPI_TX0);
928
929 if (m->is_dma_mapped || t->len >= DMA_MIN_BYTES)
930 count = omap2_mcspi_txrx_dma(spi, t);
931 else
932 count = omap2_mcspi_txrx_pio(spi, t);
933 m->actual_length += count;
950 934
951 /* ignore the "leave it on after last xfer" hint */ 935 if (count != t->len) {
952 if (t->cs_change) { 936 status = -EIO;
953 omap2_mcspi_force_cs(spi, 0); 937 break;
954 cs_active = 0;
955 } 938 }
956 } 939 }
957 940
958 /* Restore defaults if they were overriden */ 941 if (t->delay_usecs)
959 if (par_override) { 942 udelay(t->delay_usecs);
960 par_override = 0;
961 status = omap2_mcspi_setup_transfer(spi, NULL);
962 }
963 943
964 if (cs_active) 944 /* ignore the "leave it on after last xfer" hint */
945 if (t->cs_change) {
965 omap2_mcspi_force_cs(spi, 0); 946 omap2_mcspi_force_cs(spi, 0);
947 cs_active = 0;
948 }
949 }
950 /* Restore defaults if they were overriden */
951 if (par_override) {
952 par_override = 0;
953 status = omap2_mcspi_setup_transfer(spi, NULL);
954 }
966 955
967 omap2_mcspi_set_enable(spi, 0); 956 if (cs_active)
968 957 omap2_mcspi_force_cs(spi, 0);
969 m->status = status;
970 m->complete(m->context);
971 958
972 spin_lock_irq(&mcspi->lock); 959 omap2_mcspi_set_enable(spi, 0);
973 }
974 960
975 spin_unlock_irq(&mcspi->lock); 961 m->status = status;
976 962
977 omap2_mcspi_disable_clocks(mcspi);
978} 963}
979 964
980static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m) 965static int omap2_mcspi_transfer_one_message(struct spi_master *master,
966 struct spi_message *m)
981{ 967{
982 struct omap2_mcspi *mcspi; 968 struct omap2_mcspi *mcspi;
983 unsigned long flags;
984 struct spi_transfer *t; 969 struct spi_transfer *t;
985 970
971 mcspi = spi_master_get_devdata(master);
986 m->actual_length = 0; 972 m->actual_length = 0;
987 m->status = 0; 973 m->status = 0;
988 974
989 /* reject invalid messages and transfers */ 975 /* reject invalid messages and transfers */
990 if (list_empty(&m->transfers) || !m->complete) 976 if (list_empty(&m->transfers))
991 return -EINVAL; 977 return -EINVAL;
992 list_for_each_entry(t, &m->transfers, transfer_list) { 978 list_for_each_entry(t, &m->transfers, transfer_list) {
993 const void *tx_buf = t->tx_buf; 979 const void *tx_buf = t->tx_buf;
@@ -999,7 +985,7 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
999 || (t->bits_per_word && 985 || (t->bits_per_word &&
1000 ( t->bits_per_word < 4 986 ( t->bits_per_word < 4
1001 || t->bits_per_word > 32))) { 987 || t->bits_per_word > 32))) {
1002 dev_dbg(&spi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n", 988 dev_dbg(mcspi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n",
1003 t->speed_hz, 989 t->speed_hz,
1004 len, 990 len,
1005 tx_buf ? "tx" : "", 991 tx_buf ? "tx" : "",
@@ -1008,7 +994,7 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
1008 return -EINVAL; 994 return -EINVAL;
1009 } 995 }
1010 if (t->speed_hz && t->speed_hz < (OMAP2_MCSPI_MAX_FREQ >> 15)) { 996 if (t->speed_hz && t->speed_hz < (OMAP2_MCSPI_MAX_FREQ >> 15)) {
1011 dev_dbg(&spi->dev, "speed_hz %d below minimum %d Hz\n", 997 dev_dbg(mcspi->dev, "speed_hz %d below minimum %d Hz\n",
1012 t->speed_hz, 998 t->speed_hz,
1013 OMAP2_MCSPI_MAX_FREQ >> 15); 999 OMAP2_MCSPI_MAX_FREQ >> 15);
1014 return -EINVAL; 1000 return -EINVAL;
@@ -1018,51 +1004,46 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
1018 continue; 1004 continue;
1019 1005
1020 if (tx_buf != NULL) { 1006 if (tx_buf != NULL) {
1021 t->tx_dma = dma_map_single(&spi->dev, (void *) tx_buf, 1007 t->tx_dma = dma_map_single(mcspi->dev, (void *) tx_buf,
1022 len, DMA_TO_DEVICE); 1008 len, DMA_TO_DEVICE);
1023 if (dma_mapping_error(&spi->dev, t->tx_dma)) { 1009 if (dma_mapping_error(mcspi->dev, t->tx_dma)) {
1024 dev_dbg(&spi->dev, "dma %cX %d bytes error\n", 1010 dev_dbg(mcspi->dev, "dma %cX %d bytes error\n",
1025 'T', len); 1011 'T', len);
1026 return -EINVAL; 1012 return -EINVAL;
1027 } 1013 }
1028 } 1014 }
1029 if (rx_buf != NULL) { 1015 if (rx_buf != NULL) {
1030 t->rx_dma = dma_map_single(&spi->dev, rx_buf, t->len, 1016 t->rx_dma = dma_map_single(mcspi->dev, rx_buf, t->len,
1031 DMA_FROM_DEVICE); 1017 DMA_FROM_DEVICE);
1032 if (dma_mapping_error(&spi->dev, t->rx_dma)) { 1018 if (dma_mapping_error(mcspi->dev, t->rx_dma)) {
1033 dev_dbg(&spi->dev, "dma %cX %d bytes error\n", 1019 dev_dbg(mcspi->dev, "dma %cX %d bytes error\n",
1034 'R', len); 1020 'R', len);
1035 if (tx_buf != NULL) 1021 if (tx_buf != NULL)
1036 dma_unmap_single(&spi->dev, t->tx_dma, 1022 dma_unmap_single(mcspi->dev, t->tx_dma,
1037 len, DMA_TO_DEVICE); 1023 len, DMA_TO_DEVICE);
1038 return -EINVAL; 1024 return -EINVAL;
1039 } 1025 }
1040 } 1026 }
1041 } 1027 }
1042 1028
1043 mcspi = spi_master_get_devdata(spi->master); 1029 omap2_mcspi_work(mcspi, m);
1044 1030 spi_finalize_current_message(master);
1045 spin_lock_irqsave(&mcspi->lock, flags);
1046 list_add_tail(&m->queue, &mcspi->msg_queue);
1047 queue_work(mcspi->wq, &mcspi->work);
1048 spin_unlock_irqrestore(&mcspi->lock, flags);
1049
1050 return 0; 1031 return 0;
1051} 1032}
1052 1033
1053static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi) 1034static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
1054{ 1035{
1055 struct spi_master *master = mcspi->master; 1036 struct spi_master *master = mcspi->master;
1056 u32 tmp; 1037 struct omap2_mcspi_regs *ctx = &mcspi->ctx;
1057 int ret = 0; 1038 int ret = 0;
1058 1039
1059 ret = omap2_mcspi_enable_clocks(mcspi); 1040 ret = omap2_mcspi_enable_clocks(mcspi);
1060 if (ret < 0) 1041 if (ret < 0)
1061 return ret; 1042 return ret;
1062 1043
1063 tmp = OMAP2_MCSPI_WAKEUPENABLE_WKEN; 1044 mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE,
1064 mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, tmp); 1045 OMAP2_MCSPI_WAKEUPENABLE_WKEN);
1065 omap2_mcspi_ctx[master->bus_num - 1].wakeupenable = tmp; 1046 ctx->wakeupenable = OMAP2_MCSPI_WAKEUPENABLE_WKEN;
1066 1047
1067 omap2_mcspi_set_master_mode(master); 1048 omap2_mcspi_set_master_mode(master);
1068 omap2_mcspi_disable_clocks(mcspi); 1049 omap2_mcspi_disable_clocks(mcspi);
@@ -1102,14 +1083,13 @@ static const struct of_device_id omap_mcspi_of_match[] = {
1102}; 1083};
1103MODULE_DEVICE_TABLE(of, omap_mcspi_of_match); 1084MODULE_DEVICE_TABLE(of, omap_mcspi_of_match);
1104 1085
1105static int __init omap2_mcspi_probe(struct platform_device *pdev) 1086static int __devinit omap2_mcspi_probe(struct platform_device *pdev)
1106{ 1087{
1107 struct spi_master *master; 1088 struct spi_master *master;
1108 struct omap2_mcspi_platform_config *pdata; 1089 struct omap2_mcspi_platform_config *pdata;
1109 struct omap2_mcspi *mcspi; 1090 struct omap2_mcspi *mcspi;
1110 struct resource *r; 1091 struct resource *r;
1111 int status = 0, i; 1092 int status = 0, i;
1112 char wq_name[20];
1113 u32 regs_offset = 0; 1093 u32 regs_offset = 0;
1114 static int bus_num = 1; 1094 static int bus_num = 1;
1115 struct device_node *node = pdev->dev.of_node; 1095 struct device_node *node = pdev->dev.of_node;
@@ -1125,7 +1105,9 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
1125 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; 1105 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
1126 1106
1127 master->setup = omap2_mcspi_setup; 1107 master->setup = omap2_mcspi_setup;
1128 master->transfer = omap2_mcspi_transfer; 1108 master->prepare_transfer_hardware = omap2_prepare_transfer;
1109 master->unprepare_transfer_hardware = omap2_unprepare_transfer;
1110 master->transfer_one_message = omap2_mcspi_transfer_one_message;
1129 master->cleanup = omap2_mcspi_cleanup; 1111 master->cleanup = omap2_mcspi_cleanup;
1130 master->dev.of_node = node; 1112 master->dev.of_node = node;
1131 1113
@@ -1150,13 +1132,6 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
1150 mcspi = spi_master_get_devdata(master); 1132 mcspi = spi_master_get_devdata(master);
1151 mcspi->master = master; 1133 mcspi->master = master;
1152 1134
1153 sprintf(wq_name, "omap2_mcspi/%d", master->bus_num);
1154 mcspi->wq = alloc_workqueue(wq_name, WQ_MEM_RECLAIM, 1);
1155 if (mcspi->wq == NULL) {
1156 status = -ENOMEM;
1157 goto free_master;
1158 }
1159
1160 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1135 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1161 if (r == NULL) { 1136 if (r == NULL) {
1162 status = -ENODEV; 1137 status = -ENODEV;
@@ -1166,32 +1141,24 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
1166 r->start += regs_offset; 1141 r->start += regs_offset;
1167 r->end += regs_offset; 1142 r->end += regs_offset;
1168 mcspi->phys = r->start; 1143 mcspi->phys = r->start;
1169 if (!request_mem_region(r->start, resource_size(r),
1170 dev_name(&pdev->dev))) {
1171 status = -EBUSY;
1172 goto free_master;
1173 }
1174 1144
1175 mcspi->base = ioremap(r->start, resource_size(r)); 1145 mcspi->base = devm_request_and_ioremap(&pdev->dev, r);
1176 if (!mcspi->base) { 1146 if (!mcspi->base) {
1177 dev_dbg(&pdev->dev, "can't ioremap MCSPI\n"); 1147 dev_dbg(&pdev->dev, "can't ioremap MCSPI\n");
1178 status = -ENOMEM; 1148 status = -ENOMEM;
1179 goto release_region; 1149 goto free_master;
1180 } 1150 }
1181 1151
1182 mcspi->dev = &pdev->dev; 1152 mcspi->dev = &pdev->dev;
1183 INIT_WORK(&mcspi->work, omap2_mcspi_work);
1184 1153
1185 spin_lock_init(&mcspi->lock); 1154 INIT_LIST_HEAD(&mcspi->ctx.cs);
1186 INIT_LIST_HEAD(&mcspi->msg_queue);
1187 INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
1188 1155
1189 mcspi->dma_channels = kcalloc(master->num_chipselect, 1156 mcspi->dma_channels = kcalloc(master->num_chipselect,
1190 sizeof(struct omap2_mcspi_dma), 1157 sizeof(struct omap2_mcspi_dma),
1191 GFP_KERNEL); 1158 GFP_KERNEL);
1192 1159
1193 if (mcspi->dma_channels == NULL) 1160 if (mcspi->dma_channels == NULL)
1194 goto unmap_io; 1161 goto free_master;
1195 1162
1196 for (i = 0; i < master->num_chipselect; i++) { 1163 for (i = 0; i < master->num_chipselect; i++) {
1197 char dma_ch_name[14]; 1164 char dma_ch_name[14];
@@ -1224,6 +1191,8 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
1224 if (status < 0) 1191 if (status < 0)
1225 goto dma_chnl_free; 1192 goto dma_chnl_free;
1226 1193
1194 pm_runtime_use_autosuspend(&pdev->dev);
1195 pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);
1227 pm_runtime_enable(&pdev->dev); 1196 pm_runtime_enable(&pdev->dev);
1228 1197
1229 if (status || omap2_mcspi_master_setup(mcspi) < 0) 1198 if (status || omap2_mcspi_master_setup(mcspi) < 0)
@@ -1241,23 +1210,17 @@ disable_pm:
1241 pm_runtime_disable(&pdev->dev); 1210 pm_runtime_disable(&pdev->dev);
1242dma_chnl_free: 1211dma_chnl_free:
1243 kfree(mcspi->dma_channels); 1212 kfree(mcspi->dma_channels);
1244unmap_io:
1245 iounmap(mcspi->base);
1246release_region:
1247 release_mem_region(r->start, resource_size(r));
1248free_master: 1213free_master:
1249 kfree(master); 1214 kfree(master);
1250 platform_set_drvdata(pdev, NULL); 1215 platform_set_drvdata(pdev, NULL);
1251 return status; 1216 return status;
1252} 1217}
1253 1218
1254static int __exit omap2_mcspi_remove(struct platform_device *pdev) 1219static int __devexit omap2_mcspi_remove(struct platform_device *pdev)
1255{ 1220{
1256 struct spi_master *master; 1221 struct spi_master *master;
1257 struct omap2_mcspi *mcspi; 1222 struct omap2_mcspi *mcspi;
1258 struct omap2_mcspi_dma *dma_channels; 1223 struct omap2_mcspi_dma *dma_channels;
1259 struct resource *r;
1260 void __iomem *base;
1261 1224
1262 master = dev_get_drvdata(&pdev->dev); 1225 master = dev_get_drvdata(&pdev->dev);
1263 mcspi = spi_master_get_devdata(master); 1226 mcspi = spi_master_get_devdata(master);
@@ -1265,14 +1228,9 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev)
1265 1228
1266 omap2_mcspi_disable_clocks(mcspi); 1229 omap2_mcspi_disable_clocks(mcspi);
1267 pm_runtime_disable(&pdev->dev); 1230 pm_runtime_disable(&pdev->dev);
1268 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1269 release_mem_region(r->start, resource_size(r));
1270 1231
1271 base = mcspi->base;
1272 spi_unregister_master(master); 1232 spi_unregister_master(master);
1273 iounmap(base);
1274 kfree(dma_channels); 1233 kfree(dma_channels);
1275 destroy_workqueue(mcspi->wq);
1276 platform_set_drvdata(pdev, NULL); 1234 platform_set_drvdata(pdev, NULL);
1277 1235
1278 return 0; 1236 return 0;
@@ -1291,13 +1249,12 @@ static int omap2_mcspi_resume(struct device *dev)
1291{ 1249{
1292 struct spi_master *master = dev_get_drvdata(dev); 1250 struct spi_master *master = dev_get_drvdata(dev);
1293 struct omap2_mcspi *mcspi = spi_master_get_devdata(master); 1251 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1294 struct omap2_mcspi_cs *cs; 1252 struct omap2_mcspi_regs *ctx = &mcspi->ctx;
1253 struct omap2_mcspi_cs *cs;
1295 1254
1296 omap2_mcspi_enable_clocks(mcspi); 1255 omap2_mcspi_enable_clocks(mcspi);
1297 list_for_each_entry(cs, &omap2_mcspi_ctx[master->bus_num - 1].cs, 1256 list_for_each_entry(cs, &ctx->cs, node) {
1298 node) {
1299 if ((cs->chconf0 & OMAP2_MCSPI_CHCONF_FORCE) == 0) { 1257 if ((cs->chconf0 & OMAP2_MCSPI_CHCONF_FORCE) == 0) {
1300
1301 /* 1258 /*
1302 * We need to toggle CS state for OMAP take this 1259 * We need to toggle CS state for OMAP take this
1303 * change in account. 1260 * change in account.
@@ -1327,21 +1284,9 @@ static struct platform_driver omap2_mcspi_driver = {
1327 .pm = &omap2_mcspi_pm_ops, 1284 .pm = &omap2_mcspi_pm_ops,
1328 .of_match_table = omap_mcspi_of_match, 1285 .of_match_table = omap_mcspi_of_match,
1329 }, 1286 },
1330 .remove = __exit_p(omap2_mcspi_remove), 1287 .probe = omap2_mcspi_probe,
1288 .remove = __devexit_p(omap2_mcspi_remove),
1331}; 1289};
1332 1290
1333 1291module_platform_driver(omap2_mcspi_driver);
1334static int __init omap2_mcspi_init(void)
1335{
1336 return platform_driver_probe(&omap2_mcspi_driver, omap2_mcspi_probe);
1337}
1338subsys_initcall(omap2_mcspi_init);
1339
1340static void __exit omap2_mcspi_exit(void)
1341{
1342 platform_driver_unregister(&omap2_mcspi_driver);
1343
1344}
1345module_exit(omap2_mcspi_exit);
1346
1347MODULE_LICENSE("GPL"); 1292MODULE_LICENSE("GPL");
diff --git a/drivers/spi/spi-ppc4xx.c b/drivers/spi/spi-ppc4xx.c
index 98ec53285fc7..75ac9d48ef46 100644
--- a/drivers/spi/spi-ppc4xx.c
+++ b/drivers/spi/spi-ppc4xx.c
@@ -30,7 +30,6 @@
30#include <linux/errno.h> 30#include <linux/errno.h>
31#include <linux/wait.h> 31#include <linux/wait.h>
32#include <linux/of_platform.h> 32#include <linux/of_platform.h>
33#include <linux/of_spi.h>
34#include <linux/of_gpio.h> 33#include <linux/of_gpio.h>
35#include <linux/interrupt.h> 34#include <linux/interrupt.h>
36#include <linux/delay.h> 35#include <linux/delay.h>
@@ -467,9 +466,6 @@ static int __init spi_ppc4xx_of_probe(struct platform_device *op)
467 bbp->master->setup = spi_ppc4xx_setup; 466 bbp->master->setup = spi_ppc4xx_setup;
468 bbp->master->cleanup = spi_ppc4xx_cleanup; 467 bbp->master->cleanup = spi_ppc4xx_cleanup;
469 468
470 /* Allocate bus num dynamically. */
471 bbp->master->bus_num = -1;
472
473 /* the spi->mode bits understood by this driver: */ 469 /* the spi->mode bits understood by this driver: */
474 bbp->master->mode_bits = 470 bbp->master->mode_bits =
475 SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST; 471 SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST;
diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index 3fb44afe27b4..9f6ba34b172c 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -164,17 +164,7 @@ static struct pci_driver ce4100_spi_driver = {
164 .remove = __devexit_p(ce4100_spi_remove), 164 .remove = __devexit_p(ce4100_spi_remove),
165}; 165};
166 166
167static int __init ce4100_spi_init(void) 167module_pci_driver(ce4100_spi_driver);
168{
169 return pci_register_driver(&ce4100_spi_driver);
170}
171module_init(ce4100_spi_init);
172
173static void __exit ce4100_spi_exit(void)
174{
175 pci_unregister_driver(&ce4100_spi_driver);
176}
177module_exit(ce4100_spi_exit);
178 168
179MODULE_DESCRIPTION("CE4100 PCI-SPI glue code for PXA's driver"); 169MODULE_DESCRIPTION("CE4100 PCI-SPI glue code for PXA's driver");
180MODULE_LICENSE("GPL v2"); 170MODULE_LICENSE("GPL v2");
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index 354f170eab95..4894bde4bbff 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -31,7 +31,11 @@
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/io.h> 32#include <linux/io.h>
33#include <linux/clk.h> 33#include <linux/clk.h>
34#include <linux/dmaengine.h>
35#include <linux/dma-mapping.h>
36#include <linux/sh_dma.h>
34#include <linux/spi/spi.h> 37#include <linux/spi/spi.h>
38#include <linux/spi/rspi.h>
35 39
36#define RSPI_SPCR 0x00 40#define RSPI_SPCR 0x00
37#define RSPI_SSLP 0x01 41#define RSPI_SSLP 0x01
@@ -141,6 +145,16 @@ struct rspi_data {
141 spinlock_t lock; 145 spinlock_t lock;
142 struct clk *clk; 146 struct clk *clk;
143 unsigned char spsr; 147 unsigned char spsr;
148
149 /* for dmaengine */
150 struct sh_dmae_slave dma_tx;
151 struct sh_dmae_slave dma_rx;
152 struct dma_chan *chan_tx;
153 struct dma_chan *chan_rx;
154 int irq;
155
156 unsigned dma_width_16bit:1;
157 unsigned dma_callbacked:1;
144}; 158};
145 159
146static void rspi_write8(struct rspi_data *rspi, u8 data, u16 offset) 160static void rspi_write8(struct rspi_data *rspi, u8 data, u16 offset)
@@ -265,11 +279,125 @@ static int rspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
265 return 0; 279 return 0;
266} 280}
267 281
268static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg, 282static void rspi_dma_complete(void *arg)
269 struct spi_transfer *t) 283{
284 struct rspi_data *rspi = arg;
285
286 rspi->dma_callbacked = 1;
287 wake_up_interruptible(&rspi->wait);
288}
289
290static int rspi_dma_map_sg(struct scatterlist *sg, void *buf, unsigned len,
291 struct dma_chan *chan,
292 enum dma_transfer_direction dir)
293{
294 sg_init_table(sg, 1);
295 sg_set_buf(sg, buf, len);
296 sg_dma_len(sg) = len;
297 return dma_map_sg(chan->device->dev, sg, 1, dir);
298}
299
300static void rspi_dma_unmap_sg(struct scatterlist *sg, struct dma_chan *chan,
301 enum dma_transfer_direction dir)
302{
303 dma_unmap_sg(chan->device->dev, sg, 1, dir);
304}
305
306static void rspi_memory_to_8bit(void *buf, const void *data, unsigned len)
307{
308 u16 *dst = buf;
309 const u8 *src = data;
310
311 while (len) {
312 *dst++ = (u16)(*src++);
313 len--;
314 }
315}
316
317static void rspi_memory_from_8bit(void *buf, const void *data, unsigned len)
318{
319 u8 *dst = buf;
320 const u16 *src = data;
321
322 while (len) {
323 *dst++ = (u8)*src++;
324 len--;
325 }
326}
327
328static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
329{
330 struct scatterlist sg;
331 void *buf = NULL;
332 struct dma_async_tx_descriptor *desc;
333 unsigned len;
334 int ret = 0;
335
336 if (rspi->dma_width_16bit) {
337 /*
338 * If DMAC bus width is 16-bit, the driver allocates a dummy
339 * buffer. And, the driver converts original data into the
340 * DMAC data as the following format:
341 * original data: 1st byte, 2nd byte ...
342 * DMAC data: 1st byte, dummy, 2nd byte, dummy ...
343 */
344 len = t->len * 2;
345 buf = kmalloc(len, GFP_KERNEL);
346 if (!buf)
347 return -ENOMEM;
348 rspi_memory_to_8bit(buf, t->tx_buf, t->len);
349 } else {
350 len = t->len;
351 buf = (void *)t->tx_buf;
352 }
353
354 if (!rspi_dma_map_sg(&sg, buf, len, rspi->chan_tx, DMA_TO_DEVICE)) {
355 ret = -EFAULT;
356 goto end_nomap;
357 }
358 desc = dmaengine_prep_slave_sg(rspi->chan_tx, &sg, 1, DMA_TO_DEVICE,
359 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
360 if (!desc) {
361 ret = -EIO;
362 goto end;
363 }
364
365 /*
366 * DMAC needs SPTIE, but if SPTIE is set, this IRQ routine will be
367 * called. So, this driver disables the IRQ while DMA transfer.
368 */
369 disable_irq(rspi->irq);
370
371 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | SPCR_TXMD, RSPI_SPCR);
372 rspi_enable_irq(rspi, SPCR_SPTIE);
373 rspi->dma_callbacked = 0;
374
375 desc->callback = rspi_dma_complete;
376 desc->callback_param = rspi;
377 dmaengine_submit(desc);
378 dma_async_issue_pending(rspi->chan_tx);
379
380 ret = wait_event_interruptible_timeout(rspi->wait,
381 rspi->dma_callbacked, HZ);
382 if (ret > 0 && rspi->dma_callbacked)
383 ret = 0;
384 else if (!ret)
385 ret = -ETIMEDOUT;
386 rspi_disable_irq(rspi, SPCR_SPTIE);
387
388 enable_irq(rspi->irq);
389
390end:
391 rspi_dma_unmap_sg(&sg, rspi->chan_tx, DMA_TO_DEVICE);
392end_nomap:
393 if (rspi->dma_width_16bit)
394 kfree(buf);
395
396 return ret;
397}
398
399static void rspi_receive_init(struct rspi_data *rspi)
270{ 400{
271 int remain = t->len;
272 u8 *data;
273 unsigned char spsr; 401 unsigned char spsr;
274 402
275 spsr = rspi_read8(rspi, RSPI_SPSR); 403 spsr = rspi_read8(rspi, RSPI_SPSR);
@@ -278,6 +406,15 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
278 if (spsr & SPSR_OVRF) 406 if (spsr & SPSR_OVRF)
279 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPSR) & ~SPSR_OVRF, 407 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPSR) & ~SPSR_OVRF,
280 RSPI_SPCR); 408 RSPI_SPCR);
409}
410
411static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
412 struct spi_transfer *t)
413{
414 int remain = t->len;
415 u8 *data;
416
417 rspi_receive_init(rspi);
281 418
282 data = (u8 *)t->rx_buf; 419 data = (u8 *)t->rx_buf;
283 while (remain > 0) { 420 while (remain > 0) {
@@ -307,6 +444,120 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
307 return 0; 444 return 0;
308} 445}
309 446
447static int rspi_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
448{
449 struct scatterlist sg, sg_dummy;
450 void *dummy = NULL, *rx_buf = NULL;
451 struct dma_async_tx_descriptor *desc, *desc_dummy;
452 unsigned len;
453 int ret = 0;
454
455 if (rspi->dma_width_16bit) {
456 /*
457 * If DMAC bus width is 16-bit, the driver allocates a dummy
458 * buffer. And, finally the driver converts the DMAC data into
459 * actual data as the following format:
460 * DMAC data: 1st byte, dummy, 2nd byte, dummy ...
461 * actual data: 1st byte, 2nd byte ...
462 */
463 len = t->len * 2;
464 rx_buf = kmalloc(len, GFP_KERNEL);
465 if (!rx_buf)
466 return -ENOMEM;
467 } else {
468 len = t->len;
469 rx_buf = t->rx_buf;
470 }
471
472 /* prepare dummy transfer to generate SPI clocks */
473 dummy = kzalloc(len, GFP_KERNEL);
474 if (!dummy) {
475 ret = -ENOMEM;
476 goto end_nomap;
477 }
478 if (!rspi_dma_map_sg(&sg_dummy, dummy, len, rspi->chan_tx,
479 DMA_TO_DEVICE)) {
480 ret = -EFAULT;
481 goto end_nomap;
482 }
483 desc_dummy = dmaengine_prep_slave_sg(rspi->chan_tx, &sg_dummy, 1,
484 DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
485 if (!desc_dummy) {
486 ret = -EIO;
487 goto end_dummy_mapped;
488 }
489
490 /* prepare receive transfer */
491 if (!rspi_dma_map_sg(&sg, rx_buf, len, rspi->chan_rx,
492 DMA_FROM_DEVICE)) {
493 ret = -EFAULT;
494 goto end_dummy_mapped;
495
496 }
497 desc = dmaengine_prep_slave_sg(rspi->chan_rx, &sg, 1, DMA_FROM_DEVICE,
498 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
499 if (!desc) {
500 ret = -EIO;
501 goto end;
502 }
503
504 rspi_receive_init(rspi);
505
506 /*
507 * DMAC needs SPTIE, but if SPTIE is set, this IRQ routine will be
508 * called. So, this driver disables the IRQ while DMA transfer.
509 */
510 disable_irq(rspi->irq);
511
512 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_TXMD, RSPI_SPCR);
513 rspi_enable_irq(rspi, SPCR_SPTIE | SPCR_SPRIE);
514 rspi->dma_callbacked = 0;
515
516 desc->callback = rspi_dma_complete;
517 desc->callback_param = rspi;
518 dmaengine_submit(desc);
519 dma_async_issue_pending(rspi->chan_rx);
520
521 desc_dummy->callback = NULL; /* No callback */
522 dmaengine_submit(desc_dummy);
523 dma_async_issue_pending(rspi->chan_tx);
524
525 ret = wait_event_interruptible_timeout(rspi->wait,
526 rspi->dma_callbacked, HZ);
527 if (ret > 0 && rspi->dma_callbacked)
528 ret = 0;
529 else if (!ret)
530 ret = -ETIMEDOUT;
531 rspi_disable_irq(rspi, SPCR_SPTIE | SPCR_SPRIE);
532
533 enable_irq(rspi->irq);
534
535end:
536 rspi_dma_unmap_sg(&sg, rspi->chan_rx, DMA_FROM_DEVICE);
537end_dummy_mapped:
538 rspi_dma_unmap_sg(&sg_dummy, rspi->chan_tx, DMA_TO_DEVICE);
539end_nomap:
540 if (rspi->dma_width_16bit) {
541 if (!ret)
542 rspi_memory_from_8bit(t->rx_buf, rx_buf, t->len);
543 kfree(rx_buf);
544 }
545 kfree(dummy);
546
547 return ret;
548}
549
550static int rspi_is_dma(struct rspi_data *rspi, struct spi_transfer *t)
551{
552 if (t->tx_buf && rspi->chan_tx)
553 return 1;
554 /* If the module receives data by DMAC, it also needs TX DMAC */
555 if (t->rx_buf && rspi->chan_tx && rspi->chan_rx)
556 return 1;
557
558 return 0;
559}
560
310static void rspi_work(struct work_struct *work) 561static void rspi_work(struct work_struct *work)
311{ 562{
312 struct rspi_data *rspi = container_of(work, struct rspi_data, ws); 563 struct rspi_data *rspi = container_of(work, struct rspi_data, ws);
@@ -325,12 +576,18 @@ static void rspi_work(struct work_struct *work)
325 576
326 list_for_each_entry(t, &mesg->transfers, transfer_list) { 577 list_for_each_entry(t, &mesg->transfers, transfer_list) {
327 if (t->tx_buf) { 578 if (t->tx_buf) {
328 ret = rspi_send_pio(rspi, mesg, t); 579 if (rspi_is_dma(rspi, t))
580 ret = rspi_send_dma(rspi, t);
581 else
582 ret = rspi_send_pio(rspi, mesg, t);
329 if (ret < 0) 583 if (ret < 0)
330 goto error; 584 goto error;
331 } 585 }
332 if (t->rx_buf) { 586 if (t->rx_buf) {
333 ret = rspi_receive_pio(rspi, mesg, t); 587 if (rspi_is_dma(rspi, t))
588 ret = rspi_receive_dma(rspi, t);
589 else
590 ret = rspi_receive_pio(rspi, mesg, t);
334 if (ret < 0) 591 if (ret < 0)
335 goto error; 592 goto error;
336 } 593 }
@@ -406,11 +663,58 @@ static irqreturn_t rspi_irq(int irq, void *_sr)
406 return ret; 663 return ret;
407} 664}
408 665
666static bool rspi_filter(struct dma_chan *chan, void *filter_param)
667{
668 chan->private = filter_param;
669 return true;
670}
671
672static void __devinit rspi_request_dma(struct rspi_data *rspi,
673 struct platform_device *pdev)
674{
675 struct rspi_plat_data *rspi_pd = pdev->dev.platform_data;
676 dma_cap_mask_t mask;
677
678 if (!rspi_pd)
679 return;
680
681 rspi->dma_width_16bit = rspi_pd->dma_width_16bit;
682
683 /* If the module receives data by DMAC, it also needs TX DMAC */
684 if (rspi_pd->dma_rx_id && rspi_pd->dma_tx_id) {
685 dma_cap_zero(mask);
686 dma_cap_set(DMA_SLAVE, mask);
687 rspi->dma_rx.slave_id = rspi_pd->dma_rx_id;
688 rspi->chan_rx = dma_request_channel(mask, rspi_filter,
689 &rspi->dma_rx);
690 if (rspi->chan_rx)
691 dev_info(&pdev->dev, "Use DMA when rx.\n");
692 }
693 if (rspi_pd->dma_tx_id) {
694 dma_cap_zero(mask);
695 dma_cap_set(DMA_SLAVE, mask);
696 rspi->dma_tx.slave_id = rspi_pd->dma_tx_id;
697 rspi->chan_tx = dma_request_channel(mask, rspi_filter,
698 &rspi->dma_tx);
699 if (rspi->chan_tx)
700 dev_info(&pdev->dev, "Use DMA when tx\n");
701 }
702}
703
704static void __devexit rspi_release_dma(struct rspi_data *rspi)
705{
706 if (rspi->chan_tx)
707 dma_release_channel(rspi->chan_tx);
708 if (rspi->chan_rx)
709 dma_release_channel(rspi->chan_rx);
710}
711
409static int __devexit rspi_remove(struct platform_device *pdev) 712static int __devexit rspi_remove(struct platform_device *pdev)
410{ 713{
411 struct rspi_data *rspi = dev_get_drvdata(&pdev->dev); 714 struct rspi_data *rspi = dev_get_drvdata(&pdev->dev);
412 715
413 spi_unregister_master(rspi->master); 716 spi_unregister_master(rspi->master);
717 rspi_release_dma(rspi);
414 free_irq(platform_get_irq(pdev, 0), rspi); 718 free_irq(platform_get_irq(pdev, 0), rspi);
415 clk_put(rspi->clk); 719 clk_put(rspi->clk);
416 iounmap(rspi->addr); 720 iounmap(rspi->addr);
@@ -483,6 +787,9 @@ static int __devinit rspi_probe(struct platform_device *pdev)
483 goto error3; 787 goto error3;
484 } 788 }
485 789
790 rspi->irq = irq;
791 rspi_request_dma(rspi, pdev);
792
486 ret = spi_register_master(master); 793 ret = spi_register_master(master);
487 if (ret < 0) { 794 if (ret < 0) {
488 dev_err(&pdev->dev, "spi_register_master error.\n"); 795 dev_err(&pdev->dev, "spi_register_master error.\n");
@@ -494,6 +801,7 @@ static int __devinit rspi_probe(struct platform_device *pdev)
494 return 0; 801 return 0;
495 802
496error4: 803error4:
804 rspi_release_dma(rspi);
497 free_irq(irq, rspi); 805 free_irq(irq, rspi);
498error3: 806error3:
499 clk_put(rspi->clk); 807 clk_put(rspi->clk);
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 52fe495bb32a..ecc3d9763d10 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -19,7 +19,7 @@
19#include <linux/of_gpio.h> 19#include <linux/of_gpio.h>
20#include <linux/spi/spi.h> 20#include <linux/spi/spi.h>
21#include <linux/spi/spi_bitbang.h> 21#include <linux/spi/spi_bitbang.h>
22#include <linux/pinctrl/pinmux.h> 22#include <linux/pinctrl/consumer.h>
23 23
24#define DRIVER_NAME "sirfsoc_spi" 24#define DRIVER_NAME "sirfsoc_spi"
25 25
@@ -127,7 +127,7 @@ struct sirfsoc_spi {
127 void __iomem *base; 127 void __iomem *base;
128 u32 ctrl_freq; /* SPI controller clock speed */ 128 u32 ctrl_freq; /* SPI controller clock speed */
129 struct clk *clk; 129 struct clk *clk;
130 struct pinmux *pmx; 130 struct pinctrl *p;
131 131
132 /* rx & tx bufs from the spi_transfer */ 132 /* rx & tx bufs from the spi_transfer */
133 const void *tx; 133 const void *tx;
@@ -560,17 +560,15 @@ static int __devinit spi_sirfsoc_probe(struct platform_device *pdev)
560 master->bus_num = pdev->id; 560 master->bus_num = pdev->id;
561 sspi->bitbang.master->dev.of_node = pdev->dev.of_node; 561 sspi->bitbang.master->dev.of_node = pdev->dev.of_node;
562 562
563 sspi->pmx = pinmux_get(&pdev->dev, NULL); 563 sspi->p = pinctrl_get_select_default(&pdev->dev);
564 ret = IS_ERR(sspi->pmx); 564 ret = IS_ERR(sspi->p);
565 if (ret) 565 if (ret)
566 goto free_master; 566 goto free_master;
567 567
568 pinmux_enable(sspi->pmx);
569
570 sspi->clk = clk_get(&pdev->dev, NULL); 568 sspi->clk = clk_get(&pdev->dev, NULL);
571 if (IS_ERR(sspi->clk)) { 569 if (IS_ERR(sspi->clk)) {
572 ret = -EINVAL; 570 ret = -EINVAL;
573 goto free_pmx; 571 goto free_pin;
574 } 572 }
575 clk_enable(sspi->clk); 573 clk_enable(sspi->clk);
576 sspi->ctrl_freq = clk_get_rate(sspi->clk); 574 sspi->ctrl_freq = clk_get_rate(sspi->clk);
@@ -598,9 +596,8 @@ static int __devinit spi_sirfsoc_probe(struct platform_device *pdev)
598free_clk: 596free_clk:
599 clk_disable(sspi->clk); 597 clk_disable(sspi->clk);
600 clk_put(sspi->clk); 598 clk_put(sspi->clk);
601free_pmx: 599free_pin:
602 pinmux_disable(sspi->pmx); 600 pinctrl_put(sspi->p);
603 pinmux_put(sspi->pmx);
604free_master: 601free_master:
605 spi_master_put(master); 602 spi_master_put(master);
606err_cs: 603err_cs:
@@ -623,8 +620,7 @@ static int __devexit spi_sirfsoc_remove(struct platform_device *pdev)
623 } 620 }
624 clk_disable(sspi->clk); 621 clk_disable(sspi->clk);
625 clk_put(sspi->clk); 622 clk_put(sspi->clk);
626 pinmux_disable(sspi->pmx); 623 pinctrl_put(sspi->p);
627 pinmux_put(sspi->pmx);
628 spi_master_put(master); 624 spi_master_put(master);
629 return 0; 625 return 0;
630} 626}
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
index ec47d3bdfd13..cd56dcf46320 100644
--- a/drivers/spi/spi-topcliff-pch.c
+++ b/drivers/spi/spi-topcliff-pch.c
@@ -1438,7 +1438,6 @@ static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev)
1438 plat_dev->id, data->io_remap_addr); 1438 plat_dev->id, data->io_remap_addr);
1439 1439
1440 /* initialize members of SPI master */ 1440 /* initialize members of SPI master */
1441 master->bus_num = -1;
1442 master->num_chipselect = PCH_MAX_CS; 1441 master->num_chipselect = PCH_MAX_CS;
1443 master->setup = pch_spi_setup; 1442 master->setup = pch_spi_setup;
1444 master->transfer = pch_spi_transfer; 1443 master->transfer = pch_spi_transfer;
@@ -1779,7 +1778,7 @@ static struct pci_driver pch_spi_pcidev_driver = {
1779 .name = "pch_spi", 1778 .name = "pch_spi",
1780 .id_table = pch_spi_pcidev_id, 1779 .id_table = pch_spi_pcidev_id,
1781 .probe = pch_spi_probe, 1780 .probe = pch_spi_probe,
1782 .remove = pch_spi_remove, 1781 .remove = __devexit_p(pch_spi_remove),
1783 .suspend = pch_spi_suspend, 1782 .suspend = pch_spi_suspend,
1784 .resume = pch_spi_resume, 1783 .resume = pch_spi_resume,
1785}; 1784};
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 3d8f662e4fe9..1041cb83d67a 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -2,6 +2,7 @@
2 * SPI init/core code 2 * SPI init/core code
3 * 3 *
4 * Copyright (C) 2005 David Brownell 4 * Copyright (C) 2005 David Brownell
5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -19,15 +20,16 @@
19 */ 20 */
20 21
21#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/kmod.h>
22#include <linux/device.h> 24#include <linux/device.h>
23#include <linux/init.h> 25#include <linux/init.h>
24#include <linux/cache.h> 26#include <linux/cache.h>
25#include <linux/mutex.h> 27#include <linux/mutex.h>
26#include <linux/of_device.h> 28#include <linux/of_device.h>
29#include <linux/of_irq.h>
27#include <linux/slab.h> 30#include <linux/slab.h>
28#include <linux/mod_devicetable.h> 31#include <linux/mod_devicetable.h>
29#include <linux/spi/spi.h> 32#include <linux/spi/spi.h>
30#include <linux/of_spi.h>
31#include <linux/pm_runtime.h> 33#include <linux/pm_runtime.h>
32#include <linux/export.h> 34#include <linux/export.h>
33#include <linux/sched.h> 35#include <linux/sched.h>
@@ -530,7 +532,7 @@ static void spi_pump_messages(struct kthread_work *work)
530 /* Lock queue and check for queue work */ 532 /* Lock queue and check for queue work */
531 spin_lock_irqsave(&master->queue_lock, flags); 533 spin_lock_irqsave(&master->queue_lock, flags);
532 if (list_empty(&master->queue) || !master->running) { 534 if (list_empty(&master->queue) || !master->running) {
533 if (master->busy) { 535 if (master->busy && master->unprepare_transfer_hardware) {
534 ret = master->unprepare_transfer_hardware(master); 536 ret = master->unprepare_transfer_hardware(master);
535 if (ret) { 537 if (ret) {
536 spin_unlock_irqrestore(&master->queue_lock, flags); 538 spin_unlock_irqrestore(&master->queue_lock, flags);
@@ -560,7 +562,7 @@ static void spi_pump_messages(struct kthread_work *work)
560 master->busy = true; 562 master->busy = true;
561 spin_unlock_irqrestore(&master->queue_lock, flags); 563 spin_unlock_irqrestore(&master->queue_lock, flags);
562 564
563 if (!was_busy) { 565 if (!was_busy && master->prepare_transfer_hardware) {
564 ret = master->prepare_transfer_hardware(master); 566 ret = master->prepare_transfer_hardware(master);
565 if (ret) { 567 if (ret) {
566 dev_err(&master->dev, 568 dev_err(&master->dev,
@@ -798,6 +800,94 @@ err_init_queue:
798 800
799/*-------------------------------------------------------------------------*/ 801/*-------------------------------------------------------------------------*/
800 802
803#if defined(CONFIG_OF) && !defined(CONFIG_SPARC)
804/**
805 * of_register_spi_devices() - Register child devices onto the SPI bus
806 * @master: Pointer to spi_master device
807 *
808 * Registers an spi_device for each child node of master node which has a 'reg'
809 * property.
810 */
811static void of_register_spi_devices(struct spi_master *master)
812{
813 struct spi_device *spi;
814 struct device_node *nc;
815 const __be32 *prop;
816 int rc;
817 int len;
818
819 if (!master->dev.of_node)
820 return;
821
822 for_each_child_of_node(master->dev.of_node, nc) {
823 /* Alloc an spi_device */
824 spi = spi_alloc_device(master);
825 if (!spi) {
826 dev_err(&master->dev, "spi_device alloc error for %s\n",
827 nc->full_name);
828 spi_dev_put(spi);
829 continue;
830 }
831
832 /* Select device driver */
833 if (of_modalias_node(nc, spi->modalias,
834 sizeof(spi->modalias)) < 0) {
835 dev_err(&master->dev, "cannot find modalias for %s\n",
836 nc->full_name);
837 spi_dev_put(spi);
838 continue;
839 }
840
841 /* Device address */
842 prop = of_get_property(nc, "reg", &len);
843 if (!prop || len < sizeof(*prop)) {
844 dev_err(&master->dev, "%s has no 'reg' property\n",
845 nc->full_name);
846 spi_dev_put(spi);
847 continue;
848 }
849 spi->chip_select = be32_to_cpup(prop);
850
851 /* Mode (clock phase/polarity/etc.) */
852 if (of_find_property(nc, "spi-cpha", NULL))
853 spi->mode |= SPI_CPHA;
854 if (of_find_property(nc, "spi-cpol", NULL))
855 spi->mode |= SPI_CPOL;
856 if (of_find_property(nc, "spi-cs-high", NULL))
857 spi->mode |= SPI_CS_HIGH;
858
859 /* Device speed */
860 prop = of_get_property(nc, "spi-max-frequency", &len);
861 if (!prop || len < sizeof(*prop)) {
862 dev_err(&master->dev, "%s has no 'spi-max-frequency' property\n",
863 nc->full_name);
864 spi_dev_put(spi);
865 continue;
866 }
867 spi->max_speed_hz = be32_to_cpup(prop);
868
869 /* IRQ */
870 spi->irq = irq_of_parse_and_map(nc, 0);
871
872 /* Store a pointer to the node in the device structure */
873 of_node_get(nc);
874 spi->dev.of_node = nc;
875
876 /* Register the new device */
877 request_module(spi->modalias);
878 rc = spi_add_device(spi);
879 if (rc) {
880 dev_err(&master->dev, "spi_device register error %s\n",
881 nc->full_name);
882 spi_dev_put(spi);
883 }
884
885 }
886}
887#else
888static void of_register_spi_devices(struct spi_master *master) { }
889#endif
890
801static void spi_master_release(struct device *dev) 891static void spi_master_release(struct device *dev)
802{ 892{
803 struct spi_master *master; 893 struct spi_master *master;
@@ -846,6 +936,8 @@ struct spi_master *spi_alloc_master(struct device *dev, unsigned size)
846 return NULL; 936 return NULL;
847 937
848 device_initialize(&master->dev); 938 device_initialize(&master->dev);
939 master->bus_num = -1;
940 master->num_chipselect = 1;
849 master->dev.class = &spi_master_class; 941 master->dev.class = &spi_master_class;
850 master->dev.parent = get_device(dev); 942 master->dev.parent = get_device(dev);
851 spi_master_set_devdata(master, &master[1]); 943 spi_master_set_devdata(master, &master[1]);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-01 21:37:34 -0500