Merge branch 'amd-iommu/2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu into core/iommu

2 files changed, 42 insertions, 13 deletions

diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index eee4b6e0af2c..9b80ad36dbba 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -59,6 +59,8 @@
 
 /* per-register bitmasks: */
 
+#define OMAP2_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
+#define OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP (1 << 2)
 #define OMAP2_MCSPI_SYSCONFIG_AUTOIDLE  (1 << 0)
 #define OMAP2_MCSPI_SYSCONFIG_SOFTRESET (1 << 1)
 
@@ -90,6 +92,7 @@
 
 #define OMAP2_MCSPI_CHCTRL_EN           (1 << 0)
 
+#define OMAP2_MCSPI_WAKEUPENABLE_WKEN   (1 << 0)
 
 /* We have 2 DMA channels per CS, one for RX and one for TX */
 struct omap2_mcspi_dma {
@@ -269,7 +272,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 
         if (rx != NULL) {
                 omap_set_dma_transfer_params(mcspi_dma->dma_rx_channel,
-                                data_type, element_count, 1,
+                                data_type, element_count - 1, 1,
                                 OMAP_DMA_SYNC_ELEMENT,
                                 mcspi_dma->dma_rx_sync_dev, 1);
 
@@ -300,6 +303,25 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
         if (rx != NULL) {
                 wait_for_completion(&mcspi_dma->dma_rx_completion);
                 dma_unmap_single(NULL, xfer->rx_dma, count, DMA_FROM_DEVICE);
+                omap2_mcspi_set_enable(spi, 0);
+                if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
+                                & OMAP2_MCSPI_CHSTAT_RXS)) {
+                        u32 w;
+
+                        w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
+                        if (word_len <= 8)
+                                ((u8 *)xfer->rx_buf)[element_count - 1] = w;
+                        else if (word_len <= 16)
+                                ((u16 *)xfer->rx_buf)[element_count - 1] = w;
+                        else /* word_len <= 32 */
+                                ((u32 *)xfer->rx_buf)[element_count - 1] = w;
+                } else {
+                        dev_err(&spi->dev, "DMA RX last word empty");
+                        count -= (word_len <= 8)  ? 1 :
+                                 (word_len <= 16) ? 2 :
+                               /* word_len <= 32 */ 4;
+                }
+                omap2_mcspi_set_enable(spi, 1);
         }
         return count;
 }
@@ -873,8 +895,12 @@ static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi)
         } while (!(tmp & OMAP2_MCSPI_SYSSTATUS_RESETDONE));
 
         mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG,
-                        /* (3 << 8) | (2 << 3) | */
-                        OMAP2_MCSPI_SYSCONFIG_AUTOIDLE);
+                        OMAP2_MCSPI_SYSCONFIG_AUTOIDLE |
+                        OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP |
+                        OMAP2_MCSPI_SYSCONFIG_SMARTIDLE);
+
+        mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE,
+                        OMAP2_MCSPI_WAKEUPENABLE_WKEN);
 
         omap2_mcspi_set_master_mode(master);
 
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index e0d44af4745a..3f3119d760db 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -111,29 +111,32 @@ static int s3c24xx_spi_setupxfer(struct spi_device *spi,
         unsigned int bpw;
         unsigned int hz;
         unsigned int div;
+        unsigned long clk;
 
         bpw = t ? t->bits_per_word : spi->bits_per_word;
         hz  = t ? t->speed_hz : spi->max_speed_hz;
 
+        if (!bpw)
+                bpw = 8;
+
+        if (!hz)
+                hz = spi->max_speed_hz;
+
         if (bpw != 8) {
                 dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
                 return -EINVAL;
         }
 
-        div = clk_get_rate(hw->clk) / hz;
-
-        /* is clk = pclk / (2 * (pre+1)), or is it
-         *    clk = (pclk * 2) / ( pre + 1) */
-
-        div /= 2;
-
-        if (div > 0)
-                div -= 1;
+        clk = clk_get_rate(hw->clk);
+        div = DIV_ROUND_UP(clk, hz * 2) - 1;
 
         if (div > 255)
                 div = 255;
 
-        dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz);
+        dev_dbg(&spi->dev, "setting pre-scaler to %d (wanted %d, got %ld)\n",
+                div, hz, clk / (2 * (div + 1)));
+
+
         writeb(div, hw->regs + S3C2410_SPPRE);
 
         spin_lock(&hw->bitbang.lock);