Merge commit 'v2.6.30-rc1' into perfcounters/core

Conflicts:
	arch/powerpc/include/asm/systbl.h
	arch/powerpc/include/asm/unistd.h
	include/linux/init_task.h

Merge reason: the conflicts are non-trivial: PowerPC placement
              of sys_perf_counter_open has to be mixed with the
	      new preadv/pwrite syscalls.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

3 files changed, 422 insertions, 326 deletions

diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 33fcef3150d4..c1688c71f052 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -28,6 +28,7 @@
 #include <linux/workqueue.h>
 #include <linux/delay.h>
 #include <linux/clk.h>
+#include <linux/gpio.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
@@ -53,6 +54,7 @@ MODULE_ALIAS("platform:pxa2xx-spi");
 #define RESET_DMA_CHANNEL       (DCSR_NODESC | DMA_INT_MASK)
 #define IS_DMA_ALIGNED(x)       ((((u32)(x)) & 0x07) == 0)
 #define MAX_DMA_LEN             8191
+#define DMA_ALIGNMENT           8
 
 /*
  * for testing SSCR1 changes that require SSP restart, basically
@@ -166,6 +168,8 @@ struct chip_data {
         u8 enable_dma;
         u8 bits_per_word;
         u32 speed_hz;
+        int gpio_cs;
+        int gpio_cs_inverted;
         int (*write)(struct driver_data *drv_data);
         int (*read)(struct driver_data *drv_data);
         void (*cs_control)(u32 command);
@@ -173,6 +177,32 @@ struct chip_data {
 
 static void pump_messages(struct work_struct *work);
 
+static void cs_assert(struct driver_data *drv_data)
+{
+        struct chip_data *chip = drv_data->cur_chip;
+
+        if (chip->cs_control) {
+                chip->cs_control(PXA2XX_CS_ASSERT);
+                return;
+        }
+
+        if (gpio_is_valid(chip->gpio_cs))
+                gpio_set_value(chip->gpio_cs, chip->gpio_cs_inverted);
+}
+
+static void cs_deassert(struct driver_data *drv_data)
+{
+        struct chip_data *chip = drv_data->cur_chip;
+
+        if (chip->cs_control) {
+                chip->cs_control(PXA2XX_CS_ASSERT);
+                return;
+        }
+
+        if (gpio_is_valid(chip->gpio_cs))
+                gpio_set_value(chip->gpio_cs, !chip->gpio_cs_inverted);
+}
+
 static int flush(struct driver_data *drv_data)
 {
         unsigned long limit = loops_per_jiffy << 1;
@@ -189,10 +219,6 @@ static int flush(struct driver_data *drv_data)
         return limit;
 }
 
-static void null_cs_control(u32 command)
-{
-}
-
 static int null_writer(struct driver_data *drv_data)
 {
         void __iomem *reg = drv_data->ioaddr;
@@ -400,7 +426,6 @@ static void giveback(struct driver_data *drv_data)
         msg = drv_data->cur_msg;
         drv_data->cur_msg = NULL;
         drv_data->cur_transfer = NULL;
-        drv_data->cur_chip = NULL;
         queue_work(drv_data->workqueue, &drv_data->pump_messages);
         spin_unlock_irqrestore(&drv_data->lock, flags);
 
@@ -416,7 +441,7 @@ static void giveback(struct driver_data *drv_data)
          * a message with an error, or next message is for another chip
          */
         if (!last_transfer->cs_change)
-                drv_data->cs_control(PXA2XX_CS_DEASSERT);
+                cs_deassert(drv_data);
         else {
                 struct spi_message *next_msg;
 
@@ -445,12 +470,14 @@ static void giveback(struct driver_data *drv_data)
                 if (next_msg && next_msg->spi != msg->spi)
                         next_msg = NULL;
                 if (!next_msg || msg->state == ERROR_STATE)
-                        drv_data->cs_control(PXA2XX_CS_DEASSERT);
+                        cs_deassert(drv_data);
         }
 
         msg->state = NULL;
         if (msg->complete)
                 msg->complete(msg->context);
+
+        drv_data->cur_chip = NULL;
 }
 
 static int wait_ssp_rx_stall(void const __iomem *ioaddr)
@@ -887,7 +914,7 @@ static void pump_transfers(unsigned long data)
 
                 /* Drop chip select only if cs_change is requested */
                 if (previous->cs_change)
-                        drv_data->cs_control(PXA2XX_CS_DEASSERT);
+                        cs_deassert(drv_data);
         }
 
         /* Check for transfers that need multiple DMA segments */
@@ -922,7 +949,6 @@ static void pump_transfers(unsigned long data)
         }
         drv_data->n_bytes = chip->n_bytes;
         drv_data->dma_width = chip->dma_width;
-        drv_data->cs_control = chip->cs_control;
         drv_data->tx = (void *)transfer->tx_buf;
         drv_data->tx_end = drv_data->tx + transfer->len;
         drv_data->rx = transfer->rx_buf;
@@ -1084,11 +1110,7 @@ static void pump_transfers(unsigned long data)
                         write_SSTO(chip->timeout, reg);
         }
 
-        /* FIXME, need to handle cs polarity,
-         * this driver uses struct pxa2xx_spi_chip.cs_control to
-         * specify a CS handling function, and it ignores most
-         * struct spi_device.mode[s], including SPI_CS_HIGH */
-        drv_data->cs_control(PXA2XX_CS_ASSERT);
+        cs_assert(drv_data);
 
         /* after chip select, release the data by enabling service
          * requests and interrupts, without changing any mode bits */
@@ -1166,6 +1188,44 @@ static int transfer(struct spi_device *spi, struct spi_message *msg)
 /* the spi->mode bits understood by this driver: */
 #define MODEBITS (SPI_CPOL | SPI_CPHA)
 
+static int setup_cs(struct spi_device *spi, struct chip_data *chip,
+                    struct pxa2xx_spi_chip *chip_info)
+{
+        int err = 0;
+
+        if (chip == NULL || chip_info == NULL)
+                return 0;
+
+        /* NOTE: setup() can be called multiple times, possibly with
+         * different chip_info, release previously requested GPIO
+         */
+        if (gpio_is_valid(chip->gpio_cs))
+                gpio_free(chip->gpio_cs);
+
+        /* If (*cs_control) is provided, ignore GPIO chip select */
+        if (chip_info->cs_control) {
+                chip->cs_control = chip_info->cs_control;
+                return 0;
+        }
+
+        if (gpio_is_valid(chip_info->gpio_cs)) {
+                err = gpio_request(chip_info->gpio_cs, "SPI_CS");
+                if (err) {
+                        dev_err(&spi->dev, "failed to request chip select "
+                                        "GPIO%d\n", chip_info->gpio_cs);
+                        return err;
+                }
+
+                chip->gpio_cs = chip_info->gpio_cs;
+                chip->gpio_cs_inverted = spi->mode & SPI_CS_HIGH;
+
+                err = gpio_direction_output(chip->gpio_cs,
+                                        !chip->gpio_cs_inverted);
+        }
+
+        return err;
+}
+
 static int setup(struct spi_device *spi)
 {
         struct pxa2xx_spi_chip *chip_info = NULL;
@@ -1211,7 +1271,7 @@ static int setup(struct spi_device *spi)
                         return -ENOMEM;
                 }
 
-                chip->cs_control = null_cs_control;
+                chip->gpio_cs = -1;
                 chip->enable_dma = 0;
                 chip->timeout = TIMOUT_DFLT;
                 chip->dma_burst_size = drv_data->master_info->enable_dma ?
@@ -1225,8 +1285,6 @@ static int setup(struct spi_device *spi)
         /* chip_info isn't always needed */
         chip->cr1 = 0;
         if (chip_info) {
-                if (chip_info->cs_control)
-                        chip->cs_control = chip_info->cs_control;
                 if (chip_info->timeout)
                         chip->timeout = chip_info->timeout;
                 if (chip_info->tx_threshold)
@@ -1308,13 +1366,16 @@ static int setup(struct spi_device *spi)
 
         spi_set_ctldata(spi, chip);
 
-        return 0;
+        return setup_cs(spi, chip, chip_info);
 }
 
 static void cleanup(struct spi_device *spi)
 {
         struct chip_data *chip = spi_get_ctldata(spi);
 
+        if (gpio_is_valid(chip->gpio_cs))
+                gpio_free(chip->gpio_cs);
+
         kfree(chip);
 }
 
@@ -1438,6 +1499,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
 
         master->bus_num = pdev->id;
         master->num_chipselect = platform_info->num_chipselect;
+        master->dma_alignment = DMA_ALIGNMENT;
         master->cleanup = cleanup;
         master->setup = setup;
         master->transfer = transfer;
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index 3410b0c55ed2..f014cc21e813 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -25,18 +25,17 @@
 #include <asm/dma.h>
 #include <asm/portmux.h>
 #include <asm/bfin5xx_spi.h>
+#include <asm/cacheflush.h>
 
 #define DRV_NAME        "bfin-spi"
 #define DRV_AUTHOR      "Bryan Wu, Luke Yang"
-#define DRV_DESC        "Blackfin BF5xx on-chip SPI Controller Driver"
+#define DRV_DESC        "Blackfin on-chip SPI Controller Driver"
 #define DRV_VERSION     "1.0"
 
 MODULE_AUTHOR(DRV_AUTHOR);
 MODULE_DESCRIPTION(DRV_DESC);
 MODULE_LICENSE("GPL");
 
-#define IS_DMA_ALIGNED(x) (((u32)(x)&0x07) == 0)
-
 #define START_STATE     ((void *)0)
 #define RUNNING_STATE   ((void *)1)
 #define DONE_STATE      ((void *)2)
@@ -44,6 +43,9 @@ MODULE_LICENSE("GPL");
 #define QUEUE_RUNNING   0
 #define QUEUE_STOPPED   1
 
+/* Value to send if no TX value is supplied */
+#define SPI_IDLE_TXVAL 0x0000
+
 struct driver_data {
         /* Driver model hookup */
         struct platform_device *pdev;
@@ -110,6 +112,8 @@ struct chip_data {
         u8 bits_per_word;       /* 8 or 16 */
         u8 cs_change_per_word;
         u16 cs_chg_udelay;      /* Some devices require > 255usec delay */
+        u32 cs_gpio;
+        u16 idle_tx_val;
         void (*write) (struct driver_data *);
         void (*read) (struct driver_data *);
         void (*duplex) (struct driver_data *);
@@ -154,10 +158,13 @@ static u16 hz_to_spi_baud(u32 speed_hz)
         if ((sclk % (2 * speed_hz)) > 0)
                 spi_baud++;
 
+        if (spi_baud < MIN_SPI_BAUD_VAL)
+                spi_baud = MIN_SPI_BAUD_VAL;
+
         return spi_baud;
 }
 
-static int flush(struct driver_data *drv_data)
+static int bfin_spi_flush(struct driver_data *drv_data)
 {
         unsigned long limit = loops_per_jiffy << 1;
 
@@ -171,33 +178,40 @@ static int flush(struct driver_data *drv_data)
 }
 
 /* Chip select operation functions for cs_change flag */
-static void cs_active(struct driver_data *drv_data, struct chip_data *chip)
+static void bfin_spi_cs_active(struct driver_data *drv_data, struct chip_data *chip)
 {
-        u16 flag = read_FLAG(drv_data);
+        if (likely(chip->chip_select_num)) {
+                u16 flag = read_FLAG(drv_data);
 
-        flag |= chip->flag;
-        flag &= ~(chip->flag << 8);
+                flag |= chip->flag;
+                flag &= ~(chip->flag << 8);
 
-        write_FLAG(drv_data, flag);
+                write_FLAG(drv_data, flag);
+        } else {
+                gpio_set_value(chip->cs_gpio, 0);
+        }
 }
 
-static void cs_deactive(struct driver_data *drv_data, struct chip_data *chip)
+static void bfin_spi_cs_deactive(struct driver_data *drv_data, struct chip_data *chip)
 {
-        u16 flag = read_FLAG(drv_data);
+        if (likely(chip->chip_select_num)) {
+                u16 flag = read_FLAG(drv_data);
 
-        flag |= (chip->flag << 8);
+                flag &= ~chip->flag;
+                flag |= (chip->flag << 8);
 
-        write_FLAG(drv_data, flag);
+                write_FLAG(drv_data, flag);
+        } else {
+                gpio_set_value(chip->cs_gpio, 1);
+        }
 
         /* Move delay here for consistency */
         if (chip->cs_chg_udelay)
                 udelay(chip->cs_chg_udelay);
 }
 
-#define MAX_SPI_SSEL    7
-
 /* stop controller and re-config current chip*/
-static void restore_state(struct driver_data *drv_data)
+static void bfin_spi_restore_state(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
@@ -211,294 +225,256 @@ static void restore_state(struct driver_data *drv_data)
         write_BAUD(drv_data, chip->baud);
 
         bfin_spi_enable(drv_data);
-        cs_active(drv_data, chip);
+        bfin_spi_cs_active(drv_data, chip);
 }
 
-/* used to kick off transfer in rx mode */
-static unsigned short dummy_read(struct driver_data *drv_data)
+/* used to kick off transfer in rx mode and read unwanted RX data */
+static inline void bfin_spi_dummy_read(struct driver_data *drv_data)
 {
-        unsigned short tmp;
-        tmp = read_RDBR(drv_data);
-        return tmp;
+        (void) read_RDBR(drv_data);
 }
 
-static void null_writer(struct driver_data *drv_data)
+static void bfin_spi_null_writer(struct driver_data *drv_data)
 {
         u8 n_bytes = drv_data->n_bytes;
+        u16 tx_val = drv_data->cur_chip->idle_tx_val;
+
+        /* clear RXS (we check for RXS inside the loop) */
+        bfin_spi_dummy_read(drv_data);
 
         while (drv_data->tx < drv_data->tx_end) {
-                write_TDBR(drv_data, 0);
-                while ((read_STAT(drv_data) & BIT_STAT_TXS))
-                        cpu_relax();
+                write_TDBR(drv_data, tx_val);
                 drv_data->tx += n_bytes;
+                /* wait until transfer finished.
+                   checking SPIF or TXS may not guarantee transfer completion */
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                /* discard RX data and clear RXS */
+                bfin_spi_dummy_read(drv_data);
         }
 }
 
-static void null_reader(struct driver_data *drv_data)
+static void bfin_spi_null_reader(struct driver_data *drv_data)
 {
         u8 n_bytes = drv_data->n_bytes;
-        dummy_read(drv_data);
+        u16 tx_val = drv_data->cur_chip->idle_tx_val;
+
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
 
         while (drv_data->rx < drv_data->rx_end) {
+                write_TDBR(drv_data, tx_val);
+                drv_data->rx += n_bytes;
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
-                dummy_read(drv_data);
-                drv_data->rx += n_bytes;
+                bfin_spi_dummy_read(drv_data);
         }
 }
 
-static void u8_writer(struct driver_data *drv_data)
+static void bfin_spi_u8_writer(struct driver_data *drv_data)
 {
-        dev_dbg(&drv_data->pdev->dev,
-                "cr8-s is 0x%x\n", read_STAT(drv_data));
+        /* clear RXS (we check for RXS inside the loop) */
+        bfin_spi_dummy_read(drv_data);
 
         while (drv_data->tx < drv_data->tx_end) {
-                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
-                while (read_STAT(drv_data) & BIT_STAT_TXS)
+                write_TDBR(drv_data, (*(u8 *) (drv_data->tx++)));
+                /* wait until transfer finished.
+                   checking SPIF or TXS may not guarantee transfer completion */
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
-                ++drv_data->tx;
+                /* discard RX data and clear RXS */
+                bfin_spi_dummy_read(drv_data);
         }
-
-        /* poll for SPI completion before return */
-        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                cpu_relax();
 }
 
-static void u8_cs_chg_writer(struct driver_data *drv_data)
+static void bfin_spi_u8_cs_chg_writer(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
-        while (drv_data->tx < drv_data->tx_end) {
-                cs_active(drv_data, chip);
+        /* clear RXS (we check for RXS inside the loop) */
+        bfin_spi_dummy_read(drv_data);
 
-                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
-                while (read_STAT(drv_data) & BIT_STAT_TXS)
-                        cpu_relax();
-                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
+        while (drv_data->tx < drv_data->tx_end) {
+                bfin_spi_cs_active(drv_data, chip);
+                write_TDBR(drv_data, (*(u8 *) (drv_data->tx++)));
+                /* make sure transfer finished before deactiving CS */
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
-
-                cs_deactive(drv_data, chip);
-
-                ++drv_data->tx;
+                bfin_spi_dummy_read(drv_data);
+                bfin_spi_cs_deactive(drv_data, chip);
         }
 }
 
-static void u8_reader(struct driver_data *drv_data)
+static void bfin_spi_u8_reader(struct driver_data *drv_data)
 {
-        dev_dbg(&drv_data->pdev->dev,
-                "cr-8 is 0x%x\n", read_STAT(drv_data));
-
-        /* poll for SPI completion before start */
-        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                cpu_relax();
+        u16 tx_val = drv_data->cur_chip->idle_tx_val;
 
-        /* clear TDBR buffer before read(else it will be shifted out) */
-        write_TDBR(drv_data, 0xFFFF);
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
 
-        dummy_read(drv_data);
-
-        while (drv_data->rx < drv_data->rx_end - 1) {
+        while (drv_data->rx < drv_data->rx_end) {
+                write_TDBR(drv_data, tx_val);
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
-                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
-                ++drv_data->rx;
+                *(u8 *) (drv_data->rx++) = read_RDBR(drv_data);
         }
-
-        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                cpu_relax();
-        *(u8 *) (drv_data->rx) = read_SHAW(drv_data);
-        ++drv_data->rx;
 }
 
-static void u8_cs_chg_reader(struct driver_data *drv_data)
+static void bfin_spi_u8_cs_chg_reader(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
+        u16 tx_val = chip->idle_tx_val;
 
-        while (drv_data->rx < drv_data->rx_end) {
-                cs_active(drv_data, chip);
-                read_RDBR(drv_data);    /* kick off */
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
 
+        while (drv_data->rx < drv_data->rx_end) {
+                bfin_spi_cs_active(drv_data, chip);
+                write_TDBR(drv_data, tx_val);
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
-                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                        cpu_relax();
-
-                *(u8 *) (drv_data->rx) = read_SHAW(drv_data);
-                cs_deactive(drv_data, chip);
-
-                ++drv_data->rx;
+                *(u8 *) (drv_data->rx++) = read_RDBR(drv_data);
+                bfin_spi_cs_deactive(drv_data, chip);
         }
 }
 
-static void u8_duplex(struct driver_data *drv_data)
+static void bfin_spi_u8_duplex(struct driver_data *drv_data)
 {
-        /* in duplex mode, clk is triggered by writing of TDBR */
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
+
         while (drv_data->rx < drv_data->rx_end) {
-                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
-                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                        cpu_relax();
+                write_TDBR(drv_data, (*(u8 *) (drv_data->tx++)));
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
-                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
-                ++drv_data->rx;
-                ++drv_data->tx;
+                *(u8 *) (drv_data->rx++) = read_RDBR(drv_data);
         }
 }
 
-static void u8_cs_chg_duplex(struct driver_data *drv_data)
+static void bfin_spi_u8_cs_chg_duplex(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
-        while (drv_data->rx < drv_data->rx_end) {
-                cs_active(drv_data, chip);
-
-                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
 
-                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                        cpu_relax();
+        while (drv_data->rx < drv_data->rx_end) {
+                bfin_spi_cs_active(drv_data, chip);
+                write_TDBR(drv_data, (*(u8 *) (drv_data->tx++)));
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
-                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
-
-                cs_deactive(drv_data, chip);
-
-                ++drv_data->rx;
-                ++drv_data->tx;
+                *(u8 *) (drv_data->rx++) = read_RDBR(drv_data);
+                bfin_spi_cs_deactive(drv_data, chip);
         }
 }
 
-static void u16_writer(struct driver_data *drv_data)
+static void bfin_spi_u16_writer(struct driver_data *drv_data)
 {
-        dev_dbg(&drv_data->pdev->dev,
-                "cr16 is 0x%x\n", read_STAT(drv_data));
+        /* clear RXS (we check for RXS inside the loop) */
+        bfin_spi_dummy_read(drv_data);
 
         while (drv_data->tx < drv_data->tx_end) {
                 write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
-                while ((read_STAT(drv_data) & BIT_STAT_TXS))
-                        cpu_relax();
                 drv_data->tx += 2;
+                /* wait until transfer finished.
+                   checking SPIF or TXS may not guarantee transfer completion */
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                /* discard RX data and clear RXS */
+                bfin_spi_dummy_read(drv_data);
         }
-
-        /* poll for SPI completion before return */
-        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                cpu_relax();
 }
 
-static void u16_cs_chg_writer(struct driver_data *drv_data)
+static void bfin_spi_u16_cs_chg_writer(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
-        while (drv_data->tx < drv_data->tx_end) {
-                cs_active(drv_data, chip);
+        /* clear RXS (we check for RXS inside the loop) */
+        bfin_spi_dummy_read(drv_data);
 
+        while (drv_data->tx < drv_data->tx_end) {
+                bfin_spi_cs_active(drv_data, chip);
                 write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
-                while ((read_STAT(drv_data) & BIT_STAT_TXS))
-                        cpu_relax();
-                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                        cpu_relax();
-
-                cs_deactive(drv_data, chip);
-
                 drv_data->tx += 2;
+                /* make sure transfer finished before deactiving CS */
+                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
+                        cpu_relax();
+                bfin_spi_dummy_read(drv_data);
+                bfin_spi_cs_deactive(drv_data, chip);
         }
 }
 
-static void u16_reader(struct driver_data *drv_data)
+static void bfin_spi_u16_reader(struct driver_data *drv_data)
 {
-        dev_dbg(&drv_data->pdev->dev,
-                "cr-16 is 0x%x\n", read_STAT(drv_data));
-
-        /* poll for SPI completion before start */
-        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                cpu_relax();
-
-        /* clear TDBR buffer before read(else it will be shifted out) */
-        write_TDBR(drv_data, 0xFFFF);
+        u16 tx_val = drv_data->cur_chip->idle_tx_val;
 
-        dummy_read(drv_data);
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
 
-        while (drv_data->rx < (drv_data->rx_end - 2)) {
+        while (drv_data->rx < drv_data->rx_end) {
+                write_TDBR(drv_data, tx_val);
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
                 *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                 drv_data->rx += 2;
         }
-
-        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                cpu_relax();
-        *(u16 *) (drv_data->rx) = read_SHAW(drv_data);
-        drv_data->rx += 2;
 }
 
-static void u16_cs_chg_reader(struct driver_data *drv_data)
+static void bfin_spi_u16_cs_chg_reader(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
+        u16 tx_val = chip->idle_tx_val;
 
-        /* poll for SPI completion before start */
-        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                cpu_relax();
-
-        /* clear TDBR buffer before read(else it will be shifted out) */
-        write_TDBR(drv_data, 0xFFFF);
-
-        cs_active(drv_data, chip);
-        dummy_read(drv_data);
-
-        while (drv_data->rx < drv_data->rx_end - 2) {
-                cs_deactive(drv_data, chip);
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
 
+        while (drv_data->rx < drv_data->rx_end) {
+                bfin_spi_cs_active(drv_data, chip);
+                write_TDBR(drv_data, tx_val);
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
-                cs_active(drv_data, chip);
                 *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                 drv_data->rx += 2;
+                bfin_spi_cs_deactive(drv_data, chip);
         }
-        cs_deactive(drv_data, chip);
-
-        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                cpu_relax();
-        *(u16 *) (drv_data->rx) = read_SHAW(drv_data);
-        drv_data->rx += 2;
 }
 
-static void u16_duplex(struct driver_data *drv_data)
+static void bfin_spi_u16_duplex(struct driver_data *drv_data)
 {
-        /* in duplex mode, clk is triggered by writing of TDBR */
-        while (drv_data->tx < drv_data->tx_end) {
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
+
+        while (drv_data->rx < drv_data->rx_end) {
                 write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
-                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                        cpu_relax();
+                drv_data->tx += 2;
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
                 *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                 drv_data->rx += 2;
-                drv_data->tx += 2;
         }
 }
 
-static void u16_cs_chg_duplex(struct driver_data *drv_data)
+static void bfin_spi_u16_cs_chg_duplex(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
 
-        while (drv_data->tx < drv_data->tx_end) {
-                cs_active(drv_data, chip);
+        /* discard old RX data and clear RXS */
+        bfin_spi_dummy_read(drv_data);
 
+        while (drv_data->rx < drv_data->rx_end) {
+                bfin_spi_cs_active(drv_data, chip);
                 write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
-                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                        cpu_relax();
+                drv_data->tx += 2;
                 while (!(read_STAT(drv_data) & BIT_STAT_RXS))
                         cpu_relax();
                 *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
-
-                cs_deactive(drv_data, chip);
-
                 drv_data->rx += 2;
-                drv_data->tx += 2;
+                bfin_spi_cs_deactive(drv_data, chip);
         }
 }
 
 /* test if ther is more transfer to be done */
-static void *next_transfer(struct driver_data *drv_data)
+static void *bfin_spi_next_transfer(struct driver_data *drv_data)
 {
         struct spi_message *msg = drv_data->cur_msg;
         struct spi_transfer *trans = drv_data->cur_transfer;
@@ -517,7 +493,7 @@ static void *next_transfer(struct driver_data *drv_data)
  * caller already set message->status;
  * dma and pio irqs are blocked give finished message back
  */
-static void giveback(struct driver_data *drv_data)
+static void bfin_spi_giveback(struct driver_data *drv_data)
 {
         struct chip_data *chip = drv_data->cur_chip;
         struct spi_transfer *last_transfer;
@@ -537,26 +513,30 @@ static void giveback(struct driver_data *drv_data)
 
         msg->state = NULL;
 
-        /* disable chip select signal. And not stop spi in autobuffer mode */
-        if (drv_data->tx_dma != 0xFFFF) {
-                cs_deactive(drv_data, chip);
-                bfin_spi_disable(drv_data);
-        }
-
         if (!drv_data->cs_change)
-                cs_deactive(drv_data, chip);
+                bfin_spi_cs_deactive(drv_data, chip);
+
+        /* Not stop spi in autobuffer mode */
+        if (drv_data->tx_dma != 0xFFFF)
+                bfin_spi_disable(drv_data);
 
         if (msg->complete)
                 msg->complete(msg->context);
 }
 
-static irqreturn_t dma_irq_handler(int irq, void *dev_id)
+static irqreturn_t bfin_spi_dma_irq_handler(int irq, void *dev_id)
 {
         struct driver_data *drv_data = dev_id;
         struct chip_data *chip = drv_data->cur_chip;
         struct spi_message *msg = drv_data->cur_msg;
+        unsigned long timeout;
+        unsigned short dmastat = get_dma_curr_irqstat(drv_data->dma_channel);
+        u16 spistat = read_STAT(drv_data);
+
+        dev_dbg(&drv_data->pdev->dev,
+                "in dma_irq_handler dmastat:0x%x spistat:0x%x\n",
+                dmastat, spistat);
 
-        dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n");
         clear_dma_irqstat(drv_data->dma_channel);
 
         /* Wait for DMA to complete */
@@ -575,16 +555,30 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
                         cpu_relax();
         }
 
+        dev_dbg(&drv_data->pdev->dev,
+                "in dma_irq_handler dmastat:0x%x spistat:0x%x\n",
+                dmastat, read_STAT(drv_data));
+
+        timeout = jiffies + HZ;
         while (!(read_STAT(drv_data) & SPIF))
-                cpu_relax();
+                if (!time_before(jiffies, timeout)) {
+                        dev_warn(&drv_data->pdev->dev, "timeout waiting for SPIF");
+                        break;
+                } else
+                        cpu_relax();
 
-        msg->actual_length += drv_data->len_in_bytes;
+        if ((dmastat & DMA_ERR) && (spistat & RBSY)) {
+                msg->state = ERROR_STATE;
+                dev_err(&drv_data->pdev->dev, "dma receive: fifo/buffer overflow\n");
+        } else {
+                msg->actual_length += drv_data->len_in_bytes;
 
-        if (drv_data->cs_change)
-                cs_deactive(drv_data, chip);
+                if (drv_data->cs_change)
+                        bfin_spi_cs_deactive(drv_data, chip);
 
-        /* Move to next transfer */
-        msg->state = next_transfer(drv_data);
+                /* Move to next transfer */
+                msg->state = bfin_spi_next_transfer(drv_data);
+        }
 
         /* Schedule transfer tasklet */
         tasklet_schedule(&drv_data->pump_transfers);
@@ -598,7 +592,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static void pump_transfers(unsigned long data)
+static void bfin_spi_pump_transfers(unsigned long data)
 {
         struct driver_data *drv_data = (struct driver_data *)data;
         struct spi_message *message = NULL;
@@ -621,20 +615,23 @@ static void pump_transfers(unsigned long data)
 
          /* Handle for abort */
         if (message->state == ERROR_STATE) {
+                dev_dbg(&drv_data->pdev->dev, "transfer: we've hit an error\n");
                 message->status = -EIO;
-                giveback(drv_data);
+                bfin_spi_giveback(drv_data);
                 return;
         }
 
         /* Handle end of message */
         if (message->state == DONE_STATE) {
+                dev_dbg(&drv_data->pdev->dev, "transfer: all done!\n");
                 message->status = 0;
-                giveback(drv_data);
+                bfin_spi_giveback(drv_data);
                 return;
         }
 
         /* Delay if requested at end of transfer */
         if (message->state == RUNNING_STATE) {
+                dev_dbg(&drv_data->pdev->dev, "transfer: still running ...\n");
                 previous = list_entry(transfer->transfer_list.prev,
                                       struct spi_transfer, transfer_list);
                 if (previous->delay_usecs)
@@ -642,13 +639,20 @@ static void pump_transfers(unsigned long data)
         }
 
         /* Setup the transfer state based on the type of transfer */
-        if (flush(drv_data) == 0) {
+        if (bfin_spi_flush(drv_data) == 0) {
                 dev_err(&drv_data->pdev->dev, "pump_transfers: flush failed\n");
                 message->status = -EIO;
-                giveback(drv_data);
+                bfin_spi_giveback(drv_data);
                 return;
         }
 
+        if (transfer->len == 0) {
+                /* Move to next transfer of this msg */
+                message->state = bfin_spi_next_transfer(drv_data);
+                /* Schedule next transfer tasklet */
+                tasklet_schedule(&drv_data->pump_transfers);
+        }
+
         if (transfer->tx_buf != NULL) {
                 drv_data->tx = (void *)transfer->tx_buf;
                 drv_data->tx_end = drv_data->tx + transfer->len;
@@ -679,31 +683,31 @@ static void pump_transfers(unsigned long data)
                 drv_data->n_bytes = 1;
                 width = CFG_SPI_WORDSIZE8;
                 drv_data->read = chip->cs_change_per_word ?
-                        u8_cs_chg_reader : u8_reader;
+                        bfin_spi_u8_cs_chg_reader : bfin_spi_u8_reader;
                 drv_data->write = chip->cs_change_per_word ?
-                        u8_cs_chg_writer : u8_writer;
+                        bfin_spi_u8_cs_chg_writer : bfin_spi_u8_writer;
                 drv_data->duplex = chip->cs_change_per_word ?
-                        u8_cs_chg_duplex : u8_duplex;
+                        bfin_spi_u8_cs_chg_duplex : bfin_spi_u8_duplex;
                 break;
 
         case 16:
                 drv_data->n_bytes = 2;
                 width = CFG_SPI_WORDSIZE16;
                 drv_data->read = chip->cs_change_per_word ?
-                        u16_cs_chg_reader : u16_reader;
+                        bfin_spi_u16_cs_chg_reader : bfin_spi_u16_reader;
                 drv_data->write = chip->cs_change_per_word ?
-                        u16_cs_chg_writer : u16_writer;
+                        bfin_spi_u16_cs_chg_writer : bfin_spi_u16_writer;
                 drv_data->duplex = chip->cs_change_per_word ?
-                        u16_cs_chg_duplex : u16_duplex;
+                        bfin_spi_u16_cs_chg_duplex : bfin_spi_u16_duplex;
                 break;
 
         default:
                 /* No change, the same as default setting */
                 drv_data->n_bytes = chip->n_bytes;
                 width = chip->width;
-                drv_data->write = drv_data->tx ? chip->write : null_writer;
-                drv_data->read = drv_data->rx ? chip->read : null_reader;
-                drv_data->duplex = chip->duplex ? chip->duplex : null_writer;
+                drv_data->write = drv_data->tx ? chip->write : bfin_spi_null_writer;
+                drv_data->read = drv_data->rx ? chip->read : bfin_spi_null_reader;
+                drv_data->duplex = chip->duplex ? chip->duplex : bfin_spi_null_writer;
                 break;
         }
         cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD));
@@ -717,7 +721,7 @@ static void pump_transfers(unsigned long data)
         }
         dev_dbg(&drv_data->pdev->dev,
                 "transfer: drv_data->write is %p, chip->write is %p, null_wr is %p\n",
-                drv_data->write, chip->write, null_writer);
+                drv_data->write, chip->write, bfin_spi_null_writer);
 
         /* speed and width has been set on per message */
         message->state = RUNNING_STATE;
@@ -731,32 +735,34 @@ static void pump_transfers(unsigned long data)
 
         write_STAT(drv_data, BIT_STAT_CLR);
         cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD));
-        cs_active(drv_data, chip);
+        if (drv_data->cs_change)
+                bfin_spi_cs_active(drv_data, chip);
 
         dev_dbg(&drv_data->pdev->dev,
                 "now pumping a transfer: width is %d, len is %d\n",
                 width, transfer->len);
 
         /*
-         * Try to map dma buffer and do a dma transfer if
-         * successful use different way to r/w according to
-         * drv_data->cur_chip->enable_dma
+         * Try to map dma buffer and do a dma transfer.  If successful use,
+         * different way to r/w according to the enable_dma settings and if
+         * we are not doing a full duplex transfer (since the hardware does
+         * not support full duplex DMA transfers).
          */
         if (!full_duplex && drv_data->cur_chip->enable_dma
                                 && drv_data->len > 6) {
 
+                unsigned long dma_start_addr, flags;
+
                 disable_dma(drv_data->dma_channel);
                 clear_dma_irqstat(drv_data->dma_channel);
-                bfin_spi_disable(drv_data);
 
                 /* config dma channel */
                 dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n");
+                set_dma_x_count(drv_data->dma_channel, drv_data->len);
                 if (width == CFG_SPI_WORDSIZE16) {
-                        set_dma_x_count(drv_data->dma_channel, drv_data->len);
                         set_dma_x_modify(drv_data->dma_channel, 2);
                         dma_width = WDSIZE_16;
                 } else {
-                        set_dma_x_count(drv_data->dma_channel, drv_data->len);
                         set_dma_x_modify(drv_data->dma_channel, 1);
                         dma_width = WDSIZE_8;
                 }
@@ -779,58 +785,75 @@ static void pump_transfers(unsigned long data)
                         enable_dma(drv_data->dma_channel);
 
                         /* start SPI transfer */
-                        write_CTRL(drv_data,
-                                (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE));
+                        write_CTRL(drv_data, cr | BIT_CTL_TIMOD_DMA_TX);
 
                         /* just return here, there can only be one transfer
                          * in this mode
                          */
                         message->status = 0;
-                        giveback(drv_data);
+                        bfin_spi_giveback(drv_data);
                         return;
                 }
 
                 /* In dma mode, rx or tx must be NULL in one transfer */
+                dma_config = (RESTART | dma_width | DI_EN);
                 if (drv_data->rx != NULL) {
                         /* set transfer mode, and enable SPI */
-                        dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n");
+                        dev_dbg(&drv_data->pdev->dev, "doing DMA in to %p (size %zx)\n",
+                                drv_data->rx, drv_data->len_in_bytes);
 
-                        /* clear tx reg soformer data is not shifted out */
-                        write_TDBR(drv_data, 0xFFFF);
+                        /* invalidate caches, if needed */
+                        if (bfin_addr_dcachable((unsigned long) drv_data->rx))
+                                invalidate_dcache_range((unsigned long) drv_data->rx,
+                                                        (unsigned long) (drv_data->rx +
+                                                        drv_data->len_in_bytes));
 
-                        set_dma_x_count(drv_data->dma_channel, drv_data->len);
-
-                        /* start dma */
-                        dma_enable_irq(drv_data->dma_channel);
-                        dma_config = (WNR | RESTART | dma_width | DI_EN);
-                        set_dma_config(drv_data->dma_channel, dma_config);
-                        set_dma_start_addr(drv_data->dma_channel,
-                                        (unsigned long)drv_data->rx);
-                        enable_dma(drv_data->dma_channel);
-
-                        /* start SPI transfer */
-                        write_CTRL(drv_data,
-                                (cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE));
+                        dma_config |= WNR;
+                        dma_start_addr = (unsigned long)drv_data->rx;
+                        cr |= BIT_CTL_TIMOD_DMA_RX | BIT_CTL_SENDOPT;
 
                 } else if (drv_data->tx != NULL) {
                         dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n");
 
-                        /* start dma */
-                        dma_enable_irq(drv_data->dma_channel);
-                        dma_config = (RESTART | dma_width | DI_EN);
-                        set_dma_config(drv_data->dma_channel, dma_config);
-                        set_dma_start_addr(drv_data->dma_channel,
-                                        (unsigned long)drv_data->tx);
-                        enable_dma(drv_data->dma_channel);
+                        /* flush caches, if needed */
+                        if (bfin_addr_dcachable((unsigned long) drv_data->tx))
+                                flush_dcache_range((unsigned long) drv_data->tx,
+                                                (unsigned long) (drv_data->tx +
+                                                drv_data->len_in_bytes));
+
+                        dma_start_addr = (unsigned long)drv_data->tx;
+                        cr |= BIT_CTL_TIMOD_DMA_TX;
+
+                } else
+                        BUG();
+
+                /* oh man, here there be monsters ... and i dont mean the
+                 * fluffy cute ones from pixar, i mean the kind that'll eat
+                 * your data, kick your dog, and love it all.  do *not* try
+                 * and change these lines unless you (1) heavily test DMA
+                 * with SPI flashes on a loaded system (e.g. ping floods),
+                 * (2) know just how broken the DMA engine interaction with
+                 * the SPI peripheral is, and (3) have someone else to blame
+                 * when you screw it all up anyways.
+                 */
+                set_dma_start_addr(drv_data->dma_channel, dma_start_addr);
+                set_dma_config(drv_data->dma_channel, dma_config);
+                local_irq_save(flags);
+                SSYNC();
+                write_CTRL(drv_data, cr);
+                enable_dma(drv_data->dma_channel);
+                dma_enable_irq(drv_data->dma_channel);
+                local_irq_restore(flags);
 
-                        /* start SPI transfer */
-                        write_CTRL(drv_data,
-                                (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE));
-                }
         } else {
                 /* IO mode write then read */
                 dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n");
 
+                /* we always use SPI_WRITE mode. SPI_READ mode
+                   seems to have problems with setting up the
+                   output value in TDBR prior to the transfer. */
+                write_CTRL(drv_data, (cr | CFG_SPI_WRITE));
+
                 if (full_duplex) {
                         /* full duplex mode */
                         BUG_ON((drv_data->tx_end - drv_data->tx) !=
@@ -838,9 +861,6 @@ static void pump_transfers(unsigned long data)
                         dev_dbg(&drv_data->pdev->dev,
                                 "IO duplex: cr is 0x%x\n", cr);
 
-                        /* set SPI transfer mode */
-                        write_CTRL(drv_data, (cr | CFG_SPI_WRITE));
-
                         drv_data->duplex(drv_data);
 
                         if (drv_data->tx != drv_data->tx_end)
@@ -850,9 +870,6 @@ static void pump_transfers(unsigned long data)
                         dev_dbg(&drv_data->pdev->dev,
                                 "IO write: cr is 0x%x\n", cr);
 
-                        /* set SPI transfer mode */
-                        write_CTRL(drv_data, (cr | CFG_SPI_WRITE));
-
                         drv_data->write(drv_data);
 
                         if (drv_data->tx != drv_data->tx_end)
@@ -862,9 +879,6 @@ static void pump_transfers(unsigned long data)
                         dev_dbg(&drv_data->pdev->dev,
                                 "IO read: cr is 0x%x\n", cr);
 
-                        /* set SPI transfer mode */
-                        write_CTRL(drv_data, (cr | CFG_SPI_READ));
-
                         drv_data->read(drv_data);
                         if (drv_data->rx != drv_data->rx_end)
                                 tranf_success = 0;
@@ -876,20 +890,19 @@ static void pump_transfers(unsigned long data)
                         message->state = ERROR_STATE;
                 } else {
                         /* Update total byte transfered */
-                        message->actual_length += drv_data->len;
-
+                        message->actual_length += drv_data->len_in_bytes;
                         /* Move to next transfer of this msg */
-                        message->state = next_transfer(drv_data);
+                        message->state = bfin_spi_next_transfer(drv_data);
+                        if (drv_data->cs_change)
+                                bfin_spi_cs_deactive(drv_data, chip);
                 }
-
                 /* Schedule next transfer tasklet */
                 tasklet_schedule(&drv_data->pump_transfers);
-
         }
 }
 
 /* pop a msg from queue and kick off real transfer */
-static void pump_messages(struct work_struct *work)
+static void bfin_spi_pump_messages(struct work_struct *work)
 {
         struct driver_data *drv_data;
         unsigned long flags;
@@ -917,7 +930,7 @@ static void pump_messages(struct work_struct *work)
 
         /* Setup the SSP using the per chip configuration */
         drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi);
-        restore_state(drv_data);
+        bfin_spi_restore_state(drv_data);
 
         list_del_init(&drv_data->cur_msg->queue);
 
@@ -946,7 +959,7 @@ static void pump_messages(struct work_struct *work)
  * got a msg to transfer, queue it in drv_data->queue.
  * And kick off message pumper
  */
-static int transfer(struct spi_device *spi, struct spi_message *msg)
+static int bfin_spi_transfer(struct spi_device *spi, struct spi_message *msg)
 {
         struct driver_data *drv_data = spi_master_get_devdata(spi->master);
         unsigned long flags;
@@ -975,7 +988,7 @@ static int transfer(struct spi_device *spi, struct spi_message *msg)
 
 #define MAX_SPI_SSEL    7
 
-static u16 ssel[3][MAX_SPI_SSEL] = {
+static u16 ssel[][MAX_SPI_SSEL] = {
         {P_SPI0_SSEL1, P_SPI0_SSEL2, P_SPI0_SSEL3,
         P_SPI0_SSEL4, P_SPI0_SSEL5,
         P_SPI0_SSEL6, P_SPI0_SSEL7},
@@ -990,12 +1003,12 @@ static u16 ssel[3][MAX_SPI_SSEL] = {
 };
 
 /* first setup for new devices */
-static int setup(struct spi_device *spi)
+static int bfin_spi_setup(struct spi_device *spi)
 {
         struct bfin5xx_spi_chip *chip_info = NULL;
         struct chip_data *chip;
         struct driver_data *drv_data = spi_master_get_devdata(spi->master);
-        u8 spi_flg;
+        int ret;
 
         /* Abort device setup if requested features are not supported */
         if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) {
@@ -1041,6 +1054,8 @@ static int setup(struct spi_device *spi)
                 chip->bits_per_word = chip_info->bits_per_word;
                 chip->cs_change_per_word = chip_info->cs_change_per_word;
                 chip->cs_chg_udelay = chip_info->cs_chg_udelay;
+                chip->cs_gpio = chip_info->cs_gpio;
+                chip->idle_tx_val = chip_info->idle_tx_val;
         }
 
         /* translate common spi framework into our register */
@@ -1059,13 +1074,13 @@ static int setup(struct spi_device *spi)
          */
         if (chip->enable_dma && !drv_data->dma_requested) {
                 /* register dma irq handler */
-                if (request_dma(drv_data->dma_channel, "BF53x_SPI_DMA") < 0) {
+                if (request_dma(drv_data->dma_channel, "BFIN_SPI_DMA") < 0) {
                         dev_dbg(&spi->dev,
                                 "Unable to request BlackFin SPI DMA channel\n");
                         return -ENODEV;
                 }
                 if (set_dma_callback(drv_data->dma_channel,
-                        (void *)dma_irq_handler, drv_data) < 0) {
+                    bfin_spi_dma_irq_handler, drv_data) < 0) {
                         dev_dbg(&spi->dev, "Unable to set dma callback\n");
                         return -EPERM;
                 }
@@ -1078,37 +1093,47 @@ static int setup(struct spi_device *spi)
          * SPI_BAUD, not the real baudrate
          */
         chip->baud = hz_to_spi_baud(spi->max_speed_hz);
-        spi_flg = ~(1 << (spi->chip_select));
-        chip->flag = ((u16) spi_flg << 8) | (1 << (spi->chip_select));
+        chip->flag = 1 << (spi->chip_select);
         chip->chip_select_num = spi->chip_select;
 
+        if (chip->chip_select_num == 0) {
+                ret = gpio_request(chip->cs_gpio, spi->modalias);
+                if (ret) {
+                        if (drv_data->dma_requested)
+                                free_dma(drv_data->dma_channel);
+                        return ret;
+                }
+                gpio_direction_output(chip->cs_gpio, 1);
+        }
+
         switch (chip->bits_per_word) {
         case 8:
                 chip->n_bytes = 1;
                 chip->width = CFG_SPI_WORDSIZE8;
                 chip->read = chip->cs_change_per_word ?
-                        u8_cs_chg_reader : u8_reader;
+                        bfin_spi_u8_cs_chg_reader : bfin_spi_u8_reader;
                 chip->write = chip->cs_change_per_word ?
-                        u8_cs_chg_writer : u8_writer;
+                        bfin_spi_u8_cs_chg_writer : bfin_spi_u8_writer;
                 chip->duplex = chip->cs_change_per_word ?
-                        u8_cs_chg_duplex : u8_duplex;
+                        bfin_spi_u8_cs_chg_duplex : bfin_spi_u8_duplex;
                 break;
 
         case 16:
                 chip->n_bytes = 2;
                 chip->width = CFG_SPI_WORDSIZE16;
                 chip->read = chip->cs_change_per_word ?
-                        u16_cs_chg_reader : u16_reader;
+                        bfin_spi_u16_cs_chg_reader : bfin_spi_u16_reader;
                 chip->write = chip->cs_change_per_word ?
-                        u16_cs_chg_writer : u16_writer;
+                        bfin_spi_u16_cs_chg_writer : bfin_spi_u16_writer;
                 chip->duplex = chip->cs_change_per_word ?
-                        u16_cs_chg_duplex : u16_duplex;
+                        bfin_spi_u16_cs_chg_duplex : bfin_spi_u16_duplex;
                 break;
 
         default:
                 dev_err(&spi->dev, "%d bits_per_word is not supported\n",
                                 chip->bits_per_word);
-                kfree(chip);
+                if (chip_info)
+                        kfree(chip);
                 return -ENODEV;
         }
 
@@ -1125,7 +1150,7 @@ static int setup(struct spi_device *spi)
                 peripheral_request(ssel[spi->master->bus_num]
                         [chip->chip_select_num-1], spi->modalias);
 
-        cs_deactive(drv_data, chip);
+        bfin_spi_cs_deactive(drv_data, chip);
 
         return 0;
 }
@@ -1134,19 +1159,25 @@ static int setup(struct spi_device *spi)
  * callback for spi framework.
  * clean driver specific data
  */
-static void cleanup(struct spi_device *spi)
+static void bfin_spi_cleanup(struct spi_device *spi)
 {
         struct chip_data *chip = spi_get_ctldata(spi);
 
+        if (!chip)
+                return;
+
         if ((chip->chip_select_num > 0)
                 && (chip->chip_select_num <= spi->master->num_chipselect))
                 peripheral_free(ssel[spi->master->bus_num]
                                         [chip->chip_select_num-1]);
 
+        if (chip->chip_select_num == 0)
+                gpio_free(chip->cs_gpio);
+
         kfree(chip);
 }
 
-static inline int init_queue(struct driver_data *drv_data)
+static inline int bfin_spi_init_queue(struct driver_data *drv_data)
 {
         INIT_LIST_HEAD(&drv_data->queue);
         spin_lock_init(&drv_data->lock);
@@ -1156,10 +1187,10 @@ static inline int init_queue(struct driver_data *drv_data)
 
         /* init transfer tasklet */
         tasklet_init(&drv_data->pump_transfers,
-                     pump_transfers, (unsigned long)drv_data);
+                     bfin_spi_pump_transfers, (unsigned long)drv_data);
 
         /* init messages workqueue */
-        INIT_WORK(&drv_data->pump_messages, pump_messages);
+        INIT_WORK(&drv_data->pump_messages, bfin_spi_pump_messages);
         drv_data->workqueue = create_singlethread_workqueue(
                                 dev_name(drv_data->master->dev.parent));
         if (drv_data->workqueue == NULL)
@@ -1168,7 +1199,7 @@ static inline int init_queue(struct driver_data *drv_data)
         return 0;
 }
 
-static inline int start_queue(struct driver_data *drv_data)
+static inline int bfin_spi_start_queue(struct driver_data *drv_data)
 {
         unsigned long flags;
 
@@ -1190,7 +1221,7 @@ static inline int start_queue(struct driver_data *drv_data)
         return 0;
 }
 
-static inline int stop_queue(struct driver_data *drv_data)
+static inline int bfin_spi_stop_queue(struct driver_data *drv_data)
 {
         unsigned long flags;
         unsigned limit = 500;
@@ -1219,11 +1250,11 @@ static inline int stop_queue(struct driver_data *drv_data)
         return status;
 }
 
-static inline int destroy_queue(struct driver_data *drv_data)
+static inline int bfin_spi_destroy_queue(struct driver_data *drv_data)
 {
         int status;
 
-        status = stop_queue(drv_data);
+        status = bfin_spi_stop_queue(drv_data);
         if (status != 0)
                 return status;
 
@@ -1232,7 +1263,7 @@ static inline int destroy_queue(struct driver_data *drv_data)
         return 0;
 }
 
-static int __init bfin5xx_spi_probe(struct platform_device *pdev)
+static int __init bfin_spi_probe(struct platform_device *pdev)
 {
         struct device *dev = &pdev->dev;
         struct bfin5xx_spi_master *platform_info;
@@ -1258,9 +1289,9 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
 
         master->bus_num = pdev->id;
         master->num_chipselect = platform_info->num_chipselect;
-        master->cleanup = cleanup;
-        master->setup = setup;
-        master->transfer = transfer;
+        master->cleanup = bfin_spi_cleanup;
+        master->setup = bfin_spi_setup;
+        master->transfer = bfin_spi_transfer;
 
         /* Find and map our resources */
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1285,13 +1316,13 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
         }
 
         /* Initial and start queue */
-        status = init_queue(drv_data);
+        status = bfin_spi_init_queue(drv_data);
         if (status != 0) {
                 dev_err(dev, "problem initializing queue\n");
                 goto out_error_queue_alloc;
         }
 
-        status = start_queue(drv_data);
+        status = bfin_spi_start_queue(drv_data);
         if (status != 0) {
                 dev_err(dev, "problem starting queue\n");
                 goto out_error_queue_alloc;
@@ -1317,7 +1348,7 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
         return status;
 
 out_error_queue_alloc:
-        destroy_queue(drv_data);
+        bfin_spi_destroy_queue(drv_data);
 out_error_no_dma_ch:
         iounmap((void *) drv_data->regs_base);
 out_error_ioremap:
@@ -1328,7 +1359,7 @@ out_error_get_res:
 }
 
 /* stop hardware and remove the driver */
-static int __devexit bfin5xx_spi_remove(struct platform_device *pdev)
+static int __devexit bfin_spi_remove(struct platform_device *pdev)
 {
         struct driver_data *drv_data = platform_get_drvdata(pdev);
         int status = 0;
@@ -1337,7 +1368,7 @@ static int __devexit bfin5xx_spi_remove(struct platform_device *pdev)
                 return 0;
 
         /* Remove the queue */
-        status = destroy_queue(drv_data);
+        status = bfin_spi_destroy_queue(drv_data);
         if (status != 0)
                 return status;
 
@@ -1362,12 +1393,12 @@ static int __devexit bfin5xx_spi_remove(struct platform_device *pdev)
 }
 
 #ifdef CONFIG_PM
-static int bfin5xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
+static int bfin_spi_suspend(struct platform_device *pdev, pm_message_t state)
 {
         struct driver_data *drv_data = platform_get_drvdata(pdev);
         int status = 0;
 
-        status = stop_queue(drv_data);
+        status = bfin_spi_stop_queue(drv_data);
         if (status != 0)
                 return status;
 
@@ -1377,7 +1408,7 @@ static int bfin5xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
         return 0;
 }
 
-static int bfin5xx_spi_resume(struct platform_device *pdev)
+static int bfin_spi_resume(struct platform_device *pdev)
 {
         struct driver_data *drv_data = platform_get_drvdata(pdev);
         int status = 0;
@@ -1386,7 +1417,7 @@ static int bfin5xx_spi_resume(struct platform_device *pdev)
         bfin_spi_enable(drv_data);
 
         /* Start the queue running */
-        status = start_queue(drv_data);
+        status = bfin_spi_start_queue(drv_data);
         if (status != 0) {
                 dev_err(&pdev->dev, "problem starting queue (%d)\n", status);
                 return status;
@@ -1395,29 +1426,29 @@ static int bfin5xx_spi_resume(struct platform_device *pdev)
         return 0;
 }
 #else
-#define bfin5xx_spi_suspend NULL
-#define bfin5xx_spi_resume NULL
+#define bfin_spi_suspend NULL
+#define bfin_spi_resume NULL
 #endif                          /* CONFIG_PM */
 
 MODULE_ALIAS("platform:bfin-spi");
-static struct platform_driver bfin5xx_spi_driver = {
+static struct platform_driver bfin_spi_driver = {
         .driver = {
                 .name   = DRV_NAME,
                 .owner  = THIS_MODULE,
         },
-        .suspend        = bfin5xx_spi_suspend,
-        .resume         = bfin5xx_spi_resume,
-        .remove         = __devexit_p(bfin5xx_spi_remove),
+        .suspend        = bfin_spi_suspend,
+        .resume         = bfin_spi_resume,
+        .remove         = __devexit_p(bfin_spi_remove),
 };
 
-static int __init bfin5xx_spi_init(void)
+static int __init bfin_spi_init(void)
 {
-        return platform_driver_probe(&bfin5xx_spi_driver, bfin5xx_spi_probe);
+        return platform_driver_probe(&bfin_spi_driver, bfin_spi_probe);
 }
-module_init(bfin5xx_spi_init);
+module_init(bfin_spi_init);
 
-static void __exit bfin5xx_spi_exit(void)
+static void __exit bfin_spi_exit(void)
 {
-        platform_driver_unregister(&bfin5xx_spi_driver);
+        platform_driver_unregister(&bfin_spi_driver);
 }
-module_exit(bfin5xx_spi_exit);
+module_exit(bfin_spi_exit);
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
index 0480d8bb19d3..0671aeef5792 100644
--- a/drivers/spi/spi_imx.c
+++ b/drivers/spi/spi_imx.c
@@ -186,6 +186,7 @@
 #define QUEUE_STOPPED                   (1)
 
 #define IS_DMA_ALIGNED(x)               (((u32)(x) & 0x03) == 0)
+#define DMA_ALIGNMENT                   4
 /*-------------------------------------------------------------------------*/
 
 
@@ -779,7 +780,8 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data)
 
                         /* Read trailing bytes */
                         limit = loops_per_jiffy << 1;
-                        while ((read(drv_data) == 0) && limit--);
+                        while ((read(drv_data) == 0) && --limit)
+                                cpu_relax();
 
                         if (limit == 0)
                                 dev_err(&drv_data->pdev->dev,
@@ -1481,6 +1483,7 @@ static int __init spi_imx_probe(struct platform_device *pdev)
 
         master->bus_num = pdev->id;
         master->num_chipselect = platform_info->num_chipselect;
+        master->dma_alignment = DMA_ALIGNMENT;
         master->cleanup = cleanup;
         master->setup = setup;
         master->transfer = transfer;