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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2014-10-02 09:31:08 -0400
committerMark Brown <broonie@kernel.org>2014-10-02 12:06:26 -0400
commit2a285299446cccbaf9ba47403e8f2ce578cd1ad1 (patch)
treefa32c04d7af0a1685b36bc646f6c317912853362 /drivers/spi
parent15ee3be78b017ee9d697fe59d45cdfbb35d9fdeb (diff)
spi: dw-mid: convert to use DMAengine wrappers
Instead of direct dereference to dmaengine callbacks we are going to use DMAengine wrappers. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-dw-mid.c19
1 files changed, 7 insertions, 12 deletions
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index 7bdf93747e5f..a507add6231e 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -113,8 +113,7 @@ static void dw_spi_dma_done(void *arg)
113 113
114static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change) 114static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
115{ 115{
116 struct dma_async_tx_descriptor *txdesc = NULL, *rxdesc = NULL; 116 struct dma_async_tx_descriptor *txdesc, *rxdesc;
117 struct dma_chan *txchan, *rxchan;
118 struct dma_slave_config txconf, rxconf; 117 struct dma_slave_config txconf, rxconf;
119 u16 dma_ctrl = 0; 118 u16 dma_ctrl = 0;
120 119
@@ -132,8 +131,6 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
132 } 131 }
133 132
134 dws->dma_chan_done = 0; 133 dws->dma_chan_done = 0;
135 txchan = dws->txchan;
136 rxchan = dws->rxchan;
137 134
138 /* 2. Prepare the TX dma transfer */ 135 /* 2. Prepare the TX dma transfer */
139 txconf.direction = DMA_MEM_TO_DEV; 136 txconf.direction = DMA_MEM_TO_DEV;
@@ -143,14 +140,13 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
143 txconf.dst_addr_width = dws->dma_width; 140 txconf.dst_addr_width = dws->dma_width;
144 txconf.device_fc = false; 141 txconf.device_fc = false;
145 142
146 txchan->device->device_control(txchan, DMA_SLAVE_CONFIG, 143 dmaengine_slave_config(dws->txchan, &txconf);
147 (unsigned long) &txconf);
148 144
149 memset(&dws->tx_sgl, 0, sizeof(dws->tx_sgl)); 145 memset(&dws->tx_sgl, 0, sizeof(dws->tx_sgl));
150 dws->tx_sgl.dma_address = dws->tx_dma; 146 dws->tx_sgl.dma_address = dws->tx_dma;
151 dws->tx_sgl.length = dws->len; 147 dws->tx_sgl.length = dws->len;
152 148
153 txdesc = dmaengine_prep_slave_sg(txchan, 149 txdesc = dmaengine_prep_slave_sg(dws->txchan,
154 &dws->tx_sgl, 150 &dws->tx_sgl,
155 1, 151 1,
156 DMA_MEM_TO_DEV, 152 DMA_MEM_TO_DEV,
@@ -166,14 +162,13 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
166 rxconf.src_addr_width = dws->dma_width; 162 rxconf.src_addr_width = dws->dma_width;
167 rxconf.device_fc = false; 163 rxconf.device_fc = false;
168 164
169 rxchan->device->device_control(rxchan, DMA_SLAVE_CONFIG, 165 dmaengine_slave_config(dws->rxchan, &rxconf);
170 (unsigned long) &rxconf);
171 166
172 memset(&dws->rx_sgl, 0, sizeof(dws->rx_sgl)); 167 memset(&dws->rx_sgl, 0, sizeof(dws->rx_sgl));
173 dws->rx_sgl.dma_address = dws->rx_dma; 168 dws->rx_sgl.dma_address = dws->rx_dma;
174 dws->rx_sgl.length = dws->len; 169 dws->rx_sgl.length = dws->len;
175 170
176 rxdesc = dmaengine_prep_slave_sg(rxchan, 171 rxdesc = dmaengine_prep_slave_sg(dws->rxchan,
177 &dws->rx_sgl, 172 &dws->rx_sgl,
178 1, 173 1,
179 DMA_DEV_TO_MEM, 174 DMA_DEV_TO_MEM,
@@ -182,8 +177,8 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
182 rxdesc->callback_param = dws; 177 rxdesc->callback_param = dws;
183 178
184 /* rx must be started before tx due to spi instinct */ 179 /* rx must be started before tx due to spi instinct */
185 rxdesc->tx_submit(rxdesc); 180 dmaengine_submit(rxdesc);
186 txdesc->tx_submit(txdesc); 181 dmaengine_submit(txdesc);
187 return 0; 182 return 0;
188} 183}
189 184