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authorAnton Vorontsov <avorontsov@ru.mvista.com>2007-08-10 16:01:01 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-08-11 18:47:41 -0400
commite24a4d1ee337e3a67a502f3f19cdec3ffc45ad05 (patch)
tree51b27df7a4b31424215d9cd1d3bf1395d6bfa76c /drivers/spi
parent8dfe9c21a890e0c1214b85d3d90a84187638bf5b (diff)
spi_mpc83xx: in "QE mode", use sysclk/2
For MPC8349E input to the SPI Baud Rate Generator is SYSCLK, but it's SYSCLK/2 for MPC8323E (SPI in QE). Fix this, and remove confusion by renaming the mpc83xx_spi->sysclk member as mpc83xx_spi->spibrg. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi_mpc83xx.c21
1 files changed, 13 insertions, 8 deletions
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 0c16a2b39b41..fe69e94043e1 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -86,7 +86,7 @@ struct mpc83xx_spi {
86 86
87 unsigned nsecs; /* (clock cycle time)/2 */ 87 unsigned nsecs; /* (clock cycle time)/2 */
88 88
89 u32 sysclk; 89 u32 spibrg; /* SPIBRG input clock */
90 u32 rx_shift; /* RX data reg shift when in qe mode */ 90 u32 rx_shift; /* RX data reg shift when in qe mode */
91 u32 tx_shift; /* TX data reg shift when in qe mode */ 91 u32 tx_shift; /* TX data reg shift when in qe mode */
92 92
@@ -169,17 +169,18 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
169 169
170 regval |= SPMODE_LEN(len); 170 regval |= SPMODE_LEN(len);
171 171
172 if ((mpc83xx_spi->sysclk / spi->max_speed_hz) >= 64) { 172 if ((mpc83xx_spi->spibrg / spi->max_speed_hz) >= 64) {
173 u8 pm = mpc83xx_spi->sysclk / (spi->max_speed_hz * 64); 173 u8 pm = mpc83xx_spi->spibrg / (spi->max_speed_hz * 64);
174 if (pm > 0x0f) { 174 if (pm > 0x0f) {
175 printk(KERN_WARNING "MPC83xx SPI: SPICLK can't be less then a SYSCLK/1024!\n" 175 dev_err(&spi->dev, "Requested speed is too "
176 "Requested SPICLK is %d Hz. Will use %d Hz instead.\n", 176 "low: %d Hz. Will use %d Hz instead.\n",
177 spi->max_speed_hz, mpc83xx_spi->sysclk / 1024); 177 spi->max_speed_hz,
178 mpc83xx_spi->spibrg / 1024);
178 pm = 0x0f; 179 pm = 0x0f;
179 } 180 }
180 regval |= SPMODE_PM(pm) | SPMODE_DIV16; 181 regval |= SPMODE_PM(pm) | SPMODE_DIV16;
181 } else { 182 } else {
182 u8 pm = mpc83xx_spi->sysclk / (spi->max_speed_hz * 4); 183 u8 pm = mpc83xx_spi->spibrg / (spi->max_speed_hz * 4);
183 regval |= SPMODE_PM(pm); 184 regval |= SPMODE_PM(pm);
184 } 185 }
185 186
@@ -429,13 +430,17 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev)
429 mpc83xx_spi->bitbang.chipselect = mpc83xx_spi_chipselect; 430 mpc83xx_spi->bitbang.chipselect = mpc83xx_spi_chipselect;
430 mpc83xx_spi->bitbang.setup_transfer = mpc83xx_spi_setup_transfer; 431 mpc83xx_spi->bitbang.setup_transfer = mpc83xx_spi_setup_transfer;
431 mpc83xx_spi->bitbang.txrx_bufs = mpc83xx_spi_bufs; 432 mpc83xx_spi->bitbang.txrx_bufs = mpc83xx_spi_bufs;
432 mpc83xx_spi->sysclk = pdata->sysclk;
433 mpc83xx_spi->activate_cs = pdata->activate_cs; 433 mpc83xx_spi->activate_cs = pdata->activate_cs;
434 mpc83xx_spi->deactivate_cs = pdata->deactivate_cs; 434 mpc83xx_spi->deactivate_cs = pdata->deactivate_cs;
435 mpc83xx_spi->qe_mode = pdata->qe_mode; 435 mpc83xx_spi->qe_mode = pdata->qe_mode;
436 mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8; 436 mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8;
437 mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8; 437 mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8;
438 438
439 if (mpc83xx_spi->qe_mode)
440 mpc83xx_spi->spibrg = pdata->sysclk / 2;
441 else
442 mpc83xx_spi->spibrg = pdata->sysclk;
443
439 mpc83xx_spi->rx_shift = 0; 444 mpc83xx_spi->rx_shift = 0;
440 mpc83xx_spi->tx_shift = 0; 445 mpc83xx_spi->tx_shift = 0;
441 if (mpc83xx_spi->qe_mode) { 446 if (mpc83xx_spi->qe_mode) {