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authorThomas Abraham <thomas.abraham@linaro.org>2012-10-02 19:30:12 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-10-17 03:12:29 -0400
commit9f667bff0f48d01a4474fa879cb384331584a4ee (patch)
treec547823b0b579d9ed58f51efefa4c49c449c66be /drivers/spi
parentddffeb8c4d0331609ef2581d84de4d763607bd37 (diff)
spi/s3c64xx: use clk_prepare_enable and clk_disable_unprepare
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare calls as required by common clock framework. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-s3c64xx.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 1a81c90a4a71..06a5fe777434 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -516,7 +516,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
516 516
517 /* Disable Clock */ 517 /* Disable Clock */
518 if (sdd->port_conf->clk_from_cmu) { 518 if (sdd->port_conf->clk_from_cmu) {
519 clk_disable(sdd->src_clk); 519 clk_disable_unprepare(sdd->src_clk);
520 } else { 520 } else {
521 val = readl(regs + S3C64XX_SPI_CLK_CFG); 521 val = readl(regs + S3C64XX_SPI_CLK_CFG);
522 val &= ~S3C64XX_SPI_ENCLK_ENABLE; 522 val &= ~S3C64XX_SPI_ENCLK_ENABLE;
@@ -564,7 +564,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
564 /* There is half-multiplier before the SPI */ 564 /* There is half-multiplier before the SPI */
565 clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); 565 clk_set_rate(sdd->src_clk, sdd->cur_speed * 2);
566 /* Enable Clock */ 566 /* Enable Clock */
567 clk_enable(sdd->src_clk); 567 clk_prepare_enable(sdd->src_clk);
568 } else { 568 } else {
569 /* Configure Clock */ 569 /* Configure Clock */
570 val = readl(regs + S3C64XX_SPI_CLK_CFG); 570 val = readl(regs + S3C64XX_SPI_CLK_CFG);
@@ -1302,7 +1302,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
1302 goto err3; 1302 goto err3;
1303 } 1303 }
1304 1304
1305 if (clk_enable(sdd->clk)) { 1305 if (clk_prepare_enable(sdd->clk)) {
1306 dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n"); 1306 dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
1307 ret = -EBUSY; 1307 ret = -EBUSY;
1308 goto err4; 1308 goto err4;
@@ -1317,7 +1317,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
1317 goto err5; 1317 goto err5;
1318 } 1318 }
1319 1319
1320 if (clk_enable(sdd->src_clk)) { 1320 if (clk_prepare_enable(sdd->src_clk)) {
1321 dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name); 1321 dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
1322 ret = -EBUSY; 1322 ret = -EBUSY;
1323 goto err6; 1323 goto err6;
@@ -1361,11 +1361,11 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
1361err8: 1361err8:
1362 free_irq(irq, sdd); 1362 free_irq(irq, sdd);
1363err7: 1363err7:
1364 clk_disable(sdd->src_clk); 1364 clk_disable_unprepare(sdd->src_clk);
1365err6: 1365err6:
1366 clk_put(sdd->src_clk); 1366 clk_put(sdd->src_clk);
1367err5: 1367err5:
1368 clk_disable(sdd->clk); 1368 clk_disable_unprepare(sdd->clk);
1369err4: 1369err4:
1370 clk_put(sdd->clk); 1370 clk_put(sdd->clk);
1371err3: 1371err3:
@@ -1393,10 +1393,10 @@ static int s3c64xx_spi_remove(struct platform_device *pdev)
1393 1393
1394 free_irq(platform_get_irq(pdev, 0), sdd); 1394 free_irq(platform_get_irq(pdev, 0), sdd);
1395 1395
1396 clk_disable(sdd->src_clk); 1396 clk_disable_unprepare(sdd->src_clk);
1397 clk_put(sdd->src_clk); 1397 clk_put(sdd->src_clk);
1398 1398
1399 clk_disable(sdd->clk); 1399 clk_disable_unprepare(sdd->clk);
1400 clk_put(sdd->clk); 1400 clk_put(sdd->clk);
1401 1401
1402 if (!sdd->cntrlr_info->cfg_gpio && pdev->dev.of_node) 1402 if (!sdd->cntrlr_info->cfg_gpio && pdev->dev.of_node)
@@ -1417,8 +1417,8 @@ static int s3c64xx_spi_suspend(struct device *dev)
1417 spi_master_suspend(master); 1417 spi_master_suspend(master);
1418 1418
1419 /* Disable the clock */ 1419 /* Disable the clock */
1420 clk_disable(sdd->src_clk); 1420 clk_disable_unprepare(sdd->src_clk);
1421 clk_disable(sdd->clk); 1421 clk_disable_unprepare(sdd->clk);
1422 1422
1423 if (!sdd->cntrlr_info->cfg_gpio && dev->of_node) 1423 if (!sdd->cntrlr_info->cfg_gpio && dev->of_node)
1424 s3c64xx_spi_dt_gpio_free(sdd); 1424 s3c64xx_spi_dt_gpio_free(sdd);
@@ -1440,8 +1440,8 @@ static int s3c64xx_spi_resume(struct device *dev)
1440 sci->cfg_gpio(); 1440 sci->cfg_gpio();
1441 1441
1442 /* Enable the clock */ 1442 /* Enable the clock */
1443 clk_enable(sdd->src_clk); 1443 clk_prepare_enable(sdd->src_clk);
1444 clk_enable(sdd->clk); 1444 clk_prepare_enable(sdd->clk);
1445 1445
1446 s3c64xx_spi_hwinit(sdd, sdd->port_id); 1446 s3c64xx_spi_hwinit(sdd, sdd->port_id);
1447 1447
@@ -1457,8 +1457,8 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev)
1457 struct spi_master *master = dev_get_drvdata(dev); 1457 struct spi_master *master = dev_get_drvdata(dev);
1458 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); 1458 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
1459 1459
1460 clk_disable(sdd->clk); 1460 clk_disable_unprepare(sdd->clk);
1461 clk_disable(sdd->src_clk); 1461 clk_disable_unprepare(sdd->src_clk);
1462 1462
1463 return 0; 1463 return 0;
1464} 1464}
@@ -1468,8 +1468,8 @@ static int s3c64xx_spi_runtime_resume(struct device *dev)
1468 struct spi_master *master = dev_get_drvdata(dev); 1468 struct spi_master *master = dev_get_drvdata(dev);
1469 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); 1469 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
1470 1470
1471 clk_enable(sdd->src_clk); 1471 clk_prepare_enable(sdd->src_clk);
1472 clk_enable(sdd->clk); 1472 clk_prepare_enable(sdd->clk);
1473 1473
1474 return 0; 1474 return 0;
1475} 1475}