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authorMichal Nazarewicz <mina86@mina86.com>2013-12-08 10:35:11 -0500
committerMark Brown <broonie@linaro.org>2013-12-09 13:14:03 -0500
commita553a31d9f32700ef0d3a1490e222ec15e600140 (patch)
tree64f1ce1df0b44c3cc2cf4084800d6b9c4423ba6a /drivers/spi/spi-tegra20-sflash.c
parent6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff)
spi: tegra20-sflash: use u32 for 32-bit register values
Previously used “unsigned long” may lead to confusion should the code be compiled for 64-bit machine. Signed-off-by: Michal Nazarewicz <mina86@mina86.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/spi/spi-tegra20-sflash.c')
-rw-r--r--drivers/spi/spi-tegra20-sflash.c22
1 files changed, 10 insertions, 12 deletions
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c
index 4dc8e8129459..af78c17388d2 100644
--- a/drivers/spi/spi-tegra20-sflash.c
+++ b/drivers/spi/spi-tegra20-sflash.c
@@ -148,14 +148,14 @@ struct tegra_sflash_data {
148static int tegra_sflash_runtime_suspend(struct device *dev); 148static int tegra_sflash_runtime_suspend(struct device *dev);
149static int tegra_sflash_runtime_resume(struct device *dev); 149static int tegra_sflash_runtime_resume(struct device *dev);
150 150
151static inline unsigned long tegra_sflash_readl(struct tegra_sflash_data *tsd, 151static inline u32 tegra_sflash_readl(struct tegra_sflash_data *tsd,
152 unsigned long reg) 152 unsigned long reg)
153{ 153{
154 return readl(tsd->base + reg); 154 return readl(tsd->base + reg);
155} 155}
156 156
157static inline void tegra_sflash_writel(struct tegra_sflash_data *tsd, 157static inline void tegra_sflash_writel(struct tegra_sflash_data *tsd,
158 unsigned long val, unsigned long reg) 158 u32 val, unsigned long reg)
159{ 159{
160 writel(val, tsd->base + reg); 160 writel(val, tsd->base + reg);
161} 161}
@@ -185,7 +185,7 @@ static unsigned tegra_sflash_fill_tx_fifo_from_client_txbuf(
185 struct tegra_sflash_data *tsd, struct spi_transfer *t) 185 struct tegra_sflash_data *tsd, struct spi_transfer *t)
186{ 186{
187 unsigned nbytes; 187 unsigned nbytes;
188 unsigned long status; 188 u32 status;
189 unsigned max_n_32bit = tsd->curr_xfer_words; 189 unsigned max_n_32bit = tsd->curr_xfer_words;
190 u8 *tx_buf = (u8 *)t->tx_buf + tsd->cur_tx_pos; 190 u8 *tx_buf = (u8 *)t->tx_buf + tsd->cur_tx_pos;
191 191
@@ -196,11 +196,11 @@ static unsigned tegra_sflash_fill_tx_fifo_from_client_txbuf(
196 status = tegra_sflash_readl(tsd, SPI_STATUS); 196 status = tegra_sflash_readl(tsd, SPI_STATUS);
197 while (!(status & SPI_TXF_FULL)) { 197 while (!(status & SPI_TXF_FULL)) {
198 int i; 198 int i;
199 unsigned int x = 0; 199 u32 x = 0;
200 200
201 for (i = 0; nbytes && (i < tsd->bytes_per_word); 201 for (i = 0; nbytes && (i < tsd->bytes_per_word);
202 i++, nbytes--) 202 i++, nbytes--)
203 x |= ((*tx_buf++) << i*8); 203 x |= (u32)(*tx_buf++) << (i * 8);
204 tegra_sflash_writel(tsd, x, SPI_TX_FIFO); 204 tegra_sflash_writel(tsd, x, SPI_TX_FIFO);
205 if (!nbytes) 205 if (!nbytes)
206 break; 206 break;
@@ -214,16 +214,14 @@ static unsigned tegra_sflash_fill_tx_fifo_from_client_txbuf(
214static int tegra_sflash_read_rx_fifo_to_client_rxbuf( 214static int tegra_sflash_read_rx_fifo_to_client_rxbuf(
215 struct tegra_sflash_data *tsd, struct spi_transfer *t) 215 struct tegra_sflash_data *tsd, struct spi_transfer *t)
216{ 216{
217 unsigned long status; 217 u32 status;
218 unsigned int read_words = 0; 218 unsigned int read_words = 0;
219 u8 *rx_buf = (u8 *)t->rx_buf + tsd->cur_rx_pos; 219 u8 *rx_buf = (u8 *)t->rx_buf + tsd->cur_rx_pos;
220 220
221 status = tegra_sflash_readl(tsd, SPI_STATUS); 221 status = tegra_sflash_readl(tsd, SPI_STATUS);
222 while (!(status & SPI_RXF_EMPTY)) { 222 while (!(status & SPI_RXF_EMPTY)) {
223 int i; 223 int i;
224 unsigned long x; 224 u32 x = tegra_sflash_readl(tsd, SPI_RX_FIFO);
225
226 x = tegra_sflash_readl(tsd, SPI_RX_FIFO);
227 for (i = 0; (i < tsd->bytes_per_word); i++) 225 for (i = 0; (i < tsd->bytes_per_word); i++)
228 *rx_buf++ = (x >> (i*8)) & 0xFF; 226 *rx_buf++ = (x >> (i*8)) & 0xFF;
229 read_words++; 227 read_words++;
@@ -236,7 +234,7 @@ static int tegra_sflash_read_rx_fifo_to_client_rxbuf(
236static int tegra_sflash_start_cpu_based_transfer( 234static int tegra_sflash_start_cpu_based_transfer(
237 struct tegra_sflash_data *tsd, struct spi_transfer *t) 235 struct tegra_sflash_data *tsd, struct spi_transfer *t)
238{ 236{
239 unsigned long val = 0; 237 u32 val = 0;
240 unsigned cur_words; 238 unsigned cur_words;
241 239
242 if (tsd->cur_direction & DATA_DIR_TX) 240 if (tsd->cur_direction & DATA_DIR_TX)
@@ -266,7 +264,7 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi,
266{ 264{
267 struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master); 265 struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master);
268 u32 speed; 266 u32 speed;
269 unsigned long command; 267 u32 command;
270 268
271 speed = t->speed_hz; 269 speed = t->speed_hz;
272 if (speed != tsd->cur_speed) { 270 if (speed != tsd->cur_speed) {
@@ -313,7 +311,7 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi,
313 tegra_sflash_writel(tsd, command, SPI_COMMAND); 311 tegra_sflash_writel(tsd, command, SPI_COMMAND);
314 tsd->command_reg = command; 312 tsd->command_reg = command;
315 313
316 return tegra_sflash_start_cpu_based_transfer(tsd, t); 314 return tegra_sflash_start_cpu_based_transfer(tsd, t);
317} 315}
318 316
319static int tegra_sflash_setup(struct spi_device *spi) 317static int tegra_sflash_setup(struct spi_device *spi)