diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2013-04-01 09:55:16 -0400 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2013-04-01 09:55:16 -0400 |
commit | e47ef0f1affff3e017d0477b283a26beeb45258a (patch) | |
tree | ae00210c3b875e235c3cea284c8bf44a841a5199 /drivers/spi/spi-s3c64xx.c | |
parent | 823cd0454325509d84dbf8e301c182c8a2711c65 (diff) | |
parent | 1ad849aee5f53353ed88d9cd3d68a51b03a7d44f (diff) |
Merge branch 'spi-fix' into spi-next
Diffstat (limited to 'drivers/spi/spi-s3c64xx.c')
-rw-r--r-- | drivers/spi/spi-s3c64xx.c | 41 |
1 files changed, 25 insertions, 16 deletions
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 27ff669f0937..a17ca06381ae 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c | |||
@@ -984,25 +984,30 @@ static irqreturn_t s3c64xx_spi_irq(int irq, void *data) | |||
984 | { | 984 | { |
985 | struct s3c64xx_spi_driver_data *sdd = data; | 985 | struct s3c64xx_spi_driver_data *sdd = data; |
986 | struct spi_master *spi = sdd->master; | 986 | struct spi_master *spi = sdd->master; |
987 | unsigned int val; | 987 | unsigned int val, clr = 0; |
988 | 988 | ||
989 | val = readl(sdd->regs + S3C64XX_SPI_PENDING_CLR); | 989 | val = readl(sdd->regs + S3C64XX_SPI_STATUS); |
990 | 990 | ||
991 | val &= S3C64XX_SPI_PND_RX_OVERRUN_CLR | | 991 | if (val & S3C64XX_SPI_ST_RX_OVERRUN_ERR) { |
992 | S3C64XX_SPI_PND_RX_UNDERRUN_CLR | | 992 | clr = S3C64XX_SPI_PND_RX_OVERRUN_CLR; |
993 | S3C64XX_SPI_PND_TX_OVERRUN_CLR | | ||
994 | S3C64XX_SPI_PND_TX_UNDERRUN_CLR; | ||
995 | |||
996 | writel(val, sdd->regs + S3C64XX_SPI_PENDING_CLR); | ||
997 | |||
998 | if (val & S3C64XX_SPI_PND_RX_OVERRUN_CLR) | ||
999 | dev_err(&spi->dev, "RX overrun\n"); | 993 | dev_err(&spi->dev, "RX overrun\n"); |
1000 | if (val & S3C64XX_SPI_PND_RX_UNDERRUN_CLR) | 994 | } |
995 | if (val & S3C64XX_SPI_ST_RX_UNDERRUN_ERR) { | ||
996 | clr |= S3C64XX_SPI_PND_RX_UNDERRUN_CLR; | ||
1001 | dev_err(&spi->dev, "RX underrun\n"); | 997 | dev_err(&spi->dev, "RX underrun\n"); |
1002 | if (val & S3C64XX_SPI_PND_TX_OVERRUN_CLR) | 998 | } |
999 | if (val & S3C64XX_SPI_ST_TX_OVERRUN_ERR) { | ||
1000 | clr |= S3C64XX_SPI_PND_TX_OVERRUN_CLR; | ||
1003 | dev_err(&spi->dev, "TX overrun\n"); | 1001 | dev_err(&spi->dev, "TX overrun\n"); |
1004 | if (val & S3C64XX_SPI_PND_TX_UNDERRUN_CLR) | 1002 | } |
1003 | if (val & S3C64XX_SPI_ST_TX_UNDERRUN_ERR) { | ||
1004 | clr |= S3C64XX_SPI_PND_TX_UNDERRUN_CLR; | ||
1005 | dev_err(&spi->dev, "TX underrun\n"); | 1005 | dev_err(&spi->dev, "TX underrun\n"); |
1006 | } | ||
1007 | |||
1008 | /* Clear the pending irq by setting and then clearing it */ | ||
1009 | writel(clr, sdd->regs + S3C64XX_SPI_PENDING_CLR); | ||
1010 | writel(0, sdd->regs + S3C64XX_SPI_PENDING_CLR); | ||
1006 | 1011 | ||
1007 | return IRQ_HANDLED; | 1012 | return IRQ_HANDLED; |
1008 | } | 1013 | } |
@@ -1026,9 +1031,13 @@ static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel) | |||
1026 | writel(0, regs + S3C64XX_SPI_MODE_CFG); | 1031 | writel(0, regs + S3C64XX_SPI_MODE_CFG); |
1027 | writel(0, regs + S3C64XX_SPI_PACKET_CNT); | 1032 | writel(0, regs + S3C64XX_SPI_PACKET_CNT); |
1028 | 1033 | ||
1029 | /* Clear any irq pending bits */ | 1034 | /* Clear any irq pending bits, should set and clear the bits */ |
1030 | writel(readl(regs + S3C64XX_SPI_PENDING_CLR), | 1035 | val = S3C64XX_SPI_PND_RX_OVERRUN_CLR | |
1031 | regs + S3C64XX_SPI_PENDING_CLR); | 1036 | S3C64XX_SPI_PND_RX_UNDERRUN_CLR | |
1037 | S3C64XX_SPI_PND_TX_OVERRUN_CLR | | ||
1038 | S3C64XX_SPI_PND_TX_UNDERRUN_CLR; | ||
1039 | writel(val, regs + S3C64XX_SPI_PENDING_CLR); | ||
1040 | writel(0, regs + S3C64XX_SPI_PENDING_CLR); | ||
1032 | 1041 | ||
1033 | writel(0, regs + S3C64XX_SPI_SWAP_CFG); | 1042 | writel(0, regs + S3C64XX_SPI_SWAP_CFG); |
1034 | 1043 | ||