diff options
author | H Hartley Sweeten <hartleys@visionengravers.com> | 2011-09-20 14:06:17 -0400 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2011-09-21 11:41:48 -0400 |
commit | 7eb187b3cd3f6f285d91a196dbefac9b6adbb07c (patch) | |
tree | 2086865907f57e441d15ad16bd8bbdd07c29091a /drivers/spi/spi-dw-mid.c | |
parent | 3e3ea716270dc64810f624ad6a3672440b45d3d4 (diff) |
spi: spi-dw: fix all sparse warnings
The dw_{read,write}[lw] macros produce sparse warnings everytime they
are used. The "read" ones cause:
warning: cast removes address space of expression
warning: incorrect type in argument 1 (different address spaces)
expected void const volatile [noderef] <asn:2>*addr
got unsigned int *<noident>
And the "write" ones:
warning: cast removes address space of expression
warning: incorrect type in argument 2 (different address spaces)
expected void volatile [noderef] <asn:2>*addr
got unsigned int *<noident>
Fix this by removing struct dw_spi_reg and converting all the register
offsets to #defines. Then convert the macros into inlined functions so
that proper type checking can occur.
While here, also fix the three sparse warnings in spi-dw-mid.c due to
the return value of ioremap_nocache being stored in a u32 * not a
void __iomem *.
With these changes the spi-dw* files all build with no sparse warnings.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/spi-dw-mid.c')
-rw-r--r-- | drivers/spi/spi-dw-mid.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index 130e55537db6..e743a45ee92c 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c | |||
@@ -116,13 +116,13 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change) | |||
116 | /* 1. setup DMA related registers */ | 116 | /* 1. setup DMA related registers */ |
117 | if (cs_change) { | 117 | if (cs_change) { |
118 | spi_enable_chip(dws, 0); | 118 | spi_enable_chip(dws, 0); |
119 | dw_writew(dws, dmardlr, 0xf); | 119 | dw_writew(dws, DW_SPI_DMARDLR, 0xf); |
120 | dw_writew(dws, dmatdlr, 0x10); | 120 | dw_writew(dws, DW_SPI_DMATDLR, 0x10); |
121 | if (dws->tx_dma) | 121 | if (dws->tx_dma) |
122 | dma_ctrl |= 0x2; | 122 | dma_ctrl |= 0x2; |
123 | if (dws->rx_dma) | 123 | if (dws->rx_dma) |
124 | dma_ctrl |= 0x1; | 124 | dma_ctrl |= 0x1; |
125 | dw_writew(dws, dmacr, dma_ctrl); | 125 | dw_writew(dws, DW_SPI_DMACR, dma_ctrl); |
126 | spi_enable_chip(dws, 1); | 126 | spi_enable_chip(dws, 1); |
127 | } | 127 | } |
128 | 128 | ||
@@ -200,7 +200,8 @@ static struct dw_spi_dma_ops mid_dma_ops = { | |||
200 | 200 | ||
201 | int dw_spi_mid_init(struct dw_spi *dws) | 201 | int dw_spi_mid_init(struct dw_spi *dws) |
202 | { | 202 | { |
203 | u32 *clk_reg, clk_cdiv; | 203 | void __iomem *clk_reg; |
204 | u32 clk_cdiv; | ||
204 | 205 | ||
205 | clk_reg = ioremap_nocache(MRST_CLK_SPI0_REG, 16); | 206 | clk_reg = ioremap_nocache(MRST_CLK_SPI0_REG, 16); |
206 | if (!clk_reg) | 207 | if (!clk_reg) |