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authorChris Boot <bootc@bootc.net>2013-03-11 23:38:24 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-03-12 14:23:49 -0400
commitf8043872e79614ae9c5aaf7804e0b0ccb1932ed0 (patch)
treeed73a2c701730d787914db338fa2b95f0347b3de /drivers/spi/spi-bcm2835.c
parentd77b5382e67d1e1394e40c5c95fb5947efe0ff9e (diff)
spi: add driver for BCM2835
The BCM2835 contains two forms of SPI master controller (one known simply as SPI0, and the other known as the "Universal SPI Master", in the auxilliary block) and one form of SPI slave controller. This patch adds support for the SPI0 controller. This driver is taken from Chris Boot's repository at git://github.com/bootc/linux.git rpi-linear as of commit 6de2905 "spi-bcm2708: fix printf with spurious %s". In the first SPI-related commit there, Chris wrote: Thanks to csoutreach / A Robinson for his driver which I used as an inspiration. You can find his version here: http://piface.openlx.org.uk/raspberry-pi-spi-kernel-driver-available-for Changes made during upstreaming: * Renamed bcm2708 to bcm2835 as per upstream naming for this SoC. * Removed support for brcm,realtime property. * Increased transfer timeout to 30 seconds. * Return IRQ_NONE from the IRQ handler if no interrupt was handled. * Disable TA (Transfer Active) and clear FIFOs on a transfer timeout. * Wrote device tree binding documentation. * Request unnamed clock rather than "sys_pclk"; the DT will provide the correct clock. * Assume that tfr->speed_hz and tfr->bits_per_word are always set in bcm2835_spi_start_transfer(), bcm2835_spi_transfer_one(), so no need to check spi->speed_hz or tft->bits_per_word. * Re-ordered probe() to remove the need for temporary variables. * Call clk_disable_unprepare() rather than just clk_unprepare() on probe() failure. * Don't use devm_request_irq(), to ensure that the IRQ doesn't fire after we've torn down the device, but not unhooked the IRQ. * Moved probe()'s call to clk_prepare_enable() so we can be sure the clock is enabled if the IRQ handler fires immediately. * Remove redundant checks from bcm2835_spi_check_transfer() and bcm2835_spi_setup(). * Re-ordered IRQ handler to check for RXR before DONE. Added comments to ISR. * Removed empty prepare/unprepare implementations. * Removed use of devinit/devexit. * Added BCM2835_ prefix to defines. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/spi/spi-bcm2835.c')
-rw-r--r--drivers/spi/spi-bcm2835.c456
1 files changed, 456 insertions, 0 deletions
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
new file mode 100644
index 000000000000..346601e2461d
--- /dev/null
+++ b/drivers/spi/spi-bcm2835.c
@@ -0,0 +1,456 @@
1/*
2 * Driver for Broadcom BCM2835 SPI Controllers
3 *
4 * Copyright (C) 2012 Chris Boot
5 * Copyright (C) 2013 Stephen Warren
6 *
7 * This driver is inspired by:
8 * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
9 * spi-atmel.c, Copyright (C) 2006 Atmel Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
24 */
25
26#include <linux/clk.h>
27#include <linux/completion.h>
28#include <linux/delay.h>
29#include <linux/err.h>
30#include <linux/interrupt.h>
31#include <linux/io.h>
32#include <linux/kernel.h>
33#include <linux/module.h>
34#include <linux/of.h>
35#include <linux/of_irq.h>
36#include <linux/of_device.h>
37#include <linux/spi/spi.h>
38
39/* SPI register offsets */
40#define BCM2835_SPI_CS 0x00
41#define BCM2835_SPI_FIFO 0x04
42#define BCM2835_SPI_CLK 0x08
43#define BCM2835_SPI_DLEN 0x0c
44#define BCM2835_SPI_LTOH 0x10
45#define BCM2835_SPI_DC 0x14
46
47/* Bitfields in CS */
48#define BCM2835_SPI_CS_LEN_LONG 0x02000000
49#define BCM2835_SPI_CS_DMA_LEN 0x01000000
50#define BCM2835_SPI_CS_CSPOL2 0x00800000
51#define BCM2835_SPI_CS_CSPOL1 0x00400000
52#define BCM2835_SPI_CS_CSPOL0 0x00200000
53#define BCM2835_SPI_CS_RXF 0x00100000
54#define BCM2835_SPI_CS_RXR 0x00080000
55#define BCM2835_SPI_CS_TXD 0x00040000
56#define BCM2835_SPI_CS_RXD 0x00020000
57#define BCM2835_SPI_CS_DONE 0x00010000
58#define BCM2835_SPI_CS_LEN 0x00002000
59#define BCM2835_SPI_CS_REN 0x00001000
60#define BCM2835_SPI_CS_ADCS 0x00000800
61#define BCM2835_SPI_CS_INTR 0x00000400
62#define BCM2835_SPI_CS_INTD 0x00000200
63#define BCM2835_SPI_CS_DMAEN 0x00000100
64#define BCM2835_SPI_CS_TA 0x00000080
65#define BCM2835_SPI_CS_CSPOL 0x00000040
66#define BCM2835_SPI_CS_CLEAR_RX 0x00000020
67#define BCM2835_SPI_CS_CLEAR_TX 0x00000010
68#define BCM2835_SPI_CS_CPOL 0x00000008
69#define BCM2835_SPI_CS_CPHA 0x00000004
70#define BCM2835_SPI_CS_CS_10 0x00000002
71#define BCM2835_SPI_CS_CS_01 0x00000001
72
73#define BCM2835_SPI_TIMEOUT_MS 30000
74#define BCM2835_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_NO_CS)
75
76#define DRV_NAME "spi-bcm2835"
77
78struct bcm2835_spi {
79 void __iomem *regs;
80 struct clk *clk;
81 int irq;
82 struct completion done;
83 const u8 *tx_buf;
84 u8 *rx_buf;
85 int len;
86};
87
88static inline u32 bcm2835_rd(struct bcm2835_spi *bs, unsigned reg)
89{
90 return readl(bs->regs + reg);
91}
92
93static inline void bcm2835_wr(struct bcm2835_spi *bs, unsigned reg, u32 val)
94{
95 writel(val, bs->regs + reg);
96}
97
98static inline void bcm2835_rd_fifo(struct bcm2835_spi *bs, int len)
99{
100 u8 byte;
101
102 while (len--) {
103 byte = bcm2835_rd(bs, BCM2835_SPI_FIFO);
104 if (bs->rx_buf)
105 *bs->rx_buf++ = byte;
106 }
107}
108
109static inline void bcm2835_wr_fifo(struct bcm2835_spi *bs, int len)
110{
111 u8 byte;
112
113 if (len > bs->len)
114 len = bs->len;
115
116 while (len--) {
117 byte = bs->tx_buf ? *bs->tx_buf++ : 0;
118 bcm2835_wr(bs, BCM2835_SPI_FIFO, byte);
119 bs->len--;
120 }
121}
122
123static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
124{
125 struct spi_master *master = dev_id;
126 struct bcm2835_spi *bs = spi_master_get_devdata(master);
127 u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
128
129 /*
130 * RXR - RX needs Reading. This means 12 (or more) bytes have been
131 * transmitted and hence 12 (or more) bytes have been received.
132 *
133 * The FIFO is 16-bytes deep. We check for this interrupt to keep the
134 * FIFO full; we have a 4-byte-time buffer for IRQ latency. We check
135 * this before DONE (TX empty) just in case we delayed processing this
136 * interrupt for some reason.
137 *
138 * We only check for this case if we have more bytes to TX; at the end
139 * of the transfer, we ignore this pipelining optimization, and let
140 * bcm2835_spi_finish_transfer() drain the RX FIFO.
141 */
142 if (bs->len && (cs & BCM2835_SPI_CS_RXR)) {
143 /* Read 12 bytes of data */
144 bcm2835_rd_fifo(bs, 12);
145
146 /* Write up to 12 bytes */
147 bcm2835_wr_fifo(bs, 12);
148
149 /*
150 * We must have written something to the TX FIFO due to the
151 * bs->len check above, so cannot be DONE. Hence, return
152 * early. Note that DONE could also be set if we serviced an
153 * RXR interrupt really late.
154 */
155 return IRQ_HANDLED;
156 }
157
158 /*
159 * DONE - TX empty. This occurs when we first enable the transfer
160 * since we do not pre-fill the TX FIFO. At any other time, given that
161 * we refill the TX FIFO above based on RXR, and hence ignore DONE if
162 * RXR is set, DONE really does mean end-of-transfer.
163 */
164 if (cs & BCM2835_SPI_CS_DONE) {
165 if (bs->len) { /* First interrupt in a transfer */
166 bcm2835_wr_fifo(bs, 16);
167 } else { /* Transfer complete */
168 /* Disable SPI interrupts */
169 cs &= ~(BCM2835_SPI_CS_INTR | BCM2835_SPI_CS_INTD);
170 bcm2835_wr(bs, BCM2835_SPI_CS, cs);
171
172 /*
173 * Wake up bcm2835_spi_transfer_one(), which will call
174 * bcm2835_spi_finish_transfer(), to drain the RX FIFO.
175 */
176 complete(&bs->done);
177 }
178
179 return IRQ_HANDLED;
180 }
181
182 return IRQ_NONE;
183}
184
185static int bcm2835_spi_check_transfer(struct spi_device *spi,
186 struct spi_transfer *tfr)
187{
188 /* tfr==NULL when called from bcm2835_spi_setup() */
189 u32 bpw = tfr ? tfr->bits_per_word : spi->bits_per_word;
190
191 switch (bpw) {
192 case 8:
193 break;
194 default:
195 dev_err(&spi->dev, "unsupported bits_per_word=%d\n", bpw);
196 return -EINVAL;
197 }
198
199 return 0;
200}
201
202static int bcm2835_spi_start_transfer(struct spi_device *spi,
203 struct spi_transfer *tfr)
204{
205 struct bcm2835_spi *bs = spi_master_get_devdata(spi->master);
206 unsigned long spi_hz, clk_hz, cdiv;
207 u32 cs = BCM2835_SPI_CS_INTR | BCM2835_SPI_CS_INTD | BCM2835_SPI_CS_TA;
208
209 spi_hz = tfr->speed_hz;
210 clk_hz = clk_get_rate(bs->clk);
211
212 if (spi_hz >= clk_hz / 2) {
213 cdiv = 2; /* clk_hz/2 is the fastest we can go */
214 } else if (spi_hz) {
215 /* CDIV must be a power of two */
216 cdiv = roundup_pow_of_two(DIV_ROUND_UP(clk_hz, spi_hz));
217
218 if (cdiv >= 65536)
219 cdiv = 0; /* 0 is the slowest we can go */
220 } else
221 cdiv = 0; /* 0 is the slowest we can go */
222
223 if (spi->mode & SPI_CPOL)
224 cs |= BCM2835_SPI_CS_CPOL;
225 if (spi->mode & SPI_CPHA)
226 cs |= BCM2835_SPI_CS_CPHA;
227
228 if (!(spi->mode & SPI_NO_CS)) {
229 if (spi->mode & SPI_CS_HIGH) {
230 cs |= BCM2835_SPI_CS_CSPOL;
231 cs |= BCM2835_SPI_CS_CSPOL0 << spi->chip_select;
232 }
233
234 cs |= spi->chip_select;
235 }
236
237 INIT_COMPLETION(bs->done);
238 bs->tx_buf = tfr->tx_buf;
239 bs->rx_buf = tfr->rx_buf;
240 bs->len = tfr->len;
241
242 bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
243 /*
244 * Enable the HW block. This will immediately trigger a DONE (TX
245 * empty) interrupt, upon which we will fill the TX FIFO with the
246 * first TX bytes. Pre-filling the TX FIFO here to avoid the
247 * interrupt doesn't work:-(
248 */
249 bcm2835_wr(bs, BCM2835_SPI_CS, cs);
250
251 return 0;
252}
253
254static int bcm2835_spi_finish_transfer(struct spi_device *spi,
255 struct spi_transfer *tfr, bool cs_change)
256{
257 struct bcm2835_spi *bs = spi_master_get_devdata(spi->master);
258 u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
259
260 /* Drain RX FIFO */
261 while (cs & BCM2835_SPI_CS_RXD) {
262 bcm2835_rd_fifo(bs, 1);
263 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
264 }
265
266 if (tfr->delay_usecs)
267 udelay(tfr->delay_usecs);
268
269 if (cs_change)
270 /* Clear TA flag */
271 bcm2835_wr(bs, BCM2835_SPI_CS, cs & ~BCM2835_SPI_CS_TA);
272
273 return 0;
274}
275
276static int bcm2835_spi_setup(struct spi_device *spi)
277{
278 int ret;
279
280 ret = bcm2835_spi_check_transfer(spi, NULL);
281 if (ret) {
282 dev_err(&spi->dev, "setup: invalid message\n");
283 return ret;
284 }
285
286 return 0;
287}
288
289static int bcm2835_spi_transfer_one(struct spi_master *master,
290 struct spi_message *mesg)
291{
292 struct bcm2835_spi *bs = spi_master_get_devdata(master);
293 struct spi_transfer *tfr;
294 struct spi_device *spi = mesg->spi;
295 int err = 0;
296 unsigned int timeout;
297 bool cs_change;
298
299 list_for_each_entry(tfr, &mesg->transfers, transfer_list) {
300 err = bcm2835_spi_check_transfer(spi, tfr);
301 if (err)
302 goto out;
303
304 err = bcm2835_spi_start_transfer(spi, tfr);
305 if (err)
306 goto out;
307
308 timeout = wait_for_completion_timeout(&bs->done,
309 msecs_to_jiffies(BCM2835_SPI_TIMEOUT_MS));
310 if (!timeout) {
311 err = -ETIMEDOUT;
312 goto out;
313 }
314
315 cs_change = tfr->cs_change ||
316 list_is_last(&tfr->transfer_list, &mesg->transfers);
317
318 err = bcm2835_spi_finish_transfer(spi, tfr, cs_change);
319 if (err)
320 goto out;
321
322 mesg->actual_length += (tfr->len - bs->len);
323 }
324
325out:
326 /* Clear FIFOs, and disable the HW block */
327 bcm2835_wr(bs, BCM2835_SPI_CS,
328 BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
329 mesg->status = err;
330 spi_finalize_current_message(master);
331
332 return 0;
333}
334
335static int bcm2835_spi_probe(struct platform_device *pdev)
336{
337 struct spi_master *master;
338 struct bcm2835_spi *bs;
339 struct resource *res;
340 int err;
341
342 master = spi_alloc_master(&pdev->dev, sizeof(*bs));
343 if (!master) {
344 dev_err(&pdev->dev, "spi_alloc_master() failed\n");
345 return -ENOMEM;
346 }
347
348 platform_set_drvdata(pdev, master);
349
350 master->mode_bits = BCM2835_SPI_MODE_BITS;
351 master->bus_num = -1;
352 master->num_chipselect = 3;
353 master->setup = bcm2835_spi_setup;
354 master->transfer_one_message = bcm2835_spi_transfer_one;
355 master->dev.of_node = pdev->dev.of_node;
356
357 bs = spi_master_get_devdata(master);
358
359 init_completion(&bs->done);
360
361 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
362 if (!res) {
363 dev_err(&pdev->dev, "could not get memory resource\n");
364 err = -ENODEV;
365 goto out_master_put;
366 }
367
368 bs->regs = devm_request_and_ioremap(&pdev->dev, res);
369 if (!bs->regs) {
370 dev_err(&pdev->dev, "could not request/map memory region\n");
371 err = -ENODEV;
372 goto out_master_put;
373 }
374
375 bs->clk = devm_clk_get(&pdev->dev, NULL);
376 if (IS_ERR(bs->clk)) {
377 err = PTR_ERR(bs->clk);
378 dev_err(&pdev->dev, "could not get clk: %d\n", err);
379 goto out_master_put;
380 }
381
382 bs->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
383 if (bs->irq <= 0) {
384 dev_err(&pdev->dev, "could not get IRQ: %d\n", bs->irq);
385 err = bs->irq ? bs->irq : -ENODEV;
386 goto out_master_put;
387 }
388
389 clk_prepare_enable(bs->clk);
390
391 err = request_irq(bs->irq, bcm2835_spi_interrupt, 0,
392 dev_name(&pdev->dev), master);
393 if (err) {
394 dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
395 goto out_clk_disable;
396 }
397
398 /* initialise the hardware */
399 bcm2835_wr(bs, BCM2835_SPI_CS,
400 BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
401
402 err = spi_register_master(master);
403 if (err) {
404 dev_err(&pdev->dev, "could not register SPI master: %d\n", err);
405 goto out_free_irq;
406 }
407
408 return 0;
409
410out_free_irq:
411 free_irq(bs->irq, master);
412out_clk_disable:
413 clk_disable_unprepare(bs->clk);
414out_master_put:
415 spi_master_put(master);
416 return err;
417}
418
419static int bcm2835_spi_remove(struct platform_device *pdev)
420{
421 struct spi_master *master = platform_get_drvdata(pdev);
422 struct bcm2835_spi *bs = spi_master_get_devdata(master);
423
424 free_irq(bs->irq, master);
425 spi_unregister_master(master);
426
427 /* Clear FIFOs, and disable the HW block */
428 bcm2835_wr(bs, BCM2835_SPI_CS,
429 BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
430
431 clk_disable_unprepare(bs->clk);
432 spi_master_put(master);
433
434 return 0;
435}
436
437static const struct of_device_id bcm2835_spi_match[] = {
438 { .compatible = "brcm,bcm2835-spi", },
439 {}
440};
441MODULE_DEVICE_TABLE(of, bcm2835_spi_match);
442
443static struct platform_driver bcm2835_spi_driver = {
444 .driver = {
445 .name = DRV_NAME,
446 .owner = THIS_MODULE,
447 .of_match_table = bcm2835_spi_match,
448 },
449 .probe = bcm2835_spi_probe,
450 .remove = bcm2835_spi_remove,
451};
452module_platform_driver(bcm2835_spi_driver);
453
454MODULE_DESCRIPTION("SPI controller driver for Broadcom BCM2835");
455MODULE_AUTHOR("Chris Boot <bootc@bootc.net>");
456MODULE_LICENSE("GPL v2");