diff options
author | Brian Niebuhr <bniebuhr@efjohnson.com> | 2010-08-12 03:19:05 -0400 |
---|---|---|
committer | Sekhar Nori <nsekhar@ti.com> | 2010-11-18 08:08:24 -0500 |
commit | 843a713bc53d04f8fac46ddd8693a2cc0422ca5e (patch) | |
tree | c433420bbded315631d91376f04a145ab03a2a6d /drivers/spi/davinci_spi.c | |
parent | 50356dd7c1f6338588af6a745649a718f16fe453 (diff) |
spi: davinci: set chip-select mode in SPIDEF only once
Quit writing the same constant value determining the chip-select
mode when no transmissions are in progress in davinci_spi_chipelect().
Instead just setup the SPIDEF register once during probe.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'drivers/spi/davinci_spi.c')
-rw-r--r-- | drivers/spi/davinci_spi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 76decda0c8da..d6b6a4958088 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c | |||
@@ -245,8 +245,6 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) | |||
245 | * line for the controller | 245 | * line for the controller |
246 | */ | 246 | */ |
247 | if (value == BITBANG_CS_INACTIVE) { | 247 | if (value == BITBANG_CS_INACTIVE) { |
248 | set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT); | ||
249 | |||
250 | data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT; | 248 | data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT; |
251 | iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); | 249 | iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); |
252 | 250 | ||
@@ -1132,6 +1130,8 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
1132 | clear_io_bits(davinci_spi->base + SPIGCR1, | 1130 | clear_io_bits(davinci_spi->base + SPIGCR1, |
1133 | SPIGCR1_CLKMOD_MASK); | 1131 | SPIGCR1_CLKMOD_MASK); |
1134 | 1132 | ||
1133 | iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); | ||
1134 | |||
1135 | /* master mode default */ | 1135 | /* master mode default */ |
1136 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); | 1136 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); |
1137 | 1137 | ||